CN106952600A - Time schedule controller and its signal output method - Google Patents
Time schedule controller and its signal output method Download PDFInfo
- Publication number
- CN106952600A CN106952600A CN201610009851.1A CN201610009851A CN106952600A CN 106952600 A CN106952600 A CN 106952600A CN 201610009851 A CN201610009851 A CN 201610009851A CN 106952600 A CN106952600 A CN 106952600A
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- Prior art keywords
- signal
- fluctuation
- amplitude
- data
- time schedule
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G3/2096—Details of the interface to the display terminal specific for a flat panel
Abstract
A kind of time schedule controller and its signal output method.Signal output method comprises the following steps.Time schedule controller produces a data actuating signal and a data-signal according to an image differential wave.Time schedule controller provides a source differential signal to one source driver according to data-signal, and according to the amplitude of fluctuation of data actuating signal adjustment source differential signal.
Description
Technical field
The present invention relates to a kind of time schedule controller, and more particularly to a kind of time schedule controller and its signal output
Method.
Background technology
In modern times, the electronics such as computer, television set, mobile phone, personal digital assistant (PDA), digital camera
Device, all transmits message by display control so that display increasingly increases the importance of people.
Compared to conventional picture tube display, flat-panel screens (Flat Panel Display, FPD) has weight
The advantages of measuring light, small volume and penetrated without width, it has also become the main flow of display device.In general, plane
Display includes time schedule controller, source electrode driver, gate drivers, and panel.
Also, the high-resization with flat-panel screens and many GTGs, time schedule controller drive with source electrode
The rapid increase of data quantity between dynamic device, thus cause the data wire quantity of transmission data, power consumption with
And electromagnetic interference (Electromagnetic Interference, EMI) noise etc. is also significantly increased therewith.Cause
This, the power consumption and electromagnetic interference for how reducing time schedule controller then turn into design time schedule controller
One important topic.
The content of the invention
The present invention provides a kind of time schedule controller and its signal output method, it is possible to decrease the electricity of time schedule controller
Power is consumed and electromagnetic interference.
The time schedule controller of the present invention, including a receiver, a primary function circuit and a conveyer.Receive
Device receives an image differential wave, to provide a data actuating signal and a data-signal.Primary function circuit
Receiver is coupled to receive data actuating signal and data-signal, and data actuating signal and data are provided
Signal.Conveyer couples primary function circuit to receive data actuating signal and data-signal, with according to data
Signal provides a source differential signal to one source driver, and adjusts source electrode according to data actuating signal
The amplitude of fluctuation of differential wave.
The signal output method of the time schedule controller of the present invention, comprises the following steps.Time schedule controller foundation
One image differential wave produces a data actuating signal and a data-signal.Time schedule controller is believed according to data
Number provide a source differential signal to one source driver, and according to data actuating signal adjustment source electrode it is poor
The amplitude of fluctuation of dynamic signal.
Based on above-mentioned, the time schedule controller and its signal output method of the embodiment of the present invention, it is according to data
The adjustment of enable signal is provided to the amplitude of fluctuation of the source differential signal of source electrode driver, to reduce sequential control
The power consumption of device processed and electromagnetic interference.
For the features described above and advantage of the present invention can be become apparent, special embodiment below, and coordinate
Accompanying drawing is described in detail below.
Brief description of the drawings
Fig. 1 is the system schematic of the time schedule controller according to one embodiment of the invention.
Fig. 2 is the data combination diagram of the source differential signal according to one embodiment of the invention.
Fig. 3 is the waveform signal of the source differential signal and data actuating signal according to one embodiment of the invention
Figure.
Fig. 4 is data actuating signal, vertical synchronizing signal and the horizontal synchronization according to one embodiment of the invention
The waveform diagram of signal.
Fig. 5 is the system schematic of the time schedule controller according to another embodiment of the present invention.
Fig. 6 is the waveform signal of the source differential signal and data actuating signal according to one embodiment of the invention
Figure.
Fig. 7 is the flow chart of the signal output method of the time schedule controller according to one embodiment of the invention.
【Symbol description】
10、50：Source electrode driver
100、500：Time schedule controller
110：Receiver
120：Primary function circuit
130、510：Conveyer
AP1~AP3：Default amplitude of fluctuation
AR1~AR3：Reduce amplitude of fluctuation
BC：Control bit
BCK：Clock bit
BD：Data bit
DF_CK：Clock differential wave
DF_I：Image differential wave
DF_S1、DF_S2：Source differential signal
HB：During horizontal blank
HS：Horizontal-drive signal
SDA：Data-signal
SDE：Data actuating signal
VB：During vertical blank
VS：Vertical synchronizing signal
S710、S720：Step
Embodiment
Fig. 1 is the system schematic of the time schedule controller according to one embodiment of the invention.It refer to Fig. 1,
In the present embodiment, time schedule controller 100 is coupled to source electrode driver 10, and including receiver 110,
Primary function circuit 120 and conveyer 130.Receiver 110 receives image difference from an external main frame (Host)
Dynamic signal DF_I, and provide data actuating signal SDE and data letter according to image differential wave DF_I
Number SDA is to primary function circuit 120.Primary function circuit 120 couples receiver 110 to receive data enable
Signal SDE and data-signal SDA, and provide data actuating signal SDE and data-signal SDA extremely
Conveyer 130.Conveyer 130 couples primary function circuit 120 to receive data actuating signal SDE and number
It is believed that number SDA, and source differential signal DF_S1 is provided to source drive according to data-signal SDA
Device 10, and according to data actuating signal SDE adjustment source differential signals DF_S1 amplitude of fluctuation.
Fig. 2 is the data combination diagram of the source differential signal according to one embodiment of the invention.It refer to
Fig. 1 and Fig. 2, in the present embodiment, source differential signal DF_S1 is sequentially to transmit multiple clock bits
BCK, and between clock bit BCK, source differential signal DF_S1 can transmit multiple control bits
BC or multiple data bit BD or mixing transmission control bit BC and data bit BD, this can be according to this area
Depending on technical staff.Also, in the present embodiment, conveyer 130 and source electrode driver 10 can by when
Clock position BCK is calibrated and synchronous, therefore can be without transmitting clock signal.
Fig. 3 is the waveform signal of the source differential signal and data actuating signal according to one embodiment of the invention
Figure.Fig. 1 to Fig. 3 is refer to, in the present embodiment, data actuating signal SDE enables represent data can
To transmit, the source differential signal DF_S1 that now conveyer 130 is exported is just meaningful；Conversely, data
Enable signal SDE forbidden energy represents data without transmission, the source differential signal that now conveyer 130 is exported
DF_S1 does not have meaning.For example, data actuating signal SDE forbidden energy is vertical during a picture
Blank (Vertical Blanking) period VB and horizontal blank (Horizontal Blanking) period HB,
And other times of the data actuating signal SDE enables during this picture.
Therefore, when data actuating signal SDE is enable, conveyer 130 is by source differential signal DF_S1
Amplitude of fluctuation be set as a default amplitude of fluctuation AP1 so that source electrode driver 10 can normally receive number
According to also can correctly judging everybody logic level；Conversely, when data actuating signal SDE is forbidden energy
When, source differential signal DF_S1 amplitude of fluctuation is set as reduction amplitude of fluctuation AR1 by conveyer 130.
As shown in figure 3, in the present embodiment, reduction amplitude of fluctuation AR1 is less than default amplitude of fluctuation AP1,
In embodiments of the invention, reduction amplitude of fluctuation AR1 can be 0 volt, can also stop providing source electrode
Differential wave DF_S1.
According to above-mentioned, during vertical blank during VB and horizontal blank in HB, data actuating signal
DF_S1 amplitude of fluctuation can reduce, to reduce power consumption and the electromagnetic interference of time schedule controller 100.
Also, data actuating signal SDE enable can be judged with forbidden energy by logic circuit, that is, conveyer
Configurable logic circuit is to judge data actuating signal SDE state in 130, and accordingly reduces source
Pole differential wave DF_S1 amplitude of fluctuation stops output source differential signal DF_S1.Wherein, it is above-mentioned
Logic circuit can reduce source differential signal DF_S1 pendulum by adjusting the supply voltage of output buffer
Dynamic amplitude closes output buffer.
Fig. 4 is data actuating signal, vertical synchronizing signal and the horizontal synchronization according to one embodiment of the invention
The waveform diagram of signal.Fig. 1 and Fig. 4 is refer to, in the present embodiment, receiver 110 can more connect
Vertical synchronizing signal VS and horizontal-drive signal HS from external main frame are received, and according to vertical synchronization
Signal VS and horizontal-drive signal HS produces data actuating signal SDE.For example, vertical synchronization is worked as
When one of signal VS and horizontal-drive signal HS forbidden energy, the forbidden energy data enable of receiver 110 letter
Number SDE；As vertical synchronizing signal VS and horizontal-drive signal HS all enables, the enable of receiver 110
Data actuating signal SDE.
Fig. 5 is the system schematic of the time schedule controller according to another embodiment of the present invention.Refer to Fig. 1,
Fig. 4 and Fig. 5, time schedule controller 500 is approximately identical to time schedule controller 100, and its difference is to pass
Send device 510.In the present embodiment, conveyer 510 simultaneously provides source differential signal DF_S2 and clock
Differential wave DF_CK is to source electrode driver 20, that is, source differential signal DF_S2 is to transmit control
Position BC and data bit BD, clock differential wave DF_CK is to transmit clock bit BCK.Also, pass
Send device 510 equally can adjust source differential signal DF_S2 and clock difference according to data actuating signal SDE
Dynamic signal DF_CK amplitude of fluctuation.
Fig. 6 is the waveform signal of the source differential signal and data actuating signal according to one embodiment of the invention
Figure.Fig. 5 and Fig. 6 is refer to, in the present embodiment, when data actuating signal SDE is enable, is passed
Send device 510 that source differential signal DF_S2 amplitude of fluctuation is set as into default amplitude of fluctuation AP2, and
Clock differential wave DF_CK amplitude of fluctuation is set as default amplitude of fluctuation AP3, so that source drive
Device 50 can normally receive data；Conversely, when data actuating signal SDE is forbidden energy, conveyer 510
Source differential signal DF_S2 amplitude of fluctuation is set as to reduce amplitude of fluctuation AR2, and by clock difference
Dynamic signal DF_CK amplitude of fluctuation is set as reduction amplitude of fluctuation AR3.
As shown in fig. 6, in the present embodiment, reduction amplitude of fluctuation AR2 is less than default amplitude of fluctuation AP2,
In an embodiment of the present invention, reduction amplitude of fluctuation AR2 can be 0 volt.Also, in the present embodiment
In, reduction amplitude of fluctuation AR3 is less than default amplitude of fluctuation AP3, in an embodiment of the present invention, reduction
Amplitude of fluctuation AR3 can also be 0 volt.
Fig. 7 is the flow chart of the signal output method of the time schedule controller according to one embodiment of the invention.Please
Reference picture 7, in the present embodiment, the signal output method of time schedule controller comprise the following steps.First,
Time schedule controller produces data actuating signal and data-signal (step S710) according to image differential wave.
Then, time schedule controller provides source differential signal to source electrode driver according to data-signal, and foundation
Data actuating signal adjusts the amplitude of fluctuation (step S720) of source differential signal.Wherein, step S710
And S720 order is that the embodiment of the present invention is not limited to illustrate.Also, step S710 and
S720 details can refer to described in Fig. 1 to Fig. 6 embodiments, then be repeated no more at this.
In summary, the time schedule controller and its signal output method of the embodiment of the present invention, it is according to data
The adjustment of enable signal provides to the source differential signal and clock difference of source electrode driver the amplitude of fluctuation for moving signal
Degree, to reduce power consumption and the electromagnetic interference of time schedule controller.
Although the present invention is disclosed as above with embodiment, so it is not limited to the present invention, this area skill
Art personnel without departing from the spirit and scope of the present invention, when can make a little change and retouching, therefore this hair
Bright protection domain is worked as to be defined depending on appended claims confining spectrum.
Claims (18)
1. a kind of time schedule controller, including：
Receiver, receives image differential wave, to provide data actuating signal and data-signal；
Primary function circuit, couples the receiver to receive the data actuating signal and the data-signal, and
The data actuating signal and the data-signal are provided；And
Conveyer, couples the primary function circuit to receive the data actuating signal and the data-signal, with according to
Source differential signal is provided to source electrode driver according to the data-signal, and is adjusted according to the data actuating signal
The amplitude of fluctuation of the whole source differential signal.
2. time schedule controller as claimed in claim 1, wherein when the data actuating signal is enable,
The amplitude of fluctuation of the source differential signal is default amplitude of fluctuation, when the data actuating signal is forbidden energy,
The amplitude of fluctuation of the source differential signal is reduction amplitude of fluctuation, and the wherein reduction amplitude of fluctuation is less than default
Amplitude of fluctuation.
3. time schedule controller as claimed in claim 2, wherein the reduction amplitude of fluctuation are 0 volt.
4. time schedule controller as claimed in claim 2, wherein the source differential signal are sequentially to transmit
Multiple clock bits, multiple control bits and multiple data bit.
5. time schedule controller as claimed in claim 1, the wherein conveyer simultaneously provide the source differential
Signal and clock difference move signal to the source electrode driver, and the conveyer is adjusted according to the data actuating signal
The amplitude of fluctuation of the whole clock differential wave.
6. time schedule controller as claimed in claim 5, wherein when the data actuating signal is enable,
The amplitude of fluctuation of the clock differential wave is default amplitude of fluctuation, when the data actuating signal is forbidden energy,
The amplitude of fluctuation of the clock differential wave is reduction amplitude of fluctuation, and the wherein reduction amplitude of fluctuation is less than default
Amplitude of fluctuation.
7. time schedule controller as claimed in claim 6, wherein the reduction amplitude of fluctuation are 0 volt.
8. time schedule controller as claimed in claim 1, the wherein receiver according to vertical synchronizing signal and
Horizontal-drive signal produces the data actuating signal.
9. time schedule controller as claimed in claim 8, wherein when the vertical synchronizing signal and the level are same
When walking one of signal forbidden energy, forbidden energy data actuating signal, when the vertical synchronizing signal and the water
Flat synchronizing signal all enable when, the enable data actuating signal.
10. a kind of signal output method of time schedule controller, including：
The time schedule controller produces data actuating signal and data-signal according to image differential wave；And
The time schedule controller provides source differential signal to source electrode driver according to the data-signal, and according to
The amplitude of fluctuation of the source differential signal is adjusted according to the data actuating signal.
11. the signal output method of time schedule controller as claimed in claim 10, wherein according to the data
The step of enable signal adjusts the amplitude of fluctuation of the source differential signal includes：
When the data actuating signal is enable, the amplitude of fluctuation of the source differential signal is default amplitude of fluctuation
Degree；And
When the data actuating signal is forbidden energy, the amplitude of fluctuation of the source differential signal is reduction amplitude of fluctuation
Degree, wherein the reduction amplitude of fluctuation are less than default amplitude of fluctuation.
12. the signal output method of time schedule controller as claimed in claim 11, the wherein reduction are swung
Amplitude is 0 volt.
13. the signal output method of time schedule controller as claimed in claim 11, the wherein source differential
Signal is sequentially to transmit multiple clock bits, multiple control bits and multiple data bit.
14. the signal output method of time schedule controller as claimed in claim 10, also includes：
The time schedule controller simultaneously provides the source differential signal and clock difference moves signal to the source drive
Device, and adjust according to the data actuating signal amplitude of fluctuation of the clock differential wave.
15. the signal output method of time schedule controller as claimed in claim 14, wherein according to the data
The step of enable signal adjusts the amplitude of fluctuation of the clock differential wave includes：
When the data actuating signal is enable, the amplitude of fluctuation of the clock differential wave is default amplitude of fluctuation
Degree；And
When the data actuating signal is forbidden energy, the amplitude of fluctuation of the clock differential wave is reduction amplitude of fluctuation
Degree, wherein the reduction amplitude of fluctuation are less than default amplitude of fluctuation.
16. the signal output method of time schedule controller as claimed in claim 15, the wherein reduction are swung
Amplitude is 0 volt.
17. the signal output method of time schedule controller as claimed in claim 10, also includes：
The time schedule controller device produces data enable letter according to vertical synchronizing signal and horizontal-drive signal
Number.
18. the signal output method of time schedule controller as claimed in claim 17, the wherein SECO
The step of device device produces the data actuating signal according to vertical synchronizing signal and horizontal-drive signal includes：
When one of the vertical synchronizing signal and the horizontal-drive signal forbidden energy, the forbidden energy data are caused
Can signal：And
When the vertical synchronizing signal and horizontal-drive signal all enables, the enable data actuating signal.
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| CN201610009851.1A CN106952600B (en) | 2016-01-07 | 2016-01-07 | Time schedule controller and signal output method thereof |
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| CN201610009851.1A CN106952600B (en) | 2016-01-07 | 2016-01-07 | Time schedule controller and signal output method thereof |
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| CN108898986A (en) * | 2018-07-27 | 2018-11-27 | 京东方科技集团股份有限公司 | Display methods and display device |
| CN109192127A (en) * | 2018-10-29 | 2019-01-11 | 合肥鑫晟光电科技有限公司 | Sequence controller and its driving method, display device |
| CN110930929A (en) * | 2019-12-18 | 2020-03-27 | 京东方科技集团股份有限公司 | Signal processing method, time sequence controller and display device |
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