CN106935272A - The method and apparatus for opening the debugging of eMMC back doors - Google Patents
The method and apparatus for opening the debugging of eMMC back doors Download PDFInfo
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- CN106935272A CN106935272A CN201511032692.9A CN201511032692A CN106935272A CN 106935272 A CN106935272 A CN 106935272A CN 201511032692 A CN201511032692 A CN 201511032692A CN 106935272 A CN106935272 A CN 106935272A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
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Abstract
A kind of method and apparatus of unlatching eMMC back doors debugging are the embodiment of the invention provides, eMMC is connected with main frame, and method includes：The first write order sent by eMMC Receiving Hosts；First write order includes preset data frame, and preset data frame includes identification code, the first key assignments, the second key assignments, message authentication codes and request type；Carry out logical process to the first key assignments and the second key assignments, and when message authentication codes are equal with logical process result and during identification code equal with default ID, judge whether request type is into debugging mode request；If it is, control eMMC enters debugging mode.The embodiment of the present invention is when bad piece occurs in eMMC, it is allowed to which tuner extracts bad piece information on user platform and is analyzed using general read write command, and need not remove eMMC, effectively prevent the destruction to data in eMMC in eMMC demolishing process.
Description
Technical field
The present invention relates to electronic technology field, more particularly to a kind of side of unlatching eMMC back doors debugging
Method and a kind of device of unlatching eMMC back doors debugging.
Background technology
At present, eMMC (embedded Multi-Media Card, by an embedded storage solution party
Case is constituted, with MMC (Multi-Media Card, multimedia card) interface, flash memory device
And master controller) firmware all meets Related product specification, eMMC carries are on user platform and without outer
Port is debugged in portion, and usual engineer carries out eMMC debugging, Yong Huping with vendor command in the lab
Platform can not locally-supported vendor command.
Therefore, when bad piece occurs in eMMC, unless eMMC bad pieces are removed from user platform taken back
Laboratory is debugged and is analyzed, and otherwise engineer is difficult to obtain for analyzing eMMC failure causes
Enough information, and can most probably destroy fault data in eMMC bad pieces during removing bad piece.
The content of the invention
In view of the above problems, the embodiment of the invention provides and overcome a kind of of above mentioned problem to open eMMC
The method of back door debugging and a kind of device of unlatching eMMC back doors debugging, with solve in correlation technique when
When bad piece occurs in eMMC, it is necessary to remove eMMC bad pieces from user platform, cause to destroy eMMC
The problem of fault data in bad piece.
In order to solve the above problems, the embodiment of the invention discloses a kind of debugging of unlatching eMMC back doors
Method, the eMMC is connected with main frame, and the method for the unlatching eMMC back doors debugging is including following
Step：The first write order that the main frame sends is received by the eMMC；First write order
Including preset data frame, the preset data frame includes identification code, the first key assignments, the second key assignments, information
Identifying code and request type；Logical process is carried out to first key assignments and second key assignments, and works as institute
When stating message authentication codes equal with logical process result and the identification code equal with default ID, judge
Whether the request type is into debugging mode request；If it is, control the eMMC to enter adjusting
Die trial formula.
Specifically, after the eMMC enters debugging mode, the side of eMMC back doors debugging is opened
Method also includes：The second write order that the main frame sends is received by the eMMC；Described second writes
Order includes the preset data frame, the preset data frame also including write initial address, data to be written and
The size of the data to be written；Judge whether the request type is write data requests；If it is, according to
The size of initial address and the data to be written of writing is by the data write-in to be written eMMC.
Specifically, after the eMMC enters debugging mode, the side of eMMC back doors debugging is opened
Method also includes：The 3rd write order that the main frame sends is received by the eMMC；Described 3rd writes
Order includes the preset data frame, and the preset data frame also includes reading initial address and the data that continue
Size；Judge whether the request type is read data request；If it is, according to the reading initial address
With the size of the data that continue read from the eMMC described in continue data.
Specifically, after the eMMC enters debugging mode, the side of eMMC back doors debugging is opened
Method also includes：The 4th write order that the main frame sends is received by the eMMC；Described 4th writes
Order includes the preset data frame, and the preset data frame also includes erasing initial address and number to be erased
According to size；Judge whether the request type is erasing request of data；If it is, according to the erasing
The size of initial address and the data to be erased wipes data to be erased from the eMMC.
Specifically, after the eMMC enters debugging mode, the side of eMMC back doors debugging is opened
Method also includes：The 5th write order that the main frame sends is received by the eMMC；Described 5th writes
Order includes the preset data frame；Judge whether the request type is to exit debugging mode request；Such as
Fruit is to control the eMMC to exit the debugging mode.
Specifically, it is described logical process is carried out to first key assignments and second key assignments to include：To institute
Stating the first key assignments and second key assignments carries out XOR treatment.
In order to solve the above problems, the debugging of eMMC back doors is opened the embodiment of the invention also discloses one kind
Device, the eMMC is connected with main frame, and the device of the unlatching eMMC back doors debugging includes：
First receiver module, the first write order that the main frame sends is received by the eMMC；Described
One write order includes preset data frame, and the preset data frame includes identification code, the first key assignments, the second key
Value, message authentication codes and request type；First judge module, for first key assignments and described
Two key assignments carry out logical process, and when described information identifying code is equal with logical process result and the identification
When code is equal with default ID, judge whether the request type is into debugging mode request；First
Control module, for when the request type be to control the eMMC when being asked into debugging mode
Into debugging mode.
Specifically, after first control module, the device for opening the debugging of eMMC back doors is also wrapped
Include：Second receiver module, for receiving the second write order that the main frame sends by the eMMC；
Second write order include the preset data frame, the preset data frame also include write initial address,
The size of data to be written and the data to be written；Second judge module, for judging that the request type is
No is write data requests；Write data module, for when the request type be write data requests when, according to
The size of initial address and the data to be written of writing is by the data write-in to be written eMMC.
Specifically, after first control module, the device for opening the debugging of eMMC back doors is also wrapped
Include：3rd receiver module, for receiving the 3rd write order that the main frame sends by the eMMC；
3rd write order include the preset data frame, the preset data frame also include read initial address and
The size of the data that continue；3rd judge module, for judging whether the request type is read data request；
Read data module, for when the request type be read data request when, according to it is described reading initial address and
The size of the data that continue continues data described in being read from the eMMC.
Specifically, after first control module, the device for opening the debugging of eMMC back doors is also wrapped
Include：4th receiver module, for receiving the 4th write order that the main frame sends by the eMMC；
4th write order includes the preset data frame, and the preset data frame also includes erasing initial address
With the size of data to be erased；4th judge module, for judging whether the request type is erasing number
According to request；Data wipe module, for when the request type is for erasing request of data, according to described
The size of erasing initial address and the data to be erased wipes data to be erased from the eMMC.
Specifically, after first control module, the device for opening the debugging of eMMC back doors is also wrapped
Include：5th receiver module, for receiving the 5th write order that the main frame sends by the eMMC；
5th write order includes the preset data frame；5th judge module, for judging the request class
Whether type is to exit debugging mode request；Second control module, for being to exit tune when the request type
During examination mode request, the eMMC is controlled to exit the debugging mode.
Specifically, first judge module includes：XOR processing unit, for described first
Key assignments and second key assignments carry out XOR treatment.
The method and apparatus of the unlatching eMMC back doors debugging of the embodiment of the present invention include advantages below：
After eMMC is connected with main frame, the first write order sent by eMMC Receiving Hosts, wherein, the
One write order include preset data frame, preset data frame include identification code, the first key assignments, the second key assignments,
Message authentication codes and request type, and then logical process is carried out to the first key assignments and the second key assignments, and when letter
When ceasing identifying code equal with logical process result and identification code equal with default ID, request type is judged
Whether it is to be asked into debugging mode, and when request type is control when being asked into debugging mode
EMMC enters debugging mode.So as to realize allowing tuner to be opened on user platform using general write order
Open backstage debugging mode, and allow tuner carried out on user platform using general read write command Writing/Reading/
Erasing data etc., realize being analyzed the bad piece information of eMMC, and need not remove eMMC, have
Effect avoids the destruction to fault data in eMMC in eMMC demolishing process.
Brief description of the drawings
The step of Fig. 1 is a kind of embodiment of the method for unlatching eMMC back doors debugging of the invention flow chart；
The step of Fig. 2 is the embodiment of the method for another unlatching eMMC back doors debugging of the invention flow
Figure；
Fig. 3 is preset data frame in the embodiment of the method that a kind of unlatching eMMC back doors of the invention are debugged
Schematic diagram；
Fig. 4 is the first write order in the embodiment of the method that a kind of unlatching eMMC back doors of the invention are debugged
The schematic diagram of middle preset data frame；
Fig. 5 is the second write order in the embodiment of the method that a kind of unlatching eMMC back doors of the invention are debugged
The schematic diagram of middle preset data frame；
Fig. 6 is the 5th write order in the embodiment of the method that a kind of unlatching eMMC back doors of the invention are debugged
The schematic diagram of middle preset data frame；
Fig. 7 is a kind of structured flowchart of the device embodiment of unlatching eMMC back doors debugging of the invention；
Fig. 8 is the structured flowchart of another device embodiment for opening the debugging of eMMC back doors of the invention.
Specific embodiment
To enable the above objects, features and advantages of the present invention more obvious understandable, below in conjunction with the accompanying drawings
The present invention is further detailed explanation with specific embodiment.
Embodiment one
Reference picture 1, shows a kind of step of the embodiment of the method for unlatching eMMC back doors debugging of the invention
Rapid flow chart, eMMC is connected with main frame, and the method that unlatching eMMC is debugged at back door can include following
Step：
S1, the first write order sent by eMMC Receiving Hosts；First write order includes present count
According to frame, preset data frame includes identification code, the first key assignments, the second key assignments, message authentication codes and request class
Type.
Specifically, tuner can be according to debugging demand, by dd order ((SuSE) Linux OS
Order under/UNIX operating system, effect is one file of block copy with specified size, and in copy
While the conversion specified) or uboot (a kind of system startup software) or other application program control
Main frame processed sends the first write order.
Wherein, the first write order is general write order, and preset data frame is the first write order in data transfer
On circuit transmit when the first frame data, identification code, the first key assignments, the second key assignments, message authentication codes and
Byte number of the request type in preset data frame can need to be configured according to practical application.Specifically
Ground, identification code can be the preset value defined in eMMC firmware codes, the first key assignments and the second key assignments
Respectively two random values, message authentication codes can be configured according to the first key assignments and the second key assignments, please
Ask type for set the first write order request function, therefore, tuner can by set ask class
The value of type so that the function of the request of the first write order is different, such as write data requests, read data request,
Erasing request of data, reading P/EC (Program/Erase Count, program/erase number) request, reading
Mapping Table (mapping table) requests, reading Flash ID (flash memory identification code) request, reading DBT (Defect
Block Table, bad block table) request etc..It should be noted that preset data frame except include identification code,
Outside the parameters such as the first key assignments, the second key assignments, message authentication codes and request type, can also be including other ginsengs
Number.
S2, logical process is carried out to the first key assignments and the second key assignments, and when message authentication codes and logical process
Result is equal and during identification code equal with default ID, judges whether request type is to enter debugging mode
Request.
Wherein, when message authentication codes are unequal with logical process result, or identification code is with default ID not
When equal, step S2 judges that the first write order is ordinary write command, and step S2 does not continue to judge request class
Whether type is into debugging mode request；When message authentication codes are equal with logical process result and identification code with
When default ID is equal, step S2 judges that the first write order is debugging mode write order.Need explanation
, step S2 combinations identification code and message authentication codes etc. can avoid sentencing ordinary write command mistake
It is debugging mode write order to break.
Specifically, can be by judging the value of request type and entering what debugging mode was asked in step S2
Whether value is equal to judge whether request type is into debugging mode request, and when the value of request type
When equal with the value for entering debugging mode request, judge that request type is into debugging mode request.Into
Step S3.
S3, if it is, control eMMC enters debugging mode.
Specifically, it can be to open eMMC firmwares that step S3 controls eMMC enters debugging mode
Back door.
According to embodiments of the present invention one, after eMMC is connected with main frame, by eMMC Receiving Hosts
The first write order for sending, wherein, the first write order includes preset data frame, and preset data frame includes knowing
Other code, the first key assignments, the second key assignments, message authentication codes and request type, and then to the first key assignments and
Two key assignments carry out logical process, and when message authentication codes are equal with logical process result and identification code with it is default
When identification code is equal, judge whether request type is to be asked into debugging mode, and when request type is
When being asked into debugging mode, control eMMC enters debugging mode.So as to realize that permission tuner makes
Backstage debugging is opened on user platform with general write order, and eMMC need not be removed, effectively prevent
To the destruction of fault data in eMMC in eMMC demolishing process.
Embodiment two
Reference picture 2, shows another embodiment of the method for opening the debugging of eMMC back doors of the invention
Flow chart of steps, eMMC is connected with main frame, open the method for eMMC back doors debugging can include with
Lower step：
S21, the first write order sent by eMMC Receiving Hosts；First write order includes present count
According to frame, preset data frame includes identification code, the first key assignments, the second key assignments, message authentication codes and request class
Type.
Wherein, the first write order is general write order, and preset data frame is the first write order in data transfer
On circuit transmit when the first frame data, identification code, the first key assignments, the second key assignments, message authentication codes and
Byte number of the request type in preset data frame can need to be configured according to practical application.Specifically
Ground, identification code can be the preset value defined in eMMC firmware codes, the first key assignments and the second key assignments
Respectively two random values, message authentication codes can be configured according to the first key assignments and the second key assignments, please
Ask type for set the first write order request function, therefore, tuner can by set ask class
The value of type so that the function of the request of the first write order is different, such as write data requests, read data request,
Erasing request of data, reading P/EC are asked, reading Mapping Table are asked, read Flash ID asks, reading
DBT requests etc..It should be noted that preset data frame is removed includes identification code, the first key assignments, second
Outside the parameters such as key assignments, message authentication codes and request type, other specification can also be included.
S22, logical process is carried out to the first key assignments and the second key assignments, and at message authentication codes and logic
When managing equal result and identification code equal with default ID, judge whether request type is into debugging mould
Formula is asked；Wherein, carrying out logical process to the first key assignments and the second key assignments can include：
S221, XOR treatment is carried out to the first key assignments and the second key assignments.
Wherein, when message authentication codes are unequal with logical process result, or identification code is with default ID not
When equal, step S22 judges that the first write order is ordinary write command, and step S22 does not continue to judge request
Whether type is into debugging mode request；When message authentication codes are equal with logical process result and identification code
When equal with default ID, step S22 judges that the first write order is debugging mode write order.Need
Bright, step S22 combinations identification code and message authentication codes etc. can be avoided ordinary write command mistake
It is judged as debugging mode write order.
It should be noted that step S22 the first key assignments and the second key assignments are carried out logical process include but not
Be only limitted to the XOR treatment of step S221, can also be with logical process or logical process or
The logical process modes such as same or logical process.
Specifically, can be by judging the value of request type and entering what debugging mode was asked in step S22
Whether value is equal to judge whether request type is into debugging mode request, and when the value of request type
When equal with the value for entering debugging mode request, judge that request type is into debugging mode request.Into
Step S23.
S23, if it is, control eMMC enters debugging mode.
Specifically, it can be to open eMMC firmwares that step S23 controls eMMC enters debugging mode
Back door.Wherein, step S23 control eMMC enter debugging mode after, can enter step S24,
Step S27 or step S210.
S24, the second write order sent by eMMC Receiving Hosts；Second write order includes present count
According to frame, preset data frame also includes writing the size of initial address, data to be written and data to be written.
Wherein, the second write order is general write order, and preset data frame is the second write order in data transfer
The first frame data when being transmitted on circuit, write the size of initial address, data to be written and data to be written pre-
If byte number in data frame can need be configured according to practical application, the size of data to be written can be with
In units of byte.
S25, judges whether request type is write data requests.
Specifically, in step S25 can by judge the value of request type and write data requests value whether
It is equal to judge whether request type is write data requests, and when the value and write data requests of request type
Value it is equal when, judge that request type is write data requests.Into step S26.
S26, if it is, data to be written are write into eMMC according to the size for writing initial address and data to be written
In.
Wherein, step S26 writes in eMMC by writing initial address and data to be written data to be written
In the memory space that size determines.
S27, the 3rd write order sent by eMMC Receiving Hosts；3rd write order includes present count
According to frame, preset data frame also includes reading initial address and the size of the data that continue.
Wherein, the 3rd write order is general write order, and preset data frame is the 3rd write order in data transfer
The first frame data when being transmitted on circuit, read initial address and the size of the data that continue is in preset data frame
Byte number can be needed be configured according to practical application, the size of the data that continue can be with byte for singly
Position.
S28, judges whether request type is read data request.
Specifically, in step S28 can by judge the value of request type and read data request value whether
It is equal to judge whether request type is read data request, and when the value and read data request of request type
Value it is equal when, judge that request type is read data request.Into step S29.
S29, if it is, the size according to reading initial address and the data that continue reads from eMMC and continues
Data.
Wherein, the data that continue are by reading initial address and the depositing of determining of size of the data that continue in eMMC
Data in storage space.
S210, the 4th write order sent by eMMC Receiving Hosts；4th write order includes default
Data frame, preset data frame also includes the size of erasing initial address and data to be erased.
Wherein, the 4th write order is general write order, and preset data frame is the 4th write order in data transfer
The size of the first frame data when being transmitted on circuit, erasing initial address and data to be erased is in preset data
Byte number in frame can need to be configured according to practical application, and the size of data to be erased can be with word
It is unit to save.
S211, judges whether request type is erasing request of data.
Specifically, can be by judging the value of request type and the value of erasing request of data in step S211
Whether it is equal come judge request type whether be erasing request of data, and when request type value with erasing
When the value of request of data is equal, judge that request type is erasing request of data.Into step S212.
S212, if it is, the size according to erasing initial address and data to be erased is wiped from eMMC
Except data to be erased.
Wherein, data to be erased are true by the size of erasing initial address and data to be erased in eMMC
Data in fixed memory space.
S213, the 5th write order sent by eMMC Receiving Hosts；5th write order includes default
Data frame.
Wherein, the 5th write order is general write order, and preset data frame is the 5th write order in data transfer
The first frame data when being transmitted on circuit.
S214, judges whether request type is to exit debugging mode request.
Specifically, can be by judging that the value of request type is asked with debugging mode is exited in step S214
Value it is whether equal judge whether request type is to exit debugging mode request, and when request type
When being worth equal with the value for exiting debugging mode request, request type is judged to exit debugging mode request.Enter
Enter step S215.
S215, control eMMC exits debugging mode.
Specifically, it can be to close eMMC firmwares that step S215 controls eMMC exits debugging mode
Back door.
Specifically, tuner can be according to debugging demand, by dd orders or uboot or other application
Programme-control main frame sends corresponding write order.Wherein, if debugging demand is to enter debugging mode, control
Main frame processed sends the first write order；If debugging demand is to write data, control main frame sends the second write order；
If debugging demand is to read data, control main frame sends the 3rd write order；If debugging demand is erasing data,
Then control main frame sends the 4th write order；If debugging demand is to exit debugging mode, control main frame sends
5th write order.If in addition, debugging demand asks to read P/EC, reads Mapping Table requests, reads
Flash ID requests, reading DBT requests etc., tuner equally only needs control main frame to send corresponding write order.
In one particular embodiment of the present invention, preset data frame is as shown in figure 3, preset data frame
Parameter successively include identification code, the first key assignments, the second key assignments, message authentication codes, request type, reading/
Write/erase except initial address, continue/write/erase is except the size of data, data to be written and byte of padding.Wherein,
Identification code, the first key assignments, the second key assignments, message authentication codes, request type, read/write initial address and treat
Byte number of the size of/read-write data in preset data frame is respectively 4 bytes, and data to be written are in present count
It is 256 bytes according to the byte number in frame, byte number of the byte of padding in preset data frame is 228 bytes,
Byte of padding permission preset data frame can increase new parameter, so as to extend the use model of preset data frame
Enclose.
It is pre- in the first write order that step S21 is sent by main frame when debugging demand is to enter debugging mode
If data frame can be as shown in Figure 4.Wherein, identification code is that 0x06020507, the first key assignments are
0x5A5A5A5A, the second key assignments are 0xFFFFFFFF, message authentication codes are 0xA5A5A5A5, ask
It is 0x00000055 to seek type.First, step S22 judges whether identification code is equal to default ID,
If identification code is not equal to default ID, step S22 judges that the first write order is ordinary write command.If knowing
Other code is equal to default ID, and step S22 carries out XOR treatment to the first key assignments and the second key assignments,
And judge whether XOR result is equal with message authentication codes, if XOR result and letter
Breath identifying code is unequal, and step S22 judges that the first write order is ordinary write command.If XOR treatment
Result is equal with message authentication codes, and step S22 judges that the first write order is debugging mode write order.And then
Step S22 judges whether the value asked into debugging mode is 0x00000055, if it is, step S23
Control eMMC enters debugging mode.
Under debugging mode, if debugging demand is in writing data to eMMC
At RAM (Random-Access Memory, random access memory) address 0xfff20000, then enter
Preset data frame can be such as Fig. 5 institutes in the second write order that step S24, step S24 are sent by main frame
Show.Wherein, request type is 0x00000001, writes initial address for 0xFFF20000, data to be written
Size be 0x00000100 bytes, data to be written be 0x00 ... 0029, step S25 judge write number
Whether it is 0x00000001 according to the value of request, if it is, step S26 writes 0x00 ... 0029
In the memory space determined by the size for writing initial address and data to be written in eMMC.
It is to enter step S213 if exiting debugging mode if debugging demand under debugging mode.Step S213
Can be as shown in Figure 6 by preset data frame in the 5th write order that main frame sends.Wherein, request type
It is 0x000000AA, whether the value that step S214 judges to exit debugging mode request is 0x000000AA,
If it is, step S215 will control eMMC to exit debugging mode.
According to embodiments of the present invention two, after eMMC is connected with main frame, by eMMC Receiving Hosts
The first write order for sending, wherein, the first write order includes preset data frame, and preset data frame includes knowing
Other code, the first key assignments, the second key assignments, message authentication codes and request type, and then to the first key assignments and
Two key assignments carry out logical process, and when message authentication codes are equal with logical process result and identification code with it is default
When identification code is equal, judge whether request type is to be asked into debugging mode, and when request type is
When being asked into debugging mode, control eMMC enters debugging mode, and then is received according to eMMC
The second write order for sending of main frame write data to eMMC, or the main frame hair received according to eMMC
The 3rd write order for sending reads data from eMMC, or the main frame received according to eMMC send the 4th
Corresponding data in write order erasing eMMC, or the main frame received according to eMMC send the 5th
Write order control eMMC exits debugging mode etc..So as to realize allowing tuner to use general write order
Backstage is opened debugging mode and exits debugging mode on user platform, and allows tuner to use general reading
Write order carries out Writing/Reading/erasing data etc. on user platform, realizes carrying out the bad piece information of eMMC
Analysis, and need not remove eMMC, effectively prevent in eMMC demolishing process to failure in eMMC
The destruction of data.
It should be noted that the method for the unlatching eMMC back doors debugging of the embodiment of the present invention not only can be with
The firmware of eMMC is applied to, SD (Secure Digital Memory Card, peace can also be applied to
Full digital code card) card, SSD (Solid State Drive, solid state hard disc), UFS (Universal Flash
Storage, Common Flash Memory memory body) etc. storage device firmware.
It should be further stated that, for embodiment of the method, in order to be briefly described, therefore it is all stated
It is a series of combination of actions, but those skilled in the art should know that the embodiment of the present invention is not received
The limitation of described sequence of movement, because according to the embodiment of the present invention, some steps can use other
Order is carried out simultaneously.Secondly, those skilled in the art should also know, described in this description
Embodiment belongs to preferred embodiment, and involved action not necessarily embodiment of the present invention institute is necessary
's.
Embodiment three
Reference picture 7, shows a kind of knot of the device embodiment of unlatching eMMC back doors debugging of the invention
Structure block diagram, eMMC is connected with main frame, and the device for opening the debugging of eMMC back doors can include following mould
Block：
First receiver module 1, for the first write order sent by eMMC Receiving Hosts；First writes
Order includes preset data frame, and preset data frame includes identification code, the first key assignments, the second key assignments, information
Identifying code and request type.
First judge module 2, for carrying out logical process to the first key assignments and the second key assignments, and works as information
Identifying code is equal with logical process result and during identification code equal with default ID, judges that request type is
No is into debugging mode request.
First control module 3, for when request type be to control eMMC when being asked into debugging mode
Into debugging mode.
According to embodiments of the present invention three, after eMMC is connected with main frame, the first receiver module passes through
The first write order that eMMC Receiving Hosts send, wherein, the first write order includes preset data frame, in advance
If data frame includes identification code, the first key assignments, the second key assignments, message authentication codes and request type, and then
First judge module carries out logical process to the first key assignments and the second key assignments, and when message authentication codes and logic
Result is equal and during identification code equal with default ID, judges whether request type is into debugging
Mode request, and when request type is the first control module control when being asked into debugging mode
EMMC enters debugging mode.So as to realize allowing tuner to be opened on user platform using general write order
Backstage debugging is opened, and eMMC need not be removed, effectively prevent in eMMC demolishing process to eMMC
The destruction of middle fault data.
Example IV
Reference picture 8, shows another device embodiment for opening the debugging of eMMC back doors of the invention
Structured flowchart, eMMC is connected with main frame, and the device for opening the debugging of eMMC back doors can specifically include
Such as lower module：
First receiver module 81, for the first write order sent by eMMC Receiving Hosts；First
Write order includes preset data frame, and preset data frame includes identification code, the first key assignments, the second key assignments, letter
Breath identifying code and request type.
First judge module 82, for carrying out logical process to the first key assignments and the second key assignments, and works as information
Identifying code is equal with logical process result and during identification code equal with default ID, judges that request type is
No is into debugging mode request；Can include：
XOR processing unit 821, for carrying out XOR treatment to the first key assignments and the second key assignments.
First control module 83, for when request type be to control eMMC when being asked into debugging mode
Into debugging mode.
Second receiver module 84, for the second write order sent by eMMC Receiving Hosts；Second writes
Order includes preset data frame, and preset data frame also includes writing initial address, data to be written and data to be written
Size.
Second judge module 85, for judging whether request type is write data requests.
Data module 86 is write, for when request type is write data requests, initial address and being treated according to writing
The size of data is write by data to be written write-in eMMC.
3rd receiver module 87, for the 3rd write order sent by eMMC Receiving Hosts；3rd
Write order includes preset data frame, and preset data frame also includes reading initial address and the size of the data that continue.
3rd judge module 88, for judging whether request type is read data request.
Read data module 89, for when request type is read data request, according to reading initial address and to treat
The size for reading data reads the data that continue from eMMC.
4th receiver module 810, for the 4th write order sent by eMMC Receiving Hosts；4th
Write order include preset data frame, preset data frame also include erasing initial address and data to be erased it is big
It is small.
4th judge module 811, for judging whether request type is erasing request of data.
Data wipe module 812, for when request type is for erasing request of data, according to erasing starting
The size of address and data to be erased wipes data to be erased from eMMC.
5th receiver module 813, for the 5th write order sent by eMMC Receiving Hosts；5th
Write order includes preset data frame.
5th judge module 814, for judging whether request type is to exit debugging mode request.
Second control module 815, for when request type is asked to exit debugging mode, controlling eMMC
Exit debugging mode.
According to embodiments of the present invention four, after eMMC is connected with main frame, the first receiver module passes through
The first write order that eMMC Receiving Hosts send, wherein, the first write order includes preset data frame, in advance
If data frame includes identification code, the first key assignments, the second key assignments, message authentication codes and request type, and then
First judge module carries out logical process to the first key assignments and the second key assignments, and when message authentication codes and logic
Result is equal and during identification code equal with default ID, judges whether request type is into debugging
Mode request, and when request type is the first control module control when being asked into debugging mode
EMMC enters debugging mode, and then write that the main frame that data module receives according to eMMC sends the
Two write orders write data to eMMC, or read the main frame transmission that data module is received according to eMMC
3rd write order reads data, or the main frame hair that data erasing module is received according to eMMC from eMMC
Corresponding data in the 4th write order erasing eMMC for sending, or the second control module connects according to eMMC
The 5th write order control eMMC that the main frame for receiving sends exits debugging mode etc..So as to realize allowing
Tuner using general write order, open debugging mode and exit debugging mode by the backstage on user platform, and
Allow tuner carries out Writing/Reading/erasing data etc. using general read write command on user platform, and it is right to realize
The bad piece information of eMMC is analyzed, and need not remove eMMC, effectively prevent eMMC dismountings
During destruction to fault data in eMMC.
For device embodiment, because it is substantially similar to embodiment of the method, so the comparing of description
Simply, the relevent part can refer to the partial explaination of embodiments of method.
Each embodiment in this specification is described by the way of progressive, and each embodiment is stressed
Be all difference with other embodiment, between each embodiment identical similar part mutually referring to
.
It should be understood by those skilled in the art that, the embodiment of the embodiment of the present invention can be provided as method, dress
Put or computer program product.Therefore, the embodiment of the present invention can using complete hardware embodiment, completely
The form of the embodiment in terms of software implementation or combination software and hardware.And, the embodiment of the present invention
Can use can be situated between in one or more computers for wherein including computer usable program code with storage
The computer journey implemented in matter (including but not limited to magnetic disk storage, CD-ROM, optical memory etc.)
The form of sequence product.
The embodiment of the present invention is with reference to method according to embodiments of the present invention, terminal device (system) and meter
The flow chart and/or block diagram of calculation machine program product is described.It should be understood that can be by computer program instructions
Realize each flow and/or square frame and flow chart and/or the square frame in flow chart and/or block diagram
The combination of flow and/or square frame in figure.Can provide these computer program instructions to all-purpose computer,
The processor of special-purpose computer, Embedded Processor or other programmable data processing terminal equipments is producing
One machine so that by the computing device of computer or other programmable data processing terminal equipments
Instruction produce for realizing in one flow of flow chart or multiple one square frame of flow and/or block diagram or
The device of the function of being specified in multiple square frames.
These computer program instructions may be alternatively stored in can guide computer or other programmable datas to process
In the computer-readable memory that terminal device works in a specific way so that storage is in the computer-readable
Instruction in memory is produced and includes the manufacture of command device, and command device realization is in flow chart one
The function of being specified in flow or multiple one square frame of flow and/or block diagram or multiple square frames.
These computer program instructions can also be loaded into computer or other programmable data processing terminals set
It is standby upper so that execution series of operation steps is in terms of producing on computer or other programmable terminal equipments
The treatment that calculation machine is realized, so as to the instruction performed on computer or other programmable terminal equipments provides use
In realization in one flow of flow chart or multiple one square frame of flow and/or block diagram or multiple square frames
The step of function of specifying.
Although having been described for the preferred embodiment of the embodiment of the present invention, those skilled in the art are once
Basic creative concept is known, then other change and modification can be made to these embodiments.So,
Appended claims are intended to be construed to include preferred embodiment and fall into the institute of range of embodiment of the invention
Have altered and change.
Finally, in addition it is also necessary to explanation, herein, such as first and second or the like relational terms
It is used merely to make a distinction an entity or operation with another entity or operation, and not necessarily requires
Or imply between these entities or operation there is any this actual relation or order.And, art
Language " including ", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion so that
Process, method, article or terminal device including a series of key elements not only include those key elements, and
Also include other key elements for being not expressly set out, or also include for this process, method, article or
The intrinsic key element of person's terminal device.In the absence of more restrictions, by sentence " including
It is individual ... " limit key element, it is not excluded that at the process including the key element, method, article or end
Also there is other identical element in end equipment.
Method to a kind of unlatching eMMC back doors debugging provided by the present invention and a kind of unlatching above
The device of eMMC back doors debugging, is described in detail, and specific case used herein is to the present invention
Principle and implementation method be set forth, the explanation of above example is only intended to help and understands the present invention
Method and its core concept；Simultaneously for those of ordinary skill in the art, according to think of of the invention
Think, will change in specific embodiments and applications, in sum, in this specification
Appearance should not be construed as limiting the invention.
Claims (12)
1. a kind of method that unlatching eMMC back doors are debugged, it is characterised in that the eMMC and main frame
It is connected, the method for the unlatching eMMC back doors debugging is comprised the following steps：
The first write order that the main frame sends is received by the eMMC；The first write order bag
Preset data frame is included, the preset data frame includes that identification code, the first key assignments, the second key assignments, information are tested
Card code and request type；
Carry out logical process to first key assignments and second key assignments, and when described information identifying code with
Logical process result is equal and during the identification code equal with default ID, judges that the request type is
No is into debugging mode request；
If it is, controlling the eMMC to enter debugging mode.
2. method according to claim 1, it is characterised in that enter in the eMMC and debug
After pattern, also include：
The second write order that the main frame sends is received by the eMMC；The second write order bag
Include the preset data frame, the preset data frame also includes writing initial address, data to be written and described treats
Write the size of data；
Judge whether the request type is write data requests；
If it is, the data to be written are write according to the size for writing initial address and the data to be written
In entering the eMMC.
3. method according to claim 1, it is characterised in that enter in the eMMC and debug
After pattern, also include：
The 3rd write order that the main frame sends is received by the eMMC；The 3rd write order bag
The preset data frame is included, the preset data frame also includes reading initial address and the size of the data that continue；
Judge whether the request type is read data request；
If it is, the size according to the reading initial address and the data that continue is from the eMMC
Continue data described in reading.
4. method according to claim 1, it is characterised in that enter in the eMMC and debug
After pattern, also include：
The 4th write order that the main frame sends is received by the eMMC；The 4th write order bag
Include the preset data frame, the preset data frame also includes the big of erasing initial address and data to be erased
It is small；
Judge whether the request type is erasing request of data；
If it is, the size according to the erasing initial address and the data to be erased is from the eMMC
Middle erasing data to be erased.
5. method according to claim 1, it is characterised in that enter in the eMMC and debug
After pattern, also include：
The 5th write order that the main frame sends is received by the eMMC；The 5th write order bag
Include the preset data frame；
Judge whether the request type is to exit debugging mode request；
If it is, controlling the eMMC to exit the debugging mode.
6. method according to claim 1, it is characterised in that it is described to first key assignments and
Second key assignments carries out logical process to be included：
XOR treatment is carried out to first key assignments and second key assignments.
7. the device that a kind of unlatching eMMC back doors are debugged, it is characterised in that the eMMC and main frame
It is connected, the device of the unlatching eMMC back doors debugging includes：
First receiver module, for receiving the first write order that the main frame sends by the eMMC；
First write order include preset data frame, the preset data frame include identification code, the first key assignments,
Second key assignments, message authentication codes and request type；
First judge module, for carrying out logical process to first key assignments and second key assignments, and
When described information identifying code is equal with logical process result and the identification code is equal with default ID,
Judge whether the request type is into debugging mode request；
First control module, for when the request type be that control is described when being asked into debugging mode
EMMC enters debugging mode.
8. device according to claim 7, it is characterised in that after first control module,
Also include：
Second receiver module, for receiving the second write order that the main frame sends by the eMMC；
Second write order include the preset data frame, the preset data frame also include write initial address,
The size of data to be written and the data to be written；
Second judge module, for judging whether the request type is write data requests；
Data module is write, for when the request type is write data requests, starting point being write according to described
The size of location and the data to be written writes the data to be written in the eMMC.
9. device according to claim 7, it is characterised in that first control module it
Afterwards, also include：
3rd receiver module, for receiving the 3rd write order that the main frame sends by the eMMC；
3rd write order include the preset data frame, the preset data frame also include read initial address and
The size of the data that continue；
3rd judge module, for judging whether the request type is read data request；
Read data module, for when the request type is read data request, according to the reading starting point
The size of location and the data that continue continues data described in being read from the eMMC.
10. device according to claim 7, it is characterised in that first control module it
Afterwards, also include：
4th receiver module, for receiving the 4th write order that the main frame sends by the eMMC；
4th write order includes the preset data frame, and the preset data frame also includes erasing initial address
With the size of data to be erased；
4th judge module, for judging whether the request type is erasing request of data；
Data wipe module, for when the request type is for erasing request of data, according to the erasing
The size of initial address and the data to be erased wipes data to be erased from the eMMC.
11. devices according to claim 7, it is characterised in that first control module it
Afterwards, also include：
5th receiver module, for receiving the 5th write order that the main frame sends by the eMMC；
5th write order includes the preset data frame；
5th judge module, for judging whether the request type is to exit debugging mode request；
Second control module, for when the request type is asked to exit debugging mode, control to be described
EMMC exits the debugging mode.
12. devices according to claim 7, it is characterised in that first judge module includes：
XOR processing unit, for carrying out XOR to first key assignments and second key assignments
Treatment.
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| CN106935272B (en) | 2020-04-17 |
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