Disclosure of Invention
The technical problem to be solved by the invention is as follows: in view of the above-described existing problems, a plane transfer device is provided.
The technical scheme adopted by the invention is as follows: the utility model provides a plane transfer device, specifically includes mesa, lower mesa, movable bracing piece, first high frequency oscillation circuit, second high frequency oscillation circuit and brace table, it sets up on the brace table to go up the mesa, go up mesa and lower mesa parallel arrangement, go up the mesa and connect through movable bracing piece between the mesa down, it overlaps each other with mesa pressfitting down to go up the mesa, first high frequency oscillation circuit and second high frequency oscillation circuit set up in the brace table, the first resonance coil of first high frequency oscillation circuit sets up mesa down, the second resonance coil of second high frequency oscillation circuit sets up at last mesa, it is fashionable with lower mesa to go up the mesa first resonance coil and the overlapping of second resonance coil. When the upper table top and the lower table top are farthest away from each other, the upper table top and the lower table top are partially overlapped, and the upper table top and the lower table top are in a separated state.
Further, movable bracing piece is including first supporting shaft, second back shaft, third back shaft and the fourth back shaft that is parallel to each other, first supporting shaft, second back shaft, third back shaft and fourth back shaft are connected with two contralateral sides of last mesa and lower mesa, go up the mesa and when the mesa distance was furthest down, mesa was gone up to first supporting shaft, second back shaft, third back shaft and fourth back shaft perpendicular to.
Furthermore, one end of each of the first support shaft and the second support shaft is hinged to one end of each of two opposite sides of the upper table top, the other end of each of the first support shaft and the second support shaft is hinged to the non-end of each of two opposite sides of the lower table top, one end of each of the third support shaft and the fourth support shaft is hinged to the non-end of each of two opposite sides of the upper table top, the other end of each of the third support shaft and the fourth support shaft is hinged to one end of each of two opposite sides of the lower table top, and the first support shaft, the second support shaft, the third support shaft and the fourth support shaft can move within a range of 90 degrees along a hinge point at the hinge point.
Further, the upper surface of mesa has first recess down, first resonance coil sets up in first recess, the lower surface of going up the mesa has the second recess, second resonance coil sets up in the second recess.
Further, the first resonance coil and the second resonance coil are respectively adhered to the upper surface of the lower table top and the lower surface of the upper table top.
Further, the first high frequency oscillator circuit and the second high frequency oscillator circuit both employ a zero voltage switching circuit (ZVS).
Further, the zero-voltage switch circuit includes a power supply, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a first high-frequency coil, a first transistor, a second transistor, a third diode, a fourth diode, a first diode, a sixth diode, a second inductor, and a third inductor; the first end of first resistance and the first end of second inductance, the first end and the power positive pole of fourth resistance are connected, the second end of first resistance and the first end of second resistance, first diode second end, the first end of third diode, the G utmost point of first transistor are connected, the second end of second inductance and the first end of first high frequency coil, the first end of third inductance is connected, the second end of fourth resistance and the second end of third resistance, the first end of sixth diode, the second end of fourth diode, the G utmost point of second transistor are connected, the first end of first diode and the first end of third inductance, the second end of first electric capacity, the second end of first high frequency coil, the D utmost point of second transistor are connected, the second end of sixth diode and the second inductance lower extreme, the first end of first electric capacity, the first end of first high frequency coil, the D utmost point of first transistor are connected, the second end of second resistance, the second end of third diode, the S utmost point of first transistor, the second end of second electric capacity, the first end of first high frequency coil, the first end of first transistor, the D utmost point of first transistor are connected, wherein the follow current diode is connected to the resonant diode and the second end of second high frequency coil.
Further, the zero-voltage switch circuit further includes a protection circuit, the protection circuit is coupled between a power supply terminal and the first terminal of the first high-frequency coil, and includes a reference voltage generation circuit and a feedback loop, the reference voltage generation circuit includes a parallel circuit and a seventh resistor, the parallel circuit includes a seventh zener diode, an eighth resistor and a second capacitor connected in parallel, the first terminal of the parallel circuit is grounded, the second terminal of the parallel circuit is coupled to the first terminal of the seventh resistor, the feedback loop includes a third transistor, a first amplifier, a second amplifier and a ninth resistor, the first terminal of the third transistor is coupled to the power supply terminal, the second terminal of the third transistor is coupled to the first terminal of the first high-frequency coil, the control terminal of the third transistor is coupled to the output terminal of the first amplifier, the second input terminal of the first amplifier is coupled to the second terminal of the parallel circuit, the first input terminal of the first amplifier is coupled to the output terminal of the second amplifier, the input terminal of the second amplifier is coupled to the first terminal of the first high-frequency coil, the output terminal of the second amplifier is coupled to the ground, and the ninth resistor is coupled to the third transistor or the MOS transistor or the triode.
Further, the protection circuit further includes a resistor network, a comparator and a discharge path, the resistor network includes a tenth resistor, an eleventh resistor, a twelfth resistor and a thirteenth resistor, a first end of the tenth resistor is coupled to the power supply terminal, a second end of the tenth resistor is coupled to the eleventh resistor and then coupled to ground, a first end of the twelfth resistor is coupled to the power supply terminal, a second end of the twelfth resistor is coupled to the thirteenth resistor and then coupled to ground, a second end of the tenth resistor is coupled to a first input terminal of the comparator, a second end of the twelfth resistor is coupled to a second input terminal of the comparator, the discharge path includes an N-MOS transistor and a fourteenth resistor connected in series, an output terminal of the comparator is connected to a control terminal of the N-MOS transistor, a second terminal of the N-MOS transistor is coupled to ground, a first terminal of the N-MOS transistor is coupled to a first terminal of the fourteenth resistor, and a second terminal of the fourteenth resistor is coupled to a second input terminal of the first amplifier.
Further, the tenth resistor and the twelfth resistor are both matched resistors, the temperature coefficient of the eleventh resistor is greater than that of the thirteenth resistor, and the resistance value of the eleventh resistor is smaller than that of the thirteenth resistor at normal temperature.
In summary, due to the adoption of the technical scheme, the invention has the beneficial effects that: during transfer printing, the copper-clad plate is clamped between the upper table surface and the lower table surface, the temperature of the copper-clad plate is not changed in the heating process, the copper-clad plate is uniformly heated, the transfer printing can be completely carried out only once, and secondary transfer printing is avoided; meanwhile, the copper-clad plate between the upper table top and the lower table top is heated in an eddy current mode, heat dissipation in the heat conduction process is avoided, and energy conversion efficiency is improved.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings.
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not limit the invention.
As shown in fig. 1-2, a plane transfer printing apparatus specifically includes an upper table 5, a lower table 7, a movable support rod, a first high-frequency oscillator circuit, a second high-frequency oscillator circuit, and a support table 1, where the upper table 5 is disposed on the support table 1, the upper table 5 and the lower table 7 are disposed in parallel, the upper table 5 and the lower table 7 are connected by the movable support rod, the upper table 5 and the lower table 7 overlap each other when pressed, the upper table 5 and the lower table 7 are partially overlapped when the upper table 5 and the lower table 7 are farthest away from each other, the first high-frequency oscillator circuit and the second high-frequency oscillator circuit are disposed in the support table 1, the first resonant coil 3 of the first high-frequency oscillator circuit is disposed on the lower table 7, the second resonant coil 4 of the second high-frequency oscillator circuit is disposed on the upper table 5, and the second resonant coil 3 is overlapped when the upper table 5 and the lower table 7 are pressed. When transfer printing is needed, the upper table top 5 is pressed on the lower table top 7, the copper-clad plate 6 is placed, the first high-frequency oscillating circuit and the second high-frequency oscillating circuit resonate to enable the voltage of the first resonant coil 3 and the voltage of the second resonant coil 4 to change according to a sine rule, eddy current heat production is achieved when the copper-clad plate 6 is placed, and a pattern is transferred to the copper-clad plate 6; the adopted vortex generates heat uniformly, the temperature on the copper-clad plate 6 cannot change, and the complete transfer printing at one time is ensured; meanwhile, heat conduction media are not needed for vortex heat generation, and the capacity consumption is reduced.
Movable bracing piece is including first supporting shaft 8, second back shaft, third back shaft 9 and the fourth back shaft that is parallel to each other, first supporting shaft 8, second back shaft, third back shaft 9 and fourth back shaft are connected with two contralateral sides of last mesa 5 and lower mesa 7, go up mesa 5 and when 7 distances of lower mesa are furthest, mesa is gone up to first supporting shaft 8, second back shaft, third back shaft 9 and fourth back shaft perpendicular to. The movable supporting rods can enable the upper table top 5 and the lower table top 7 to be flexibly in a pressing state and a separated partial overlapping state, and the movable supporting rods are realized only by adopting four supporting shafts, so that the structure is simple and flexible.
One end of the first support shaft 8 and one end of the second support shaft are respectively hinged to one end of two opposite sides of the upper table top 5, the other end of the first support shaft 8 and the other end of the second support shaft are respectively hinged to non-end portions of two opposite sides of the lower table top 7, one end of the third support shaft 9 and one end of the fourth support shaft are respectively hinged to non-end portions of two opposite sides of the upper table top 5, the other end of the third support shaft 9 and the other end of the fourth support shaft are respectively hinged to one portion of two opposite sides of the lower table top 7, the hinging is achieved through the bearing 2, and the first support shaft 8, the second support shaft, the third support shaft 9 and the fourth support shaft can move within a range of 90 degrees along a hinge point of the hinge point. The hinge joint of the embodiment is realized through a bearing, the upper table top 5 and the lower table top 7 can be pressed or separated, and when the upper table top 5 moves relative to the lower table top 7, the first support shaft 8, the second support shaft and the third support shaft 9 form an angle of 0-90 degrees with the upper table top 5 or the lower table top 7.
The upper surface of mesa 7 has first recess down, first resonance coil 3 sets up in first recess, the lower surface of last mesa 5 has the second recess, second resonance coil 4 sets up in the second recess.
The first resonance coil 3 and the second resonance coil 4 are adhered to the upper surface of the lower stage 7 and the lower surface of the upper stage 5, respectively.
The first high-frequency oscillating circuit and the second high-frequency oscillating circuit adopt a zero-voltage switching circuit (ZVS).
The zero-voltage switching circuit 200 includes a power supply, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, a first high-frequency coil L1, a first transistor Q1, a second transistor Q2, a third diode D3, a fourth diode D4, a first diode D1, a sixth diode D6, a second inductor L2, and a third inductor L3; a first end of the first resistor R1 is connected with a first end of a second inductor L2, a first end of a fourth resistor R4 and a power supply anode, a second end of the first resistor R1 is connected with a first end of the second resistor R2, a second end of a first diode D1, a first end of a third diode D3 and a G electrode of the first transistor Q1, a second end of the second inductor L2 is connected with a first end of the first high-frequency coil L1 and a first end of the third inductor L3, a second end of the fourth resistor R4 is connected with a second end of the third resistor R3, a first end of a sixth diode D6, a second end of the fourth diode D4 and a G electrode of the second transistor Q2, the first end of the first diode D1 is connected to the first end of the third inductor L3, the second end of the first capacitor C1, the second end of the first high-frequency coil L1, and the D-pole of the second transistor Q2, the second end of the sixth diode D6 is connected to the lower end of the second inductor L2, the first end of the first capacitor C1, the first end of the first high-frequency coil L1, and the D-pole of the first transistor Q1, the second end of the second resistor R2, the second end of the third diode D3, the S-pole of the first transistor Q1, the second end of the second diode D2, the first end of the third resistor R3, the first end of the fourth diode D4, the S-pole of the second transistor Q2, and the first end of the fifth diode D5 are connected to a power ground, wherein the second inductor L2 and the third inductor L3 are freewheeling inductors, and the first high-frequency coil L1 is a resonant coil. The third diode D3 and the fourth diode D4 are voltage stabilizing diodes, and the first diode D1 and the sixth diode D6 are fast recovery diodes. When the supply voltage is applied to VCC, current starts to flow through both primary sides and is applied to the drains of the first transistor Q1 and the second transistor Q2, i.e., the D-stage. A voltage will simultaneously appear on the gates, i.e., G, of the first transistor Q1 and the second transistor Q2 and begin to turn on the first transistor Q1 and the second transistor Q2. Because no two components are identical, with one transistor, e.g., the first transistor Q1, being on faster than the other second transistor Q2, more current will flow through the first transistor Q1. The current through the second inductor L2 on the turn-on side pulls the G-voltage of the second transistor Q2 on the other side low and starts to turn it off. At this time, a current exists in the third inductor L3 connected to the second transistor Q2, and since the current in the third inductor L3 cannot change suddenly, a high potential is generated at this time and reaches the first end of the first transistor Q1 through the first high-frequency coil L1, the second transistor Q2 which is turned off due to the turn-on of the first transistor Q1 is turned on again by the high potential generated by the third inductor L3, and at this time, the first transistor Q1 is turned off, and then the second inductor L2 generates a high potential and exists in the current, so that high-frequency oscillation is formed repeatedly. Therefore, the first capacitor C1 and the first high-frequency coil L1, i.e., the resonance coil, undergo LC resonance and cause the voltage to vary sinusoidally.
As shown in fig. 4, the zero-voltage switching circuit 300 according to an embodiment of the invention is configured schematically, and compared with the zero-voltage switching circuit 200 shown in fig. 3, the zero-voltage switching circuit 200 further includes a protection circuit 400, as shown in fig. 5, the protection circuit 400 is coupled between the power supply terminal and the first terminal of the first high-frequency coil L1, and includes a reference voltage generating circuit and a feedback loop, the reference voltage generating circuit includes a parallel circuit and a seventh resistor R7, the parallel circuit includes a seventh zener diode D7, an eighth resistor R8 and a second capacitor C2 connected in parallel, the first terminal of the parallel circuit is grounded, the second terminal of the parallel circuit is coupled to the first terminal of the seventh resistor R7, the second terminal of the seventh resistor R7 is coupled to the power supply terminal VCC, the feedback loop comprises a third transistor Q3, a first amplifier AM1, a second amplifier AM2 and a ninth resistor R9, wherein a first end of the third transistor Q3 is coupled to the power supply terminal VCC, a second end of the third transistor Q3 is coupled to a first end of the first high-frequency coil L1, a control end of the third transistor Q3 is coupled to an output end of the first amplifier AM1, a second end of the first amplifier AM1 is coupled to a second end of the parallel circuit, a first input end of the first amplifier AM1 is coupled to an output end of the second amplifier AM2, an input end of the second amplifier AM2 is coupled to a first end of the first high-frequency coil L1, an output end of the second amplifier AM2 is coupled to the ground after being coupled to the ninth resistor R9, the third transistor Q3 is a field effect transistor or an MOS transistor or a triode, and the MOS transistor is preferably a P-channel MOS transistor. The reference voltage generating circuit generates a reference voltage VREF, and the current of the third transistor Q3 limits the current value determined by the reference voltage VREF, the ninth resistor R9, and the like. The second amplifier AM2 is a current amplifier, measures the current of the third transistor Q3, the amplification factor is set to a, the output end of the second amplifier AM2 is connected to the ninth resistor R9, and the voltage at one end of the ninth resistor R9 can be represented as
VR9=A*IQ3*R9 (1)
Wherein IQ3 is the current of the third transistor Q3, and R9 is the resistance of the ninth resistor. In a steady state, the voltage of the second input terminal of the first amplifier AM1 is fixed to the reference voltage VREF, the voltage of the input terminal of the second amplifier AM2 varies with the current of the third transistor Q3 and is smaller than the reference voltage VREF of the first terminal of the first amplifier AM1, and the third transistor Q3 maintains the minimum on-resistance. When the current IQ3 of the third transistor Q3 increases due to circuit failure or the like, the voltage of the first input terminal of the first amplifier AM1 also starts to increase and gradually approaches the reference voltage VREF according to the formula (1), and the voltage of the output terminal of the first amplifier AM1 also increases the on-resistance of the third transistor Q3, thereby stabilizing the maximum current of the third transistor Q3 at the maximum
IQ3=VREF/(A*R9) (2)
During the system shutdown process, the eighth resistor R8 discharges the second capacitor C2, and the voltage on the second capacitor C2 is 0. After the system is powered on, the power supply terminal VCC charges the second capacitor C2 through the seventh resistor R7, so that the voltage on the second capacitor C2 gradually increases from 0 to the reference voltage VREF. According to formula 2, the current IQ3 of the third transistor Q3 also gradually increases from 0 to VREF/(a × R9). That is, the protection circuit 400 shown in fig. 4 can not only protect an overcurrent during operation but also soft start a device during start-up. The protection circuit 400 has soft start and overcurrent protection functions, and can prevent the zero-voltage switch circuit 300 from being burnt out due to overlarge current in the starting process or operation process.
The protection circuit 400 further includes a resistor network, a comparator, and a discharge path DS, and is denoted as the protection circuit 500, the resistor network includes a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, and a thirteenth resistor R13, a first end of the tenth resistor R10 is coupled to the power supply terminal VCC, a second end of the tenth resistor R10 is coupled to the eleventh resistor R11 and is coupled to the ground, a first end of the twelfth resistor R12 is coupled to the power supply terminal VCC, a second end of the twelfth resistor R12 is coupled to the thirteenth resistor R13 and is then coupled to the ground, a second end of the tenth resistor R10 is coupled to the first input terminal of the comparator CM1, a second end of the twelfth resistor R12 is coupled to the second input terminal of the comparator CM1, the discharge path DS includes an N-MOS transistor and a fourteenth resistor R14 connected in series, an output terminal of the comparator CM1 is connected to a control terminal of the N-MOS transistor, a second end of the N-MOS transistor is coupled to the ground, a first end of the N-MOS transistor is coupled to the first terminal of the fourteenth resistor R14, and a second end of the fourteenth resistor R1 is coupled to the second input terminal of the AM amplifier. The resistor network reduces the influence of power supply fluctuations on the protection circuit 500, and the discharge path DS is used to discharge the second capacitor C2.
In one embodiment, the tenth resistor R10 and the twelfth resistor R12 are matched resistors with equal resistance values (with the same temperature characteristics), and the temperature coefficient of the eleventh resistor R11 is greater than the temperature coefficient of the thirteenth resistor R13, that is, the resistance value increasing characteristic of the eleventh resistor R11 is more obvious when the temperature increases. At normal temperature, the resistance of the eleventh resistor R11 is slightly smaller than that of the thirteenth resistor R13 to ensure that the comparator CM1 outputs a low level, and the discharge path DS remains closed, i.e., no influence is exerted on other circuits. When the temperature rises to the set temperature, since the resistance value of the eleventh resistor R11 increases more, the voltage of the first input terminal of the comparator CM1 will exceed the voltage of the second input terminal thereof, the comparator CM1 will output a high level, the discharge path DS starts to discharge the second capacitor C2, and the voltage at the second input terminal of the first amplifier AM1 decreases.
According to the formula (2), since the voltage of the second input terminal of the first amplifier AM1 is decreased, the current IQ3 passing through the third transistor Q3 is also gradually decreased, so that the device temperature is decreased. As the temperature decreases, the voltage at the first input terminal of the comparator CM1 decreases due to the decrease of the resistance of the eleventh resistor R11, and when the temperature of the device decreases to be low enough, the comparator CM1 will flip to the low level again, and the discharge path DS is closed. Then, the power supply terminal VCC starts to charge the second capacitor C2 through the seventh resistor R7, the voltage of the second input terminal of the first amplifier AM1 rises, and the current IQ3 through the third transistor Q3 also starts to rise. For one embodiment, comparator CM1 may be a hysteretic comparator.
Fig. 7 shows a temperature regulation curve according to an embodiment of the present zero voltage switching circuit including the protection circuit 500, in which the horizontal axis is time (T) and the vertical axis is current (I). In the context of figure 7 of the drawings,
IC2=VC2/(A*R9) (3)
wherein VC2 is the voltage on the second capacitor C2. Assuming that the system is operating normally, the current of the third transistor Q3 is less than the maximum current of the system (i.e. the system current does not reach the maximum, VC2< VREF, IC2< VREF/(a × R9)). Assuming that the device temperature continues to increase due to the larger load current, at time T1, the device temperature reaches the set temperature, the discharge path DS starts to discharge the second capacitor C2, and the voltage VC2 on the second capacitor C2 starts to decrease. Since the device is not fully operated, i.e. the maximum value of the current IQ3 of the third transistor Q3 does not reach the maximum value, at the time T1 to T2, although the voltage VC2 on the second capacitor C2 gradually decreases, the current IQ3 on the third transistor Q3 does not decrease. When the time T2 begins, the voltage on the second capacitor C2 decreases to be small enough, the current IQ3 on the third transistor Q3 starts to decrease along with the voltage VC2 of the second capacitor C2, and the system temperature starts to decrease. At the time T3, the system temperature is decreased to a sufficiently low level, the comparator CM1 is turned to a low level, the discharging path DS stops discharging the second capacitor C2, the power supply terminal VCC starts to charge the second capacitor C2 through the seventh resistor R7, the first terminal voltage of the amplifier AM1 increases, and the current IQ3 through the third transistor Q3 also starts to increase. At time T4, current IQ3 through Q3 begins to return to a normal level. At time T5, the voltage VC2 of the second capacitor C2 returns to the maximum voltage VREF. It should be noted that, due to the inconsistent charging and discharging rates of the discharging path DS and the seventh resistor R7 to the second capacitor C2, the falling and rising rates of the current IQ3 on the third crystal Q3 may also be inconsistent.
As can be known from fig. 7, the protection circuit 500 shown in fig. 6 can make the temperature change smoothly within a certain range, rather than frequent switching on and off or sudden cooling and sudden heating. Therefore, people in the technical field can reasonably set the proportion of the tenth resistor R10, the eleventh resistor R11, the twelfth resistor R12 and the thirteenth resistor R13 to charge and discharge the second capacitor C2, so as to stabilize the temperature of the device within a certain range, thereby achieving the purpose of constant temperature. For example, between 280 and 300 degrees.
It should be noted that, according to the teachings of the present invention, the resistance values, the ratios and the temperature characteristics of the tenth resistor R10, the eleventh resistor R11, the twelfth resistor R12 and the thirteenth resistor R13 can be reasonably set by those skilled in the art to achieve the purpose of the present invention, for example, the temperature coefficient of the tenth resistor R10 is smaller than that of the twelfth resistor R12, but the eleventh resistor R11 is not necessarily set to have a higher temperature coefficient than that of the thirteenth resistor R13 as described in the embodiment. All without departing from the scope of protection of the present invention.
The invention is not limited to the foregoing embodiments. The invention extends to any novel feature or any novel combination of features disclosed in this specification, and to any novel method or process steps or any novel combination of steps disclosed. Those skilled in the art to which the invention pertains will appreciate that insubstantial changes or modifications can be made without departing from the spirit of the invention as defined by the appended claims.