CN106878706B - The method and apparatus of FPGA are controlled when laser television video signal transmission failure - Google Patents

The method and apparatus of FPGA are controlled when laser television video signal transmission failure Download PDF

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Publication number
CN106878706B
CN106878706B CN201710102703.9A CN201710102703A CN106878706B CN 106878706 B CN106878706 B CN 106878706B CN 201710102703 A CN201710102703 A CN 201710102703A CN 106878706 B CN106878706 B CN 106878706B
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receiving end
transmitting terminal
lock state
semaphore lock
timing information
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CN106878706A (en
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刘西富
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Hisense Visual Technology Co Ltd
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Qingdao Hisense Electronics Co Ltd
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Priority to CN201810708756.XA priority patent/CN108600747A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N17/00Diagnosis, testing or measuring for television systems or their details
    • H04N17/04Diagnosis, testing or measuring for television systems or their details for receivers
    • H04N17/045Self-contained testing apparatus
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N17/00Diagnosis, testing or measuring for television systems or their details
    • H04N17/04Diagnosis, testing or measuring for television systems or their details for receivers

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  • Engineering & Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • General Health & Medical Sciences (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Optical Communication System (AREA)

Abstract

The invention discloses the method and apparatus that FPGA is controlled when a kind of laser television video signal transmission failure, belong to video signal treatment technique field.The described method includes: carrying out reset operation to the receiving end when mistake occurs for the timing information that the semaphore lock state that the failure is the receiving end is abnormal or the receiving end parses the vision signal;When the semaphore lock state that the failure is the transmitting terminal is abnormal, reset operation is carried out to the transmitting terminal.Using the present invention, it can prevent laser television from persistently keeping the state of display mistake.

Description

The method and apparatus of FPGA are controlled when laser television video signal transmission failure
Technical field
The present invention relates to when a kind of video signal treatment technique field, in particular to laser television video signal transmission failure The method and apparatus for controlling FPGA.
Background technique
With the development of technology, laser television has obtained extensive popularization.Present laser television is in order to meet video counts A kind of VBO (V-By-One, video signal transmission standard) signal is all used according to the demand of transmission speed.
During laser television is shown, VBO signal can by SOC (System-On-Chip, system on chip), FRC (Frame Rate Conversion, block diagram of frame rate converter), FPGA (Field-Programmable Gate Array, scene Programmable gate array), the processing of the components such as DLP (Digital Light Processing, Digital Light Processor), then export Display.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems:
FPGA is not that very well, will cause the display such as blank screen, white screen, Hua Ping, ghost image sometimes to the Treatment Stability of VBO signal Mistake occurs.
Summary of the invention
In order to solve problems in the prior art, the embodiment of the invention provides a kind of laser television video signal transmission failures When control FPGA method and apparatus.The technical solution is as follows:
In a first aspect, a kind of method for controlling FPGA when providing laser television video signal transmission failure, the FPGA Receiving end and transmitting terminal formed vision signal transmission link, which comprises
When semaphore lock state that the failure is the receiving end is abnormal or the receiving end is to the vision signal When mistake occurs for the timing information parsed, reset operation is carried out to the receiving end;
When the semaphore lock state that the failure is the transmitting terminal is abnormal, reset behaviour is carried out to the transmitting terminal Make.
Optionally, it is described reset operation carried out to the receiving end after, further includes:
According to the semaphore lock state of receiving end described in preset cycle detection;
Judge that whether continuous the semaphore lock state of the receiving end N number of period be normal, if so, terminating to connect to described The detection of the semaphore lock state of receiving end if it is not, then controlling the receiving end carries out reset operation, and continues to test the reception The semaphore lock state at end;
The timing information that the vision signal is parsed according to receiving end described in preset cycle detection;
Judging the timing information, whether the continuous N period is correct, if so, terminating to the timing information Detection, if it is not, then controlling the receiving end carries out reset operation, and continue to test the receiving end semaphore lock state whether Normally;
Wherein, N and M is preset positive integer.
Optionally, the method also includes:
When semaphore lock state that the fault type is the receiving end is abnormal or the receiving end is to the video When the timing information errors that signal is parsed, controls the transmitting terminal and keep reset state;
After the end is to the detection of the timing information, controls the transmitting terminal and exit reset state.
Optionally, the control transmitting terminal exits after reset state, further includes:
According to the semaphore lock state of transmitting terminal described in preset cycle detection;
Judging the semaphore lock state of the transmitting terminal, whether the continuous P period is normal, if so, terminating to the hair The detection of the semaphore lock state of sending end if it is not, then controlling the transmitting terminal carries out reset operation, and continues to test the transmission The semaphore lock state at end;
Wherein, P is preset positive integer.
Optionally, it is described reset operation carried out to the transmitting terminal after, further includes:
According to the semaphore lock state of transmitting terminal described in preset cycle detection;
Judging the semaphore lock state of the transmitting terminal, whether the continuous P period is normal, if so, terminating to the hair The detection of the semaphore lock state of sending end if it is not, then controlling the transmitting terminal carries out reset operation, and continues to test the transmission The semaphore lock state at end;
Wherein, P is preset positive integer.
Second aspect controls the device of FPGA, the FPGA when providing a kind of laser television video signal transmission failure Receiving end and transmitting terminal form the transmission link of vision signal, described device includes:
First control module, for when semaphore lock state that the failure is the receiving end is abnormal or the reception When holding the timing information parsed to the vision signal that mistake occurs, reset operation is carried out to the receiving end;
Second control module, for when the failure be the transmitting terminal semaphore lock state it is abnormal when, to described Transmitting terminal carries out reset operation.
Optionally, first control module, is also used to:
After carrying out reset operation to the receiving end, according to the semaphore lock shape of receiving end described in preset cycle detection State;
Judge that whether continuous the semaphore lock state of the receiving end N number of period be normal, if so, terminating to connect to described The detection of the semaphore lock state of receiving end if it is not, then controlling the receiving end carries out reset operation, and continues to test the reception The semaphore lock state at end;
The timing information that the vision signal is parsed according to receiving end described in preset cycle detection;
Judging the timing information, whether the continuous N period is correct, if so, terminating to the timing information Detection, if it is not, then controlling the receiving end carries out reset operation, and continue to test the receiving end semaphore lock state whether Normally;
Wherein, N and M is preset positive integer.
Optionally, first control module, is also used to:
When semaphore lock state that the fault type is the receiving end is abnormal or the receiving end is to the video When the timing information errors that signal is parsed, controls the transmitting terminal and keep reset state;
After the end is to the detection of the timing information, controls the transmitting terminal and exit reset state.
Optionally, first control module, is also used to:
It controls the transmitting terminal to exit after reset state, according to the semaphore lock of transmitting terminal described in preset cycle detection State;
Judging the semaphore lock state of the transmitting terminal, whether the continuous P period is normal, if so, terminating to the hair The detection of the semaphore lock state of sending end if it is not, then controlling the transmitting terminal carries out reset operation, and continues to test the transmission The semaphore lock state at end;
Wherein, P is preset positive integer.
Optionally, second control module, is also used to:
After carrying out reset operation to the transmitting terminal, according to the semaphore lock shape of transmitting terminal described in preset cycle detection State;
Judging the semaphore lock state of the transmitting terminal, whether the continuous P period is normal, if so, terminating to the hair The detection of the semaphore lock state of sending end if it is not, then controlling the transmitting terminal carries out reset operation, and continues to test the transmission The semaphore lock state at end;
Wherein, P is preset positive integer.
Technical solution provided in an embodiment of the present invention has the benefit that
In the embodiment of the present invention, when failure be receiving end semaphore lock state is abnormal or receiving end to vision signal into When mistake occurs for the timing information that row parsing obtains, reset operation is carried out to receiving end;When the signal lock that failure is transmitting terminal Determine state it is abnormal when, reset operation is carried out to transmitting terminal.There is transmission fault in laser television and leads in processing in this way After causing display mistake, it can prevent laser television from persistently keeping the state of display mistake.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other Attached drawing.
Fig. 1 is a kind of structural schematic diagram of laser television provided in an embodiment of the present invention;
The method of FPGA is controlled when Fig. 2 is a kind of laser television video signal transmission failure provided in an embodiment of the present invention Flow diagram;
The method of FPGA is controlled when Fig. 3 is a kind of laser television video signal transmission failure provided in an embodiment of the present invention Flow diagram;
The method of FPGA is controlled when Fig. 4 is a kind of laser television video signal transmission failure provided in an embodiment of the present invention Flow diagram;
The device of FPGA is controlled when Fig. 5 is a kind of laser television video signal transmission failure provided in an embodiment of the present invention Structural schematic diagram.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention Formula is described in further detail.
The embodiment of the invention provides a kind of method that FPGA is controlled when laser television video signal transmission failure, this method It can be realized by laser television.Wherein, laser television may include memory, FPGA, FRC, SOC, display unit (DLP), The components such as the master controller of FPGA, equipment inner structure figure can be as shown in Figure 1.FPGA includes receiving end, transmitting terminal and signal Processing module, receiving end are also referred to as Rx (Receiver is received) module, and transmitting terminal is also referred to as Tx (Transmitter, hair Send) module, the transmission link of receiving end and transmitting terminal formation vision signal.Master controller can be used for the control to FPGA, example Such as, the Rx module of FPGA or Tx module are carried out resetting operation etc..Memory can be RAM (Random Access Memory, random access memory), Flash (flash memory) etc. can be used for needed for storing the data received, treatment process The data etc. generated in data, treatment process, such as a reference value of each information in timing information, the first preset duration, second pre- If duration, preset times threshold value etc..The different components of FPGA, FRC, SOC namely for video frequency signal processing.Display unit is The component that output is finally shown for vision signal, can be DLP, liquid crystal display etc..Laser television can also include transceiver unit, Input part, audio output part, audio input means etc..Transceiver unit can be used for carrying out data transmission with other equipment, Such as bluetooth component, WiFi (wireless fidelity, Wireless Fidelity) component etc..Input part can be touch screen, keyboard, Mouse etc..Audio output part can be speaker, earphone etc..Audio input means can be microphone etc..
The embodiment of the present invention by vision signal be VBO signal for carry out scheme detailed description, other situations with etc Seemingly, the present embodiment is not repeated.
The method that FPGA is controlled when laser television video signal transmission failure provided in an embodiment of the present invention, can be in laser TV completes starting up or completes the switching of different types of vision signal, and vision signal enter stable state after execute.It should The executing subject of method is the master controller of FPGA in laser television, which can be MCU (Microcontroller Unit, micro-control unit), for controlling FPGA.FPGA is responsible for the geometric correction and transmission work of projection signal, does not have Extra process resource carries out signal stabilization control to receiving end and transmitting terminal.So at this moment being controlled accordingly using MCU System.
As shown in Fig. 2, the process flow of this method may include following step:
Step 201, when detect in FPGA there is video signal transmission failure when, determine that video signal transmission failure is Kind failure.
Wherein, FPGA can be made of multiple gate-controlled components, be can be used for carrying out geometric correction to the image of display, made figure As view field and curtain region fit like a glove, to reach optimal display effect.Vision signal is before and after flowing through FPGA unit And during flowing through FPGA unit itself, failure may be sent, fault type may include: the semaphore lock shape of receiving end Timing (the letter for reflecting video signal pixels point quantity that state is abnormal, receiving end parses vision signal Breath) information errors, the semaphore lock state of transmitting terminal be abnormal.The semaphore lock state of receiving end can normally be referred to as Rx lock Fixed, the semaphore lock state of receiving end is abnormal to can be referred to as Rx losing lock.The semaphore lock state of transmitting terminal can normally be referred to as Tx Locking, the semaphore lock state of transmitting terminal is abnormal to can be referred to as Tx losing lock.
In an implementation, FPGA may include Rx module, signal processing module, Tx module, and signal processing module can be used for The parsing of vision signal, it is (effective that parsing obtains data-signal, synchronization signal, clk (clock) signal, DE signal in VBO signal Data strobe signal), timing information etc..FPGA can detecte whether Rx module occurs Rx losing lock, and detect signal processing mould Timing information errors whether occur in block, and detect whether Tx module occurs Tx losing lock.Rx losing lock can be used for reflecting Rx mould Block can not normally receive vision signal.Tx losing lock can be used for reflecting that DLP can not normally receive the video letter of FPGA transmission Number.Timing information may include Hactive (being shown displayed across pixel number) information, Htotal (lateral actual pixels points) letter Breath, Vactive (longitudinal display pixel points) information and Vtotal (longitudinal actual pixels points) information, it is to be appreciated that video Not all pixel is all shown in signal, so display pixel points are than few, the actual pixels point of actual pixels points Number is the pixel number actually possessed in vision signal, and display pixel points are the pixel numbers that can be shown.
In laser television, register can be set, FPGA is detecting that fault type is Rx losing lock, timing information After mistake or Tx losing lock, fault type can be recorded in a register.Meanwhile it can be sent to the master controller of laser television Interrupt signal, interrupt signal carry out repairing for video signal transmission failure for notifying master controller to stop current other work It is multiple.Master controller can inquire register after receiving interrupt signal, to determine fault type.
Optionally, after master controller, which receives FPGA, to be issued interrupt signal and confirm fault type, master controller can To carry out failure check based on fault type, if fault type is Rx losing lock, master controller can check whether that Rx, which occurs, to be lost Lock, if fault type is timing information errors, master controller, which can check whether, occurs timing information errors, if therefore Barrier type is Tx losing lock, and master controller, which can check whether, occurs Tx losing lock.Master controller is checked by failure, and confirmation FPGA is true It breaks down in fact, then can carry out step 202 below.If review result is not break down, illustrate what FPGA was issued Interrupt signal is false triggering, it may be possible to which the brief fluctuations of vision signal cause.
Optionally, it for the detection function of video signal transmission failure, can be opened and closed based on different situations, Correspondingly, can also be handled as follows before step 201: when detecting that vision signal is stablized after actuation, opening video The detection function of signal transmission fault.
In an implementation, after laser television starting, whether master controller can detecte signal stable, after signal stabilization, then Open the detection function of video signal transmission failure.It, can be with because laser television in startup stage jitter, is handled in this way Prevent the swinging of signal timing in startup stage from triggering interrupt processing repeatedly.Master controller detect signal it is whether stable when, can be with Detect whether if it happens Rx losing lock, timing information errors or Tx losing lock then can be determined that signal stabilization.
Optionally, certain detection ordering can be set for different error situations, it can be according to " Rx losing lock → timing The sequence of information errors → Tx losing lock " is detected, and corresponding detection process may is that the semaphore lock state of detection receiving end Whether normal, in the normal situation of semaphore lock state of receiving end, detection receiving end is parsed to obtain to vision signal Timing information it is whether correct, in the correct situation of timing information, whether just detect the semaphore lock state of transmitting terminal Often.Specific processing can be such that whether detection FPGA occurs Rx losing lock;In the state that Rx losing lock does not occur for FPGA, detection Whether FPGA occurs timing information errors;In the state that timing information errors do not occur for FPGA, whether detection FPGA is sent out Raw Tx losing lock.
In an implementation, FPGA can preferentially detect whether that Rx losing lock occurs.If Rx losing lock has occurred, can not continue Timing information errors and Tx losing lock are detected, and mistake is reported into master controller, if Rx losing lock does not occur, can be continued It detects whether that timing information errors occur.In case of timing information errors, then Tx losing lock can not be continued to test, and will Mistake reports to master controller, if timing information errors do not occur, can continue to test and Tx losing lock whether occurs.If Tx losing lock has occurred, then mistake can have been reported into master controller, if Tx losing lock does not occur, can be not processed.
Optionally, the whether normal processing mode of semaphore lock state for detecting receiving end can be such that work as and detect The locking signal of the Rx module of FPGA becomes high level, and when the duration of high level reaches the first preset duration, and determination connects The semaphore lock state of receiving end is abnormal;When detecting the locking signal of Rx module of FPGA is low level, alternatively, when detection Locking signal to the Rx module of FPGA becomes high level, and when the duration of high level is not up to the first preset duration, really The semaphore lock state for determining receiving end is normal.
In an implementation, there are multiple pins to be connected with each other between FPGA and FRC, wherein respectively there is a pin on FPGA and FRC For locking signal pin, the two pins are connected with each other, can be used for transmitting locking signal.Start or believe in laser television Number switching when, will do it handshake procedure between FPGA and FRC.During the handshake process, FRC can draw high locking signal, locking letter Number become high level, while FRC can be sent preset for shaking hands by the pin except locking signal pin to FPGA Data.After FPGA receives the data for shaking hands, if there is no problem for data, locking signal can be dragged down, locking signal Become low level.After FRC detects that locking signal is pulled low, then start to send vision signal to FPGA.Between SOC and FRC, Video signal transmission between FRC and FPGA, between FPGA and DLP can carry out handshake procedure in a manner mentioned above.
During subsequent FRC sends vision signal to FPGA, if Rx module does not receive vision signal, or do not solve Vision signal is precipitated, then locking signal can be drawn high, locking signal becomes high level at this time.FPGA, which works as, detects that locking signal becomes When for high level, then the duration of start recording high level then determines to occur when duration is more than the first preset duration Rx losing lock.When the duration of high level is not up to the first preset duration, FPGA can consider, and Rx losing lock does not occur, alternatively, When locking signal is low level, FPGA can consider, and Rx losing lock does not occur.Wherein, the first preset duration can be by technology Personnel are arbitrarily arranged according to actual needs, and such as 0.5 second.
Optionally, whether detection FPGA, which occurs the processing modes of timing information errors, can be such that according to predetermined period, Hactive information, the Htotal information, the correctness of Vactive information and Vtotal information in timing information are detected, and is united Count Hactive information, Htotal information, the corresponding continuous errors number of each information in Vactive information and Vtotal information; When that there are at least one information in Hactive information, Htotal information, Vactive information and Vtotal information is corresponding continuous When errors number reaches preset times threshold value, determine that timing information errors occur for FPGA;When Hactive information, Htotal believe When the corresponding continuous errors number of all information is all not up to preset times threshold value in breath, Vactive information and Vtotal information, Determine that timing information is correct.
In an implementation, FPGA can periodically detect Hactive information in timing information, Htotal information, The correctness of Vactive information and Vtotal information, and respectively correspond one continuous errors number of each Information Statistics, that is, it counts 4 continuous errors numbers.When every arrival a cycle, if Hactive information, Htotal information, Vactive information and There is mistake in any information in Vtotal information, then the continuous errors number of the information is added 1, for the letter not malfunctioned Breath, then by its corresponding continuous errors number clear 0.It is then possible to judge in 4 continuous errors numbers of statistics either with or without reaching Preset times threshold value reaches preset times threshold value if there is the corresponding continuous errors number of one or more information, then determines Timing information errors occur, if the corresponding continuous errors number of any information is all not up to preset times threshold value, it is determined that Timing information errors do not occur.
Optionally, can be set Hactive information under different display patterns, Htotal information, Vactive information and The a reference value of Vtotal information determines Hactive information, Htotal information, Vactive information and Vtotal by a reference value Whether information occurs mistake, and corresponding processing may include steps of:
Step 1 obtains the first current display pattern.
Wherein, display pattern may include 2D (two-dimensional, two dimension) mode, 3D (three- Dimensional, three-dimensional) mode (mode that can be watched by 3D eyes) etc..
In an implementation, display pattern can be set by user setting, or by laser television according to current vision signal automatically It sets.When executing the method for the embodiment of the present invention, the display pattern (i.e. the first display pattern) of available current setting.
Step 2, Hactive information according to the pre-stored data, Htotal information, Vactive information and Vtotal information The corresponding relationship of a reference value and display pattern determines Hactive information under the first display pattern, Htotal information, Vactive letter The a reference value of breath and Vtotal information.
In an implementation, laser television just set for it and has regarded under different display modes in production phase, technical staff The numerical value of the Hactive information of frequency signal, Htotal information, Vactive information and Vtotal information, normal vision signal is all Meet these numerical value, these numerical value may act as under different display modes Hactive information, Htotal information, The a reference value of Vactive information and Vtotal information.A reference value table can be set up in video output device, as shown in table 1.
Table 1
Display pattern Hactive information Htotal information Vactive information Vtotal information
2D mode 3840 4472 2160 2236
3D mode 1920 2180 1080 1146
It is corresponding can to search the first display pattern after obtaining the first current display pattern in a reference value table by FPGA Each a reference value.
Step 3, if a reference value under the current value of Hactive information and the first display pattern mismatches, it is determined that Mistake occurs for Hactive information, otherwise determines that mistake does not occur for Hactive information;If the current value of Htotal information and the A reference value under one display pattern mismatches, it is determined that mistake occurs for Htotal information, otherwise determines that Htotal information does not occur Mistake;If a reference value under the current value of Vactive information and the first display pattern mismatches, it is determined that Vactive information Mistake occurs, otherwise determines that mistake does not occur for Vactive information;If under the current value of Vtotal information and the first display pattern A reference value mismatch, it is determined that Vtotal information occur mistake, otherwise determine Vtotal information mistake does not occur.
In an implementation, in normal vision signal, Hactive information, Htotal information, Vactive information and The numerical value of Vtotal information is should be identical with corresponding a reference value, allows for lesser deviation.Due to swinging of signal Fixed reason, may be such that Hactive information, Htotal information, Vactive information and Vtotal information numerical value occur compared with Big deviation, if the difference of certain information current value and a reference value is more than preset threshold, it may be considered that the current value of the information It is mismatched with a reference value, and then determines that mistake occurs for the information.
Optionally, the whether normal processing mode of semaphore lock state for detecting transmitting terminal, which can be such that work as, detects Tx The locking signal of module becomes high level, and when the duration of high level reaches the second preset duration, determines the letter of transmitting terminal Number lock state is abnormal;When the locking signal for detecting Tx module is low level, alternatively, when the locking for detecting Tx module Signal becomes high level, and when the duration of high level is not up to the second preset duration, determines the semaphore lock shape of transmitting terminal State is normal.
In an implementation, there are multiple pins to be connected with each other between FPGA and DLP, wherein respectively there is a pin on FPGA and DLP For locking signal pin, the two pins are connected with each other, can be used for transmitting locking signal.Start or believe in laser television Number switching when, will do it handshake procedure between FPGA and DLP.During the handshake process, FPGA can draw high locking signal, locking letter Number become high level, while FPGA can be sent preset for shaking hands by the pin except locking signal pin to DLP Data.After DLP receives the data for shaking hands, if there is no problem for data, locking signal can be dragged down, locking signal is Become low level.After FPG detects that locking signal is pulled low, then start to send vision signal to DLP.
During subsequent FPGA sends vision signal to DLP, if the Rx module of DLP does not receive vision signal, Or do not parse vision signal, then locking signal can be drawn high, locking signal becomes high level at this time.FPGA, which works as, detects Tx mould When the locking signal of block becomes high level, then the duration of start recording high level, when duration is more than second default When long, then determine that Tx losing lock occurs.When the duration of high level is not up to the second preset duration, FPGA can consider and not send out Raw Tx losing lock, alternatively, FPGA can consider, and Tx losing lock does not occur when locking signal is low level.Wherein, second is default Duration can be arbitrarily arranged according to actual needs by technical staff, and such as 0.5 second.
Step 202, situation one, when failure be receiving end semaphore lock state is abnormal or receiving end to vision signal into When mistake occurs for the timing information that row parsing obtains, reset operation is carried out to receiving end;Situation two, when failure is transmitting terminal When semaphore lock state is abnormal, reset operation is carried out to transmitting terminal.
In an implementation, when fault type is Rx losing lock or timing information errors, master controller can control Rx module Carry out reset operation.When fault type is Tx losing lock, master controller can control Tx module and carry out reset operation.
When carrying out above-mentioned reset operation, some other operation processings can also be carried out according to the difference of fault type, Different explanations is carried out to above situation one and situation two separately below.
Situation one
Optionally, after carrying out reset operation to receiving end, it can also be handled as follows and guarantee that FPGA enters stable shape State: according to the semaphore lock state of preset cycle detection receiving end;Judge that whether continuous the semaphore lock state of receiving end is N number of Period is normal, if so, terminating to reset the detection of the semaphore lock state of receiving end if it is not, then controlling and receiving end Operation, and continue to test the semaphore lock state of receiving end;Vision signal is solved according to preset cycle detection receiving end Analyse obtained timing information;Judging timing information, whether the continuous N period is correct, if so, terminating to believe timing Whether just the detection of breath if it is not, then controlling and receiving end carries out reset operation, and continues to test the semaphore lock state of receiving end Often;Wherein, N and M is preset positive integer.
Specific processing can be as shown in figure 3, can also carry out such as after carrying out reset operation (step a0) to Rx module The processing of lower step a1-a5:
Whether step a1 occurs Rx losing lock according to preset cycle detection FPGA.
Step a2 carries out reset operation to Rx module again if detecting Rx losing lock.
Step a3 terminates the periodicity inspection to Rx losing lock if Rx losing lock is not detected within continuous N number of period It surveys, and timing information errors whether occurs according to preset cycle detection FPGA.
In an implementation, master controller is after confirmation fault type is Rx losing lock or timing information errors, to Rx module into Row resets operation, and hereafter after preset duration, whether master controller can occur Rx according to preset cycle detection FPGA Losing lock, specifically, determining that Rx losing lock occurs for FPGA when detecting that the locking signal of Rx module becomes high level.It is pre- that this is set It is because vision signal may be whithin a period of time and unstable after resetting operation, after preset duration just if duration Stable state can be entered, the state detected after this preset duration is just valuable.
Here the number that Rx losing lock does not occur continuously for a counter records can be set.If current period detects Rx not Losing lock, then count is incremented for counter, if Rx losing lock, counter clear 0, moreover, re-executeing the steps a0.When the meter of counter When number reaches N, it may be considered that the detection of Rx losing lock is normal, whether timing can occur according to preset cycle detection FPGA Information errors, specifically, detecting the Hactive information of timing information, Htotal information, Vactive information and Vtotal Mistake (mismatching with corresponding a reference value), which occurs, in any information in information can determine timing information errors.Detection The period of timing information errors and the period of detection Rx losing lock can be the same or different.
Step a4 carries out reset operation to Rx module again if detecting timing information errors.
Step a5 terminates if timing information errors are not detected within the continuous M period to timing information Mistake is periodically detected;Wherein, N and M is preset positive integer.
In an implementation, the number that timing information errors do not occur continuously for a counter records can be set here.Such as Fruit current period detects the non-mistake of timing information, then count is incremented for counter, if timing information errors, counter are clear 0, moreover, stopping being periodically detected timing information errors, it is re-execute the steps a0, and re-execute the steps a1-a5's Flow processing.When the counting of counter reaches M, it may be considered that the detection of timing information errors is normal.At this point it is possible into The other detections of row can also terminate detection and think that video signal transmission failure is repaired to finish such as the detection of Tx losing lock.
Optionally, when carrying out above-mentioned steps a1-a5 detection, Tx module can be placed in reset state, it is corresponding to handle May is that when fault type be receiving end semaphore lock state is abnormal or receiving end parses vision signal When timing information errors, control transmitting terminal keeps reset state;After terminating to the detection of timing information, control is sent Reset state is exited at end.
As shown in figure 3, specific processing can be such that the control when fault type is Rx losing lock or timing information errors Tx module processed enters and keeps reset state (step a0 ');After terminating to being periodically detected of timing information errors, control Tx module processed exits reset state (step a6).
Wherein, resetting operation is that certain component of control or equipment are introduced into the operation that reset state exits reset state again, multiple Position state is idle state.
In this way, main controller controls Tx module enters and protects when fault type is Rx losing lock or timing information errors Reset state is held, Tx module will not continue to work, then vision signal will not be transferred to subsequent component, so that figure will not be shown Picture.Step a0 ' can be executed before step a0.Because can't determine view when carrying out above-mentioned steps a1-a5 detection Whether frequency signal is stable, and if unstable, the image that laser television is shown can be the image of entanglement, and doing so can prevent Show the image of entanglement.After terminating to being periodically detected of timing information errors, it can determine that Rx module is normal, this When, control Tx module exits reset state.
Optionally, after control Tx module exits reset state, Tx module can also further be detected, phase The processing answered may is that the semaphore lock state according to preset cycle detection transmitting terminal;Judge the semaphore lock shape of transmitting terminal Whether the continuous P period is normal for state, if so, terminating the detection to the semaphore lock state of transmitting terminal, if it is not, then controlling hair Sending end carries out reset operation, and continues to test the semaphore lock state of transmitting terminal;Wherein, P is preset positive integer.
As shown in figure 3, specifically, can also include the processing of step a7-a9:
Whether step a7 occurs Tx losing lock according to preset cycle detection FPGA.
Step a8 terminates the periodicity inspection to Tx losing lock if Tx losing lock is not detected within the continuous P period It surveys.
Step a9 carries out reset operation to Tx module again if detecting Tx losing lock, and again according to preset week Phase detects whether the FPGA occurs Tx losing lock.
Wherein, P is preset positive integer.The numerical value of above-mentioned N, M, P can be arbitrarily arranged according to actual needs, and numerical value can be with It is identical to can also be different.
In an implementation, after control Tx module exits reset state, master controller can be according to preset cycle detection Whether FPGA occurs Tx losing lock.Here the number that Tx losing lock does not occur continuously for a counter records can be set.If current The non-losing lock of cycle detection Tx, then count is incremented for counter, if Tx losing lock, counter clear 0, moreover, being carried out again to Tx module Operation is resetted, and re-executes the flow processing of a7-a9.When the counting of counter reaches N, it may be considered that the inspection of Tx losing lock It surveys normal.It is finished at this point it is possible to terminate detection and think that video signal transmission failure is repaired.
Optionally, in the treatment process of above-mentioned a0-a9, if the operation that reset is repeated can not also solve to repair event Barrier, then can carry out the following processing: if occurred in the preset duration after video signal transmission failure in detecting FPGA, begin Do not occur the case where " continuously N number of period is normal for the semaphore lock state of receiving end " eventually, or does not occur " timing information always The continuous N period is correct " the case where, or do not occur " the semaphore lock state continuous P period of transmitting terminal is normal " always The case where, then issue preset alarm signal.
If there is above situation, illustrating to reset repeatedly also can not solve to repair failure, then can be determined that problem not Occur on FPGA, at this moment can issue alarm signal, such as alarm sound, alarm light.It, can be with after user has found alarm signal Restart laser television.
Situation two
Optionally, after carrying out reset operation to transmitting terminal, it can also be handled as follows and guarantee that FPGA enters stable shape State: according to the semaphore lock state of transmitting terminal described in preset cycle detection;Judge whether the semaphore lock state of transmitting terminal connects The continuous P period is normal, if so, terminating the detection to the semaphore lock state of transmitting terminal, if it is not, then controlling transmitting terminal progress Operation is resetted, and continues to test the semaphore lock state of transmitting terminal;Wherein, P is preset positive integer.
Specific processing can be as shown in figure 4, can also carry out such as after carrying out reset operation (step b0) to Tx module The processing of lower step b1-b3:
Whether step b1 occurs Tx losing lock according to preset cycle detection FPGA.
Step b2 carries out reset operation to Tx module again if detecting Tx losing lock.
Step b3 terminates the periodicity inspection to Tx losing lock if Tx losing lock is not detected within the continuous P period It surveys;Wherein, P is preset positive integer.
In an implementation, after carrying out reset operation to Tx module, whether can be sent out according to preset cycle detection FPGA Raw Tx losing lock.Here the number that Tx losing lock does not occur continuously for a counter records can be set.If current period detects Tx Non- losing lock, then count is incremented for counter, if Tx losing lock, counter clear 0, moreover, re-executing the flow processing of b0-b3.When When the counting of counter reaches N, it may be considered that the detection of Tx losing lock is normal.At this point it is possible to which terminating detection thinks vision signal Transmission fault is repaired to be finished.
It optionally,, can be with if restarting repeatedly can not also solve to repair failure in the treatment process of above-mentioned b0-b3 It carries out the following processing: if occurring not occurring always in the preset duration after video signal transmission failure in detecting FPGA The case where " the semaphore lock state continuous P period of transmitting terminal is normal ", then issue preset alarm signal.
If there is above situation, illustrating to restart repeatedly also can not solve to repair failure, then can be determined that problem not Occur on FPGA, at this moment can issue alarm signal, such as alarm sound, alarm light.It, can be with after user has found alarm signal Restart laser television.
It is above-mentioned after determining fault restoration, master controller can delete the letter of the fault type recorded in register Breath.
So far, the explanation of above situation one and situation two is finished.
Optionally, during carrying out fault restoration, master controller can not reprocess subsequent interrupt signal, accordingly Processing can be such that and occur video signal transmission failure in detecting FPGA after, close video signal transmission failure Detection function;When terminating the detection to the semaphore lock state of transmitting terminal, the detection of video signal transmission failure is reopened Function.
In an implementation, it after occurring video signal transmission failure in detecting FPGA, can set in a register Disconnected processing mark, closes the detection function of video signal transmission failure.When receiving interrupt signal again, if viewed Interrupt processing mark in register, then misalign break signal and handled.It is subsequent, terminating to be periodically detected Tx losing lock When, it can be confirmed that failure is repaired, the detection function of video signal transmission failure can be reopened at this time, remove register In interrupt processing mark and the information such as fault type.
In the embodiment of the present invention, when failure be receiving end semaphore lock state is abnormal or receiving end to vision signal into When mistake occurs for the timing information that row parsing obtains, reset operation is carried out to receiving end;When the signal lock that failure is transmitting terminal Determine state it is abnormal when, reset operation is carried out to transmitting terminal.There is transmission fault in laser television and leads in processing in this way After causing display mistake, it can prevent laser television from persistently keeping the state of display mistake.
Based on the same technical idea, the embodiment of the invention also provides when a kind of laser television video signal transmission failure The device of FPGA is controlled, the receiving end of FPGA and transmitting terminal form the transmission link of vision signal, as shown in figure 5, the device packet It includes:
First control module 510, it is abnormal or described for working as the semaphore lock state that the failure is the receiving end When mistake occurs for the timing information that receiving end parses the vision signal, reset behaviour is carried out to the receiving end Make;
Second control module 520, for when the failure be the transmitting terminal semaphore lock state it is abnormal when, to institute It states transmitting terminal and carries out reset operation.
Optionally, first control module 510, is also used to:
After carrying out reset operation to the receiving end, according to the semaphore lock shape of receiving end described in preset cycle detection State;
Judge that whether continuous the semaphore lock state of the receiving end N number of period be normal, if so, terminating to connect to described The detection of the semaphore lock state of receiving end if it is not, then controlling the receiving end carries out reset operation, and continues to test the reception The semaphore lock state at end;
The timing information that the vision signal is parsed according to receiving end described in preset cycle detection;
Judging the timing information, whether the continuous N period is correct, if so, terminating to the timing information Detection, if it is not, then controlling the receiving end carries out reset operation, and continue to test the receiving end semaphore lock state whether Normally;
Wherein, N and M is preset positive integer.
Optionally, first control module 510, is also used to:
When semaphore lock state that the fault type is the receiving end is abnormal or the receiving end is to the video When the timing information errors that signal is parsed, controls the transmitting terminal and keep reset state;
After the end is to the detection of the timing information, controls the transmitting terminal and exit reset state.
Optionally, first control module 510, is also used to:
It controls the transmitting terminal to exit after reset state, according to the semaphore lock of transmitting terminal described in preset cycle detection State;
Judging the semaphore lock state of the transmitting terminal, whether the continuous P period is normal, if so, terminating to the hair The detection of the semaphore lock state of sending end if it is not, then controlling the transmitting terminal carries out reset operation, and continues to test the transmission The semaphore lock state at end;
Wherein, P is preset positive integer.
Optionally, second control module 520, is also used to:
After carrying out reset operation to the transmitting terminal, according to the semaphore lock shape of transmitting terminal described in preset cycle detection State;
Judging the semaphore lock state of the transmitting terminal, whether the continuous P period is normal, if so, terminating to the hair The detection of the semaphore lock state of sending end if it is not, then controlling the transmitting terminal carries out reset operation, and continues to test the transmission The semaphore lock state at end;
Wherein, P is preset positive integer.
In the embodiment of the present invention, when failure be receiving end semaphore lock state is abnormal or receiving end to vision signal into When mistake occurs for the timing information that row parsing obtains, reset operation is carried out to receiving end;When the signal lock that failure is transmitting terminal Determine state it is abnormal when, reset operation is carried out to transmitting terminal.There is transmission fault in laser television and leads in processing in this way After causing display mistake, it can prevent laser television from persistently keeping the state of display mistake.
It should be understood that controlling the device of FPGA when laser television video signal transmission failure provided by the above embodiment When controlling FPGA, only the example of the division of the above functional modules, in practical application, it can according to need and incite somebody to action Above-mentioned function distribution is completed by different functional modules, i.e., the internal structure of device is divided into different functional modules, with complete At all or part of function described above.In addition, when laser television video signal transmission failure provided by the above embodiment The embodiment of the method for control FPGA belongs to same design when controlling the device and laser television video signal transmission failure of FPGA, Specific implementation process is detailed in embodiment of the method, and which is not described herein again.
Those of ordinary skill in the art will appreciate that realizing that all or part of the steps of above-described embodiment can pass through hardware It completes, relevant hardware can also be instructed to complete by program, the program can store in a kind of computer-readable In storage medium, storage medium mentioned above can be read-only memory, disk or CD etc..
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.

Claims (10)

1. controlling the method for FPGA when a kind of laser television video signal transmission failure, which is characterized in that the reception of the FPGA End and transmitting terminal form the transmission link of vision signal, which comprises
Whether the semaphore lock state for detecting the receiving end is normal, in the situation that the semaphore lock state of the receiving end is normal Under, whether correct, in the timing information if detecting the timing information that the receiving end parses vision signal In correct situation, whether the semaphore lock state for detecting the transmitting terminal is normal;
When semaphore lock state that the failure is the receiving end is abnormal or the receiving end carries out the vision signal When parsing obtained timing information generation mistake, reset operation is carried out to the receiving end;
When the semaphore lock state that the failure is the transmitting terminal is abnormal, reset operation is carried out to the transmitting terminal.
2. the method according to claim 1, wherein it is described reset operation is carried out to the receiving end after, also Include:
According to the semaphore lock state of receiving end described in preset cycle detection;
Judge that whether continuous the semaphore lock state of the receiving end N number of period be normal, if so, terminating to the receiving end Semaphore lock state detection, if it is not, then controlling the receiving end carries out reset operation, and continue to test the receiving end Semaphore lock state;
The timing information that the vision signal is parsed according to receiving end described in preset cycle detection;
Judging the timing information, whether the continuous N period is correct, if so, terminating the inspection to the timing information It surveys, if it is not, then controlling the receiving end carries out reset operation, and whether just to continue to test the semaphore lock state of the receiving end Often;
Wherein, N and M is preset positive integer.
3. according to the method described in claim 2, it is characterized in that, the method also includes:
When semaphore lock state that the fault type is the receiving end is abnormal or the receiving end is to the vision signal When the timing information errors parsed, controls the transmitting terminal and keep reset state;
After the end is to the detection of the timing information, controls the transmitting terminal and exit reset state.
4. according to the method described in claim 3, it is characterized in that, the control transmitting terminal exits after reset state, Further include:
According to the semaphore lock state of transmitting terminal described in preset cycle detection;
Judging the semaphore lock state of the transmitting terminal, whether the continuous P period is normal, if so, terminating to the transmitting terminal Semaphore lock state detection, if it is not, then controlling the transmitting terminal carries out reset operation, and continue to test the transmitting terminal Semaphore lock state;
Wherein, P is preset positive integer.
5. the method according to claim 1, wherein it is described reset operation is carried out to the transmitting terminal after, also Include:
According to the semaphore lock state of transmitting terminal described in preset cycle detection;
Judging the semaphore lock state of the transmitting terminal, whether the continuous P period is normal, if so, terminating to the transmitting terminal Semaphore lock state detection, if it is not, then controlling the transmitting terminal carries out reset operation, and continue to test the transmitting terminal Semaphore lock state;
Wherein, P is preset positive integer.
6. controlling the device of FPGA when a kind of laser television video signal transmission failure, which is characterized in that the reception of the FPGA End and transmitting terminal form the transmission link of vision signal, and described device includes:
Whether the first control module, the semaphore lock state for detecting the receiving end are normal, the signal in the receiving end In the normal situation of lock state, whether just timing information that the receiving end parses vision signal is detected Really, in the correct situation of timing information, whether the semaphore lock state for detecting the transmitting terminal is normal;When the event Barrier is that the semaphore lock state of the receiving end is abnormal or the receiving end parses the vision signal When mistake occurs for timing information, reset operation is carried out to the receiving end;
Second control module, for when the failure be the transmitting terminal semaphore lock state it is abnormal when, to the transmission End carries out reset operation.
7. device according to claim 6, which is characterized in that first control module is also used to:
After carrying out reset operation to the receiving end, according to the semaphore lock state of receiving end described in preset cycle detection;
Judge that whether continuous the semaphore lock state of the receiving end N number of period be normal, if so, terminating to the receiving end Semaphore lock state detection, if it is not, then controlling the receiving end carries out reset operation, and continue to test the receiving end Semaphore lock state;
The timing information that the vision signal is parsed according to receiving end described in preset cycle detection;
Judging the timing information, whether the continuous N period is correct, if so, terminating the inspection to the timing information It surveys, if it is not, then controlling the receiving end carries out reset operation, and whether just to continue to test the semaphore lock state of the receiving end Often;
Wherein, N and M is preset positive integer.
8. device according to claim 7, which is characterized in that first control module is also used to:
When semaphore lock state that the fault type is the receiving end is abnormal or the receiving end is to the vision signal When the timing information errors parsed, controls the transmitting terminal and keep reset state;
After the end is to the detection of the timing information, controls the transmitting terminal and exit reset state.
9. device according to claim 8, which is characterized in that first control module is also used to:
It controls the transmitting terminal to exit after reset state, according to the semaphore lock shape of transmitting terminal described in preset cycle detection State;
Judging the semaphore lock state of the transmitting terminal, whether the continuous P period is normal, if so, terminating to the transmitting terminal Semaphore lock state detection, if it is not, then controlling the transmitting terminal carries out reset operation, and continue to test the transmitting terminal Semaphore lock state;
Wherein, P is preset positive integer.
10. device according to claim 6, which is characterized in that second control module is also used to:
After carrying out reset operation to the transmitting terminal, according to the semaphore lock state of transmitting terminal described in preset cycle detection;
Judging the semaphore lock state of the transmitting terminal, whether the continuous P period is normal, if so, terminating to the transmitting terminal Semaphore lock state detection, if it is not, then controlling the transmitting terminal carries out reset operation, and continue to test the transmitting terminal Semaphore lock state;
Wherein, P is preset positive integer.
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