CN106878285A - A kind of communication means for being applied to antifuse device programming and test system - Google Patents
A kind of communication means for being applied to antifuse device programming and test system Download PDFInfo
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- CN106878285A CN106878285A CN201710032455.5A CN201710032455A CN106878285A CN 106878285 A CN106878285 A CN 106878285A CN 201710032455 A CN201710032455 A CN 201710032455A CN 106878285 A CN106878285 A CN 106878285A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/03—Protocol definition or specification
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/06—Notations for structuring of protocol data, e.g. abstract syntax notation one [ASN.1]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
- H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
- H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
- H04L69/329—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the application layer [OSI layer 7]
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- Computer Networks & Wireless Communication (AREA)
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Abstract
The invention belongs to communication application, it is related to a kind of communication means for being applied to antifuse device programming and test system, the software and hardware communication means of programming and test platform primarily directed to antifuse devices such as anti-fuse FPGA, antifuse PROM；Programming and test system include：To be programmed and test device, protocol process module, upper computer software, lower computer hardware；A kind of application layer communication protocol structure for being easy to build and parse, autgmentability is strong towards low complex degree application system is created, the transmission frame of communication protocol is constituted to be had：Protocol header, object coding, data, agreement tail；Communication transmission process between equipment is：Upper computer software is sent to a frame information lower computer hardware；Slave computer parsing is programmed and test command, data and object coding, device is programmed and test simultaneously feedback result to upper computer software；Upper computer software parses feedback information and is displayed in software interface, and analysis is programmed and test result, carries out next programming, test process.
Description
Technical field
The invention belongs to communication application, it is related to a kind of be applied to the logical of antifuse device programming and test system
Letter method, the software and hardware of programming and test platform primarily directed to antifuse devices such as anti-fuse FPGA, antifuse PROM leads to
Letter method.
Background technology
With developing rapidly for Computer Applied Technology and the software and hardware communication technology, it is upper that various communication protocols turn into connection
The important bridge of machine software and lower computer hardware.Communication protocol species is various, there is network communication protocol, serial communication protocol etc..
Each application field all releases the standard communication protocol of many general type, and procotol such as TCP/IP procotols, GPRS are wirelessly passed
Defeated agreement；Serial communication protocol such as RS232 agreements, RS485 agreements, I2C agreements, SPI protocol, CAN agreement etc..It is upper
Data can accurately be transmitted by these communication protocols rule transmission information between machine software and lower computer hardware.But this
A little agreements only provide the basic skills of transmission data, not the total solution of order and data parsing.
When upper computer software and lower computer hardware communicate in antifuse device programming and test system, often a kind of streaming
Transmission means, such as transmission of USB, the transmission of serial ports.But these transmission means only provide a passage for transmission, not
There is provided the function of equipment room interaction, it is impossible to meet the demand that we program and test to antifuse device.In practical application, it is necessary to
Application layer protocol is built on the level of the transport layer, realizes antifuse device programming and the software and hardware communication of test system.To low complex degree
For application system, according to general conventional complex communication agreement, complexity, high cost, efficiency are often designed low.For the above
Problem, it is necessary to propose a kind of new application layer protocol towards low complex degree application system.
The present invention provides a kind of semi-custom type application layer communication protocol and software and hardware communication means.Application layer protocol letter
Clean, scalability is strong, do not limited by physical layer communication agreement, using the agreement software and hardware communications applications system design simply,
Resource cost is few, low cost, efficiency high, can realize the low complex degree with antifuse device programming and test system as Typical Representative
The alternating transmission with data is ordered in application system between upper computer software and lower computer hardware.
The content of the invention
The technical problems to be solved by the invention are the application layer for providing a kind of antifuse device programming and test system
Communication protocol and software and hardware communication means so that upper computer software and lower computer hardware realize that function is interacted, and realize computer pair
The programming and test of antifuse device.
The present invention solves above-mentioned technical problem using following technical scheme：
Create a kind of application layer communication protocol for being easy to build and parse, autgmentability is strong towards low complex degree application system
Structure.The protocol architecture is used for the programming and survey of the antifuse device with anti-fuse FPGA, antifuse PROM as Typical Representative
In the software and hardware interaction of test system.
Antifuse device programming of the invention and test system include：It is to be programmed and test device, protocol process module, on
Position machine software, lower computer hardware.
The system is mainly the programming and test completed to antifuse devices such as anti-fuse FPGA, antifuse PROM, the next
Machine hardware can generally be realized by microcontroller or FPGA.Upper computer software sends programming and test life to lower computer hardware in system
Order, lower computer hardware performs the order to device programming and test and returns to the result of programming and test.Host computer is soft in system
Part and lower computer hardware have respective protocol process module, should be defined before communicating per frame traffic agreement, protocol process module
Complete the structure to every Frame Protocol and parsing.It is hard to slave computer that host computer builds each frame traffic agreement by protocol process module
Part sends programming and test command and data；Lower computer hardware parses the information for receiving by protocol process module, is programmed
And test command, object coding and data, device is programmed and is tested, and return to implementing result.
The transmission frame of application layer communication protocol of the invention is constituted to be had：Protocol header, object coding, data, agreement tail.
Protocol header means the beginning of a frame, and agreement tail means the ending of a frame, and protocol header and agreement tail combine to be formed
Programming and the success or not of test command, programming and test.The combination of protocol header and agreement tail has diversity, and standing order is only
Protocol header need to be analyzed, custom command need to simultaneously analyze protocol header and agreement tail；Object coding correspond to programming and test command
Different objects and hardware parameter so that order can both have been performed by multiple devices simultaneously, it is also possible to only be performed by device；
Data are the option of a frame information, the check code of interpolation data content and data in the information if data are used in order,
No data when only transmission is ordered.The data length fed back in programming and test process is indefinite, and protocol header and agreement tail ensure
To the judgement of data area in communication process, object coding ensures correct device and hardware parameter according to programming and test command
Perform.
Upper software and lower computer hardware generate, transmit and process programming and test life according to this communication protocol in system
Make, data and implementing result.Comprise the following steps：
Step one：The different programming of statistics and test command, determine protocol header and agreement tail bit wide, are various orders and volume
Journey and test result set protocol header and agreement tail；The device for counting every kind of command type performs object and hardware parameter number,
Determine object coding bit wide, be each object and its parameter setting object coding；Design upper computer software and lower computer hardware
Protocol process module, for building and parsing each frame traffic agreement；
Step 2：According to different programmings and test command, data bit width, the communication protocol processes of upper computer software are determined
The frame information of module construction one is sent to lower computer hardware；
Step 3：Lower computer hardware receives information, and the communication protocol processes module of slave computer parses a frame information, extracts
Object coding, order in information, data；
Step 4：Lower computer hardware performs programming and test command, and the device to meeting object coding is programmed and surveys
Examination.The communication protocol processes module of slave computer builds a frame information and is sent to host computer according to programming and test result；
Step 5：Upper computer software receives information, and the communication protocol processes module of upper computer software parses a frame information,
Programmed and test result；
Step 6：Upper computer software analysis programming and test result, repeat step two arrive step 5.
The present invention has following characteristics：
Simple structure, it is easy to automatic to build and parse, realizes the command interaction of programming and test system equipment room, can
It is programmed or tests for correct device, transmits the data of stabilization.It is easily achieved, resource cost is few, low cost, meets and compile
The communication of journey and test system；
Highly versatile, protocol format need not be changed for new order, need to only add newer command (modification protocol header or agreement
Tail)；Do not rely on specific physical layer transmission agreement, for new device and new parameter need not change physical layer communication agreement and
Physical layer communication module, only need to increase object coding；
Favorable expandability, agreement does not limit protocol header, agreement tail, object coding, the bit wide of data.When order, device increase
When, suitable bit wide is set according to demand for meeting the structure of agreement, the check code of data ensure that data with arbitrary length
Stabilization transmission.Every kind of order can be programmed and tested to multiple device objects simultaneously, it is also possible to just for a device object.It is right
For the protocol process module for having completed, only need to increase command definition, structure and process of analysis need not change.
Brief description of the drawings
In order to illustrate more clearly of the technical scheme in present example or the technology of the present invention, below will be to example or this hair
The accompanying drawing to be used needed for bright technology is briefly described.Drawings in the following description are some examples of the invention, for
For those of ordinary skill in the art, on the premise of not paying creative work, other can also be obtained according to these accompanying drawings
Accompanying drawing.
Fig. 1 is the frame structure schematic diagram of application layer communication protocol of the invention.
Fig. 2 is the frame example schematic diagram of application layer communication protocol of the invention.
Fig. 3 is the communication frame schematic diagram of antifuse PROM device programmings and test system application example.
Fig. 4 is the communication frame schematic diagram of anti-fuse FPGA device programming and test system application example.
Fig. 5 is the composition schematic diagram of antifuse device programming of the invention and test system.
Fig. 6 is the schematic diagram of communication transmission process of the invention.
Fig. 7 is the schematic diagram of anti-fuse FPGA test process.
Fig. 8 is the schematic diagram of anti-fuse FPGA hardware programming process.
Specific embodiment
To make the purpose, technical scheme and advantage of present example clearer, below in conjunction with present example
Accompanying drawing, is clearly and completely described to the technical scheme in present example, it is clear that described example is the present invention one
Certain embodiments, rather than whole examples.Based on the example in the present invention, those of ordinary skill in the art are not making creation
Property work under the premise of the every other example that is obtained, belong to the scope of protection of the invention.
Fig. 1 is the frame structure schematic diagram of application layer communication protocol of the invention.
This application layer communication protocol is the application layer protocol towards low complex degree application system, realizes upper computer software to anti-
The programming and test of the antifuse devices such as fuse FPGA, antifuse PROM.This communication protocol is the communication protocol of semi-custom, can be added
Plus custom command, device.One frame of this communication protocol has following several parts：
Protocol header, agreement tail：Each frame traffic agreement since protocol header, to agreement caudal knot beam, protocol header and agreement tail
Common combination forms order needed for programming and test.The bit wide of protocol header and agreement tail is determined according to order sum, by with spy
The character string composition of different meaning.Order is divided into commonly used command and custom command, and commonly used command is the general order of device, is made by oneself
Justice order is the specific command of certain device；
Object coding：Different to be programmed and test object and hardware parameters are distributed with object coding so that slave computer is hard
The different hardware that part can correctly distinguish same commands performs object and hardware parameter.The bit wide of object coding is held according to hardware
Row object and hardware parameter number are determined, are made up of multidigit decimal coding.Order is compiled to multiple devices simultaneously in one Frame Protocol
Journey and test, while when changing multiple hardware parameters, multiple devices and parameter sharing same target are encoded, and this causes that identical is hard
Part and hardware parameter it is easier be added to programming and test system in；
Data：Data content data and feedback data of programming and test for needed for programming and test, data length are variable,
It is data check code at ending, the mode of verification has common (CRC check, even-odd check etc.) and self-defined verification.If a frame
No data content when agreement only transmits order or only transmits the feedback result not comprising data.
Protocol header, agreement tail, object coding need to determine before protocol module in programming and test system is completed so that upper
Machine software and lower computer hardware can correctly be built by protocol process module and parse each frame traffic agreement, be realized to device
Programming and test.Protocol process module according to voluntarily interpolation data the need in the transmitting procedure of programming and test system,
The end position of data is determined during data transfer by agreement tail, calculating check code carries out contrasting the correct biography for ensuring data
It is defeated.
Fig. 2 is the frame example schematic diagram of application layer communication protocol of the invention.
The combination of protocol header and agreement tail has following several in one Frame Protocol：
Only protocol header：Such Frame Protocol transmits commonly used command, more for setting and check programming and test system
Lower computer hardware state, lower computer hardware is sent to by upper computer software；
Only agreement tail：Being used for the feedback result for transmitting programming and test such Frame Protocol, by lower computer hardware more
It is sent to upper computer software；
Simultaneously by protocol header and agreement tail：Such Frame Protocol transmits custom command, programs and surveys for setting more
Try the parameter of object and realize programming, the test to device, lower computer hardware is sent to by upper computer software.
The typical case of frame is as follows in antifuse device programming and test system：
Protocol frame example 1：rb01；
Protocol function：Reading object is encoded to the multiprogramming magnitude of voltage of ' 01 ' device；
Protocal analysis：The agreement only has protocol header, and not comprising data, ' rb ' is protocol header, and ' 01 ' is object coding.The association
View is sent to lower computer hardware by upper computer software, checks the program voltage state of device.' rb ' is commonly used command, command functions
It is that the state for programming and testing device is tested.
Protocol frame example 2：00012k, 5C~；
Protocol function：In device object coding for ' 0001 ' antifuse by 5 times test, average resistance be 2K；
Protocal analysis：The agreement only has agreement tail, and comprising data, '~' is agreement tail, and ' 0001 ' is object coding, ' 2K,
5 ' is data, and ' C ' is data self check code.The agreement is sent to upper computer software by lower computer hardware, feeds back one instead
The programmed result of fuse.'~' is commonly used command, and command functions are that feedback is programmed successfully.
Agreement：#0002*…*f；
Protocol function：To object coding in device for ' 0002 ' antifuse is programmed, programming bit stream data is (* ... *), number
Comprising CRC check code in；
Protocal analysis：The protocol package contains protocol header and agreement tail, and comprising data, ' # ' is protocol header, and ' 0002 ' compiles for object
Code, ' * ... * ' are data and check code, and ' f ' is agreement tail.The agreement is sent to lower computer hardware by upper computer software, and it is right to realize
The programming of device.' #f ' is custom command, and command functions are to programming and testing device programming according to programming bit stream data.
Fig. 3 is the communication frame schematic diagram of antifuse PROM device programmings and test system application example.
Totally 5 commonly used commands (listing 3 herein), 9 self-defined lives in antifuse PROM device programmings and test system
Make (list 5 herein), 15 kinds of stored memory types.The bit wide of protocol header is 2 bytes, and the bit wide of object coding is 2 words
Section, the bit wide of data voluntarily changes as the case may be, and the bit wide of agreement tail is 1 byte.
3 commonly used commands are as shown in FIG.：
Read program voltage：It is made up of protocol header ' rb ', object coding, the programming of different types of PROM is read in the order
Voltage；
Program voltage is set：It is made up of protocol header ' st ', object coding, data, data are program voltage value to be placed,
The order sets the program voltage of different types of PROM；
Feedback of the information：It is made up of object coding, data, agreement tail '~' or ' ^ ', data are programming and test process number
According to programming and the test information of different types of PROM are fed back in the order, when agreement tail is the programming of '~' interval scale and is tested into
Work(, when agreement tail is that ' ^ ' interval scale is programmed and test crash.
5 custom commands are as shown in FIG.：
Read chip information：It is made up of protocol header ' r ', object coding, agreement tail ' x ', the order is read different types of
PROM chip informations；
PROM data blocks are programmed：It is made up of protocol header ' w ', object coding, data, agreement tail ' b ', data are address information
With data to be written, the order in different types of PROM chip address block to writing data；
PROM chips look into sky：It is made up of protocol header ' c ', object coding, agreement tail ' b ', the order is to different types of
PROM chips are checked whether and are not written into data；
PROM data blocks read：It is made up of protocol header ' r ', object coding, data, agreement tail ' b ', data are believed for address
Breath, the order reads data from different types of PROM chip address block；
PROM data blocks are contrasted：It is made up of protocol header ' w ', object coding, data, agreement tail ' b ', data are address information
With data to be compared, whether data are correct during the order checks address block to different types of PROM chips.
Example described herein is a part of example, rather than whole examples.Increase new protocol header, right according to demand
As coding, agreement tail Extended Protocol, the programming and various tests to the PROM devices of different model are realized.
Fig. 4 is the communication frame schematic diagram of anti-fuse FPGA device programming and test system application example.
Totally 7 commonly used commands (listing 3 herein), 20 self-defined lives in anti-fuse FPGA device programming and test system
Make (list 9 herein), 8999 antifuse to be programmed.Due to custom command increase and antifuse quantity is big, protocol header
Increase with object coding bit wide.The bit wide of protocol header is 4 bytes, and the bit wide of object coding is 4 bytes, the bit wide root of data
Voluntarily change according to concrete condition, the bit wide of agreement tail is 1 byte.
Commonly used in commonly used command and PROM device programmings and test system in anti-fuse FPGA device programming and test system
Command functions are identical, and object is changed into anti-fuse FPGA hardware.Custom command as shown in FIG., is realized to anti-fuse FPGA chip
Look into hollow testing, programming, read chip id test, binning tests, parameter setting, data readback is tested, data step-by-step is contrasted
Test, chain of registers test, antifuse state verification.
Example described herein is a part of example, rather than whole examples.Increase new protocol header, right according to demand
As coding, agreement tail Extended Protocol, the programming and various tests to the FPGA device of different model are realized.
Fig. 5 is the composition schematic diagram of antifuse device programming of the invention and test system.
Equipment is received and transmission information by physical layer communication agreement in this programming and test system, and upper computer software is with
Position machine hardware has respective protocol process module to be responsible for structure and the parsing of application layer communication protocol.This application layer communication protocol is disobeyed
Rely in physical layer communication agreement, devices in system can be assisted by serial port protocol, I2C agreements, SPI protocol, CAN agreement, USB
The physical layer communication agreements such as view transmit each frame information.
The system is mainly and completes programming and test to antifuse devices such as anti-fuse FPGA, antifuse PROM, for low
The application system of complexity, is made up of following several parts：
To be programmed and test device：The mostly antifuse device such as anti-fuse FPGA, antifuse PROM, user compiles by it
Cheng Shixian logics or data storage, and test after preceding test, programming and testing, programming is programmed to it；
Upper computer software：Software interface is the window that user and hardware system carry out data exchange.Upper computer software is realized
Programming and test command, data, programming and the control and display of test process are sent to lower computer hardware；
Lower computer hardware：Lower computer hardware receives programming and test command, data from host computer, and converts them into
Corresponding clock signal directly controls to be programmed and test device, realizes the programming and test to device；
Protocol process module：The communication of upper computer software and lower computer hardware is realized by respective protocol process module, assisted
View processing module completes the structure to each communication frame and parsing.
Fig. 6 is the schematic diagram of communication transmission process of the invention.
In the programming of this antifuse device and test system, stat commands type first is that every kind of command type sets association
View head, agreement tail and data；Then the device for counting every kind of command type performs object and hardware parameter, sets each order class
The object coding of type；The protocol process module of upper computer software and lower computer hardware is finally write, completion system communications framework
Build.
After the completion of system communication framework is built, the communications between beginning equipment：
Programming and test command, data and object coding structure one frame information of the upper computer software according to transmission, are sent to
Lower computer hardware；
Lower computer hardware is parsed from the frame information for receiving and programmed and test command, data and object coding, right
The device for meeting object coding is programmed or tests.Lower computer hardware builds frame letter according to the feedback result of programming and test
Breath is sent to upper computer software；
Upper computer software is parsed from the frame information for receiving and programmed and test result, and is displayed in software interface；
After the completion of upper computer software is to programming and test result analysis treatment, then carry out follow-up programming, test process.
Fig. 7 is the schematic diagram of anti-fuse FPGA test process.
Perform step：It is hard that the protocol process module one frame information of structure " rb0001 " of upper computer software is sent to slave computer
Part；
Perform step 2：Lower computer hardware receives frame information, is parsed through protocol process module, obtains reading antifuse
The order of the program voltage of FPGA；
Perform step 3：Lower computer hardware reads the program voltage of anti-fuse FPGA, through communication protocol processes module construction
One frame information " VPP：5~" it is sent to upper computer software；
Perform step 4：Upper computer software receives information, is parsed through protocol process module, obtains the volume of current antifuse
Journey voltage VPP is 5V.
Fig. 8 is the schematic diagram of anti-fuse FPGA hardware programming process.
Perform step：Upper computer software sends " #0001* ... * f " to lower computer hardware, and ' * ... * ' are data and verification
Code；
Perform step 2：Lower computer hardware parses information and checks that data check is correct, is parsed through protocol process module, obtains
The order of ' 0001 ' antifuse programming in anti-fuse FPGA；
Perform step 3：Lower computer hardware is programmed according to programming data to anti-fuse FPGA, if programming is successfully transmitted
" 00012k, 5C~" arrives upper computer software, if program fail sends " 000110k, 100X^ " arrives upper computer software；
Perform step 4：Upper computer software parses information, and ' 0001 ' antifuse is obtained when programming successfully by 5 tests
Average resistance is 2k, and it is 10k that ' 0001 ' antifuse is obtained when program fail by 100 test resistances.
Perform step 5：If program fail upper computer software resends the program command of ' 0001 ' antifuse, otherwise go up
Position machine software sends the program command of next antifuse.
Finally it should be noted that：Above example is merely illustrative of the technical solution of the present invention, rather than its limitations；Although ginseng
The present invention has been described in detail according to previous examples, it will be understood by those within the art that：It still can be right
Technical scheme described in foregoing each example is modified, or carries out equivalent to which part technical characteristic；And these
Modification is replaced, and does not make the spirit and scope of essence disengaging each case technology scheme of the invention of appropriate technical solution.
Claims (5)
1. a kind of communication means for being applied to antifuse device programming and test system, described system includes to be programmed and test
Device, protocol process module, upper computer software, lower computer hardware, upper computer software sends to lower computer hardware and programs in system
And test command, lower computer hardware execution is to antifuse device programming and the order tested and the result for returning to programming and test；
The transmission frame of software and hardware application layer communication protocol is made up of protocol header, object coding, data, agreement tail in system, protocol header and
Agreement tail common combination forms order needed for programming and test, object coding correspondence different to be programmed and test object, hardware
Parameter, data are the option of a frame information, the school of interpolation data content and data in the information if data are used in order
Code is tested, only no data during transmission order；Upper computer software and lower computer hardware are real by application layer communication protocol transmission information
Existing programming and test of the computer to antifuse device, software and hardware communication process is as follows in system：
Step one：The different programming of statistics and test command, determine protocol header and agreement tail bit wide, be various orders and programming and
Test result sets protocol header and agreement tail；The device for counting every kind of command type performs object and hardware parameter number, it is determined that
Object coding bit wide, is each object and its parameter setting object coding；The agreement of design upper computer software and lower computer hardware
Processing module, for building and parsing each frame traffic agreement；
Step 2：According to different programmings and test command, data bit width, the communication protocol processes module of upper computer software are determined
Build a frame information and be sent to lower computer hardware；
Step 3：Lower computer hardware receives information, and object coding, life in information are obtained through the parsing of communication protocol processes module
Make, data；
Step 4：Lower computer hardware performs programming and test command, and the device to meeting object coding is programmed and tests；Under
The communication protocol processes module of position machine builds a frame information and is sent to host computer according to programming and test result；
Step 5：Upper computer software receives information, and a frame information is parsed through communication protocol processes module, is programmed and tested
As a result；
Step 6：Upper computer software analysis programming and test result, repeat step two arrive step 5.
It is 2. as claimed in claim 1 to program and test system, it is characterised in that：To be programmed and test device is generally antifuse
The antifuse devices such as FPGA, antifuse PROM, user is by its programming realization logic or data storage.
3. application layer communication protocol as claimed in claim 1, it is characterised in that：Order is divided into commonly used command and self-defined life
Order, commonly used command is the general order of device, and custom command is the specific command of certain device.
4. application layer communication protocol as claimed in claim 1, it is characterised in that：Multiple devices and parameter sharing same target are compiled
During code, order can simultaneously to multiple device programmings and test, while changing multiple hardware parameters in described agreement.
5. application layer communication protocol as claimed in claim 1, it is characterised in that：Protocol header in described agreement, object coding,
Data, agreement tail bit wide are variable, increase and reduce bit wide according to specific demand and number of devices, and the mode of data check code can be certainly
Definition.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109062553A (en) * | 2018-06-23 | 2018-12-21 | 上海泽阳智能科技有限公司 | While a kind of programing system towards hardware and data |
| CN109344086A (en) * | 2018-11-15 | 2019-02-15 | 天津津航计算技术研究所 | A kind of software test platform based on SIP chip |
| CN109669685A (en) * | 2018-11-30 | 2019-04-23 | 中国电子科技集团公司第五十八研究所 | Universal programmer and its programmed method |
| CN111796807A (en) * | 2020-04-09 | 2020-10-20 | 电子科技大学 | Self-adaptive programming method applied to anti-fuse device |
| CN113032276A (en) * | 2021-04-16 | 2021-06-25 | 上海寰果信息科技有限公司 | Positioning product test system and test method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101778038A (en) * | 2009-12-30 | 2010-07-14 | 浙江大学 | Gigabit Ethernet-based high-speed data transmission system of embedded equipment |
| CN102478797A (en) * | 2010-11-22 | 2012-05-30 | 中国科学院空间科学与应用研究中心 | Monitoring system with configurable communication protocol |
| CN105785190A (en) * | 2016-04-14 | 2016-07-20 | 广西南宁奥方电气有限公司 | High-voltage inverter test system |
-
2017
- 2017-01-16 CN CN201710032455.5A patent/CN106878285B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101778038A (en) * | 2009-12-30 | 2010-07-14 | 浙江大学 | Gigabit Ethernet-based high-speed data transmission system of embedded equipment |
| CN102478797A (en) * | 2010-11-22 | 2012-05-30 | 中国科学院空间科学与应用研究中心 | Monitoring system with configurable communication protocol |
| CN105785190A (en) * | 2016-04-14 | 2016-07-20 | 广西南宁奥方电气有限公司 | High-voltage inverter test system |
Non-Patent Citations (2)
| Title |
|---|
| 张玉杰，宋孟华: ""ＯＬＥＤ光电性能综合测试系统的设计"", 《液晶与显示》 * |
| 李红刚、张素萍: ""基于单片机和LABVIEW的多路数据采集系统设计"", 《研究与开发》 * |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109062553A (en) * | 2018-06-23 | 2018-12-21 | 上海泽阳智能科技有限公司 | While a kind of programing system towards hardware and data |
| CN109344086A (en) * | 2018-11-15 | 2019-02-15 | 天津津航计算技术研究所 | A kind of software test platform based on SIP chip |
| CN109344086B (en) * | 2018-11-15 | 2021-09-17 | 天津津航计算技术研究所 | Software testing platform based on SIP chip |
| CN109669685A (en) * | 2018-11-30 | 2019-04-23 | 中国电子科技集团公司第五十八研究所 | Universal programmer and its programmed method |
| CN109669685B (en) * | 2018-11-30 | 2022-02-15 | 中国电子科技集团公司第五十八研究所 | Universal programmer and programming method thereof |
| CN111796807A (en) * | 2020-04-09 | 2020-10-20 | 电子科技大学 | Self-adaptive programming method applied to anti-fuse device |
| CN111796807B (en) * | 2020-04-09 | 2023-08-22 | 电子科技大学 | Self-adaptive programming method applied to anti-fuse device |
| CN113032276A (en) * | 2021-04-16 | 2021-06-25 | 上海寰果信息科技有限公司 | Positioning product test system and test method |
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