CN106877892A - A kind of anti-interference reception circuit structure, method and apparatus - Google Patents

A kind of anti-interference reception circuit structure, method and apparatus Download PDF

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Publication number
CN106877892A
CN106877892A CN201710083489.7A CN201710083489A CN106877892A CN 106877892 A CN106877892 A CN 106877892A CN 201710083489 A CN201710083489 A CN 201710083489A CN 106877892 A CN106877892 A CN 106877892A
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power
input signal
attenuation
signal power
module
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CN106877892B (en
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项修平
覃志华
邢志刚
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Hytera Communications Corp Ltd
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Hytera Communications Corp Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/10Means associated with receiver for limiting or suppressing noise or interference
    • H04B1/1027Means associated with receiver for limiting or suppressing noise or interference assessing signal quality or detecting noise/interference for the received signal
    • H04B1/1036Means associated with receiver for limiting or suppressing noise or interference assessing signal quality or detecting noise/interference for the received signal with automatic suppression of narrow band noise or interference, e.g. by using tuneable notch filters

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Noise Elimination (AREA)

Abstract

The present invention provides a kind of anti-interference reception circuit structure and method, and power detection module, power control module are connected between wave filter and amplifier;Power detection module, for detecting input signal power;Power control module, stores predetermined power threshold value, judges that whether input signal power testing result exceedes predetermined power threshold value, and then corresponding power attenuation treatment is carried out to input signal power.The present invention can detect to high reject signal, and by strong jamming power attenuation, it is to avoid amplifier saturation, or non-linear distortion are produced, receiver is improved and is resisted strong signal interference intermodulation ability, normally received under protection strong jamming.

Description

A kind of anti-interference reception circuit structure, method and apparatus
Technical field
The present invention relates to wireless communication technology field, and in particular to anti-interference reception circuit structure and method and device.
Background technology
Obstruction interference refer to interference signal more than the maximal power level that receiver can bear when, cause receiver satisfy With reception demodulation ability declines, or even cannot normally receive.Obstruction interference is that the most serious one is influenceed in wireless communication system Interference is planted, the dynamic range of receiver is influenceed.Obstruction interference can be divided into the obstruction outside obstruction interference and the radio frequency band in radio frequency band Interference, it is closely spaced between successive bands with wireless frequency spectrum utilization rate more and more higher, particularly in tdd systems, receive Hair frequency interval 10MHz, launching frequency falls in frequency acceptance band, it is impossible to filtered by radio-frequency filter, then normal in terminal When communication, once there is interfered with terminal high-power transmitting on side, barrage reception terminal will be easy to, cause to receive Terminal communication is interrupted, it is impossible to is normally used, has been had a strong impact on client's experience.
Obstruction interference outside for radio frequency band, traditional method is, using the suppression high outside radio-frequency filter band, to suppress band Outer strong barrage jamming signal, makes radio-frequency front-end amplifier LNA (Lower noise Amplifier) be operated in unsaturated state, Improve receiver anti-with outer strong signal blocking interference performance.In order to improve the dynamic range of reception system, receiver would generally be Automatic growth control AGC (Automatic Gain Control) is designed in intermediate-frequency circuit, i.e., software connects by calculating present frame The signal strength after demodulation is received, the gain of next frame receiving circuit is controlled as basis for estimation, reach automatic growth control Purpose.
Prior art is disturbed using radio-frequency filter filtering strong signal blocking, and defect is:1st, the strong signal in reception bandwidth Obstruction interference performance is weak;2nd, radio-frequency front-end saturation distortion caused by strong signal interference cannot be eliminated, demodulation ability declines what is caused Obstructing problem;3rd, while cannot also improve strong signal interference, caused anti-intermodulation ability declines, it is impossible to improve system linear degree; 4th, the hysteresis quality that intermediate frequency AGC is controlled in addition, the strong signal blocking for the first frame cannot improve;5th, the power of intermediate frequency AGC controls There is closed loop cycle oscillation problem in detection and gain control.
The content of the invention
The invention provides in a kind of communication technical field, anti-interference reception circuit structure, method and apparatus can be detected Strong signal interference, and by strong jamming power attenuation, it is ensured that normally receiving under strong jamming.
A kind of anti-interference reception circuit that the present invention is provided, including:Reception antenna, wave filter, amplifier and medium frequency electric Road.It is connected between wave filter and amplifier:Power detection module, power control module;Power detection module, with wave filter Signal output part connection, for detecting input signal power, and input signal power testing result is sent to Power Control Module;Power control module, is connected between wave filter and amplifier, stores predetermined power threshold value, judges input signal work( Whether rate testing result exceedes predetermined power threshold value;If input signal power testing result exceedes threshold value, to input Signal power carries out power attenuation treatment, after completing decay, carries out decay reset.
A kind of receiving circuit anti-interference method, including:Processor real-time detection input signal power, comparator input signal work( Rate testing result and predetermined power threshold value;When input signal power testing result exceedes predetermined power threshold value, processor Control attenuation module carries out attenuation processing to input power of information;Processor control attenuation module completes decay, to attenuation module Resetted.
A kind of receiver, its receiving circuit is anti-interference reception circuit of the present invention.
It is connected at the radio circuit front end of receiver, uses the power control module feelings excessive to input signal power Condition carries out decay and allows a receiver to treatment with interior strong signal interference, by strong jamming power of information adjustable attenuation, it is ensured that Jamming power does not make amplifier LNA saturations, does not produce non-linear distortion, substantially reduces intermodulation component, improves the anti-strong letter of receiver Number Intermodulation Interference ability, that is, improve system linear degree.And then the obstructing problem for eliminating radio-frequency front-end saturation and causing;While scheme Fulfiled interference treatment ahead of schedule before time slot valid data are received, it is to avoid the start strong signal interference blocking of the first frame;And each frame Interference treatment is all carried out, with real-time, it is to avoid property after interference control is full;Additionally, by carrying out power detection before decay, Avoid that closed loop cycle vibration occurs in " intermediate frequency AGC control programs ".
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing The accompanying drawing to be used needed for having technology description is briefly described, it should be apparent that, drawings in the following description are only this Some embodiments described in invention, for those of ordinary skill in the art, on the premise of not paying creative work, Other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is prior art receiver architecture block diagram;
Fig. 2 is embodiment of the present invention receiver architecture block diagram one, hardware schematic;
Fig. 3 is embodiment of the present invention receiver architecture block diagram two, hardware schematic;
Fig. 4 is embodiment of the present invention receiver architecture block diagram three, hardware schematic;
Fig. 5 is embodiment of the present invention receiver architecture block diagram four, hardware schematic;
Fig. 6 is embodiment of the present invention receiver architecture block diagram five, hardware schematic;
Fig. 7 is embodiment of the present invention software control flow schematic diagram one;
Fig. 8 is embodiment of the present invention software control flow schematic diagram two;
Fig. 9 is embodiment of the present invention control signal frame schematic diagram.
Specific embodiment
The invention provides in a kind of communication technical field, jamproof circuit structure, method and device, Ke Yijian are received Strong signal interference is surveyed, and by strong jamming power attenuation, it is ensured that normally receiving under strong jamming.
In order that those skilled in the art more fully understand the technical scheme in the present invention, below in conjunction with of the invention real The accompanying drawing in example is applied, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described implementation Example is only a part of embodiment of the invention, rather than whole embodiments.Based on the embodiment in the present invention, this area is common The every other embodiment that technical staff is obtained under the premise of creative work is not made, should all belong to protection of the present invention Scope.
Existing implementation referring to Fig. 1, when strong signal interference, such as the power output of bandpass filter (BPF) 103+ 8dBm, then the input power of amplifier (LNA) 104 is exactly+8dBm, and the saturation input power of amplifier 104 is -2dBm, that This jamming power is much larger than the saturation input power of amplifier 104, and amplifier 104 produces non-linear distortion, jamming receiver.
Anti-interference reception circuit structure provided in an embodiment of the present invention and method can apply to wireless communication technology field In, such as communication equipment receiving circuit part.
It is the theory diagram of the embodiment one that the present invention is provided referring to Fig. 2, the present embodiment will be with reference to Fig. 2 to of the invention real Implementing for example one is applied to be described.
For the embodiment one that the present invention is provided is a kind of anti-interference reception circuit, as shown in Fig. 2 including:Reception antenna 201st, wave filter 202, amplifier 205 and intermediate-frequency circuit 206, are connected between wave filter 202 and amplifier 205:Power is examined Survey module 203, power control module 204.
Power detection module 203, the signal output part with wave filter 202 is connected, for detecting input signal power, and will Input signal power testing result is sent to power control module 204;
Power control module 204, is connected between wave filter 202 and amplifier 205, stores predetermined power threshold value, sentences Whether disconnected input signal power testing result exceedes predetermined power threshold value;If input signal power testing result exceedes thresholding Value, then carry out power attenuation treatment to input signal power, after completing decay, carries out decay reset.
Before power detection module 203 is placed on power control module 204 by the embodiment of the present invention, real-time detection power, no By influence of fading, it is to avoid form closed loop cycle vibration between detection power and decay.The intermediate frequency AGC controls of existing scheme, power Detection module is exactly that after power control module, it is not realtime power after the attenuation that thus the power in the presence of detection is, It is susceptible to closed loop cycle vibration.
The anti-interference reception circuit, improves receiver and resists strong signal Intermodulation Interference ability, improves system linear degree;Using work( Rate detection module 203 detects strong signal, using power control module 204 strong signal attenuation to the saturation less than amplifier 205 Incoming level, then substantially reduce intermodulation component, and anti-intermodulation ability is improved and namely improves system linear degree.
Further, if input signal power testing result is not less than threshold value, not to input signal power at Reason.
Input signal power is not carried out processing the mode for implementing and there are many kinds, present embodiments provided not to input A kind of implementation that signal power is processed, including:Power control module 204 includes processor and attenuation module, including Processor control attenuation module does not decay to input signal power, and attenuation module does not start input signal power decay;Or Short circuit power control module, directly exports input signal power.
Wherein, attenuation module can be numerical-control attenuator, it is also possible to be made up of the discrete device for possessing attenuation function.
It is the theory diagram of the embodiment two that the present invention is provided referring to Fig. 3, the present embodiment will be with reference to Fig. 3 to of the invention real Implementing for example two is applied to be described.
In the present embodiment, wave filter is realized jointly by multiple low pass filters and bandpass filter, the reality that the present invention is provided Apply a kind of anti-interference reception circuit of example two as shown in figure 3, including:Reception antenna 304, low pass filter 305, the first bandpass filtering Device 307, amplifier 308, the second bandpass filter 309 and intermediate-frequency circuit 312, in the first bandpass filter 307 and amplifier 308 Between be connected with:Power detection module 302, power control module 303.
Power detection module 302, power control module 303, amplifier 308 constitute digital-analog mixed type radio frequency automatic gain control RFAGC301 (Radio-frequency Automatic Gain Control) processed;Disturbed when strong signal blocking is received so that The amplifier 308 and the saturation of frequency mixer 310 of receiver radio frequency front end, produce non-linear distortion, cause to receive demodulation ability decline And block, then this strong signal blocking of elimination that just can be advance by this digital-analog mixed type RFAGC301 is disturbed.The present invention Using radio frequency automatic growth control RFAGC301, can not only process and be disturbed with outer strong signal, moreover it is possible to which treatment is disturbed with interior strong signal, The high-power transmitting barrage reception terminal problem of interfered with terminal can be substantially improved.This RFAGC is for the strong signal in reception bandwidth Interference, is suppressed by power detection and decay.
Power detection module 302, the signal output part with the first bandpass filter 307 is connected, for detecting input signal Power, and input signal power testing result is sent to power control module 303;Wherein power detection module 302 includes width Band high-precision signal couples branch road 321, wave detector Detector322, analog-digital converter ADC323;Its middle width strip high-precision signal Coupling branch road 321, connects signal input part, for from receives link coupled signal energy to branch road;Wave detector 322, connection is wide Band high-precision signal couples the output end of branch road 321, and detection treatment, output detection electricity are carried out for the signal to coupling branch road output Pressure;Analog-digital converter ADC323, the output end of tie geophone 322, number is converted to by the analog voltage signal that wave detector 322 is exported Word voltage signal, and input signal power testing result is sent to the broadband high-precision signal coupling branch of power control module 303. Road 321 ensure that can accurately be detected to different frequency signals, and common termination power does not reach this requirement;Can in embodiment By a resistance from main circuit coupled signal energy, resistance coupling is all constant for frequency band coupling amount very wide, with broadband Property and accuracy;Except resistance, coupled capacitor is can also be, but there is frequency response, different frequency coupling amount meeting in Capacitance Coupled It is different, coupling amount difference will be made big when broadband application, detection power is inaccurate, and coupling branch road 321 is preferred in embodiment Resistance.
Power control module 303, is connected between the first bandpass filter 307 and amplifier 308, storage predetermined power door Limit value, judges whether input signal power testing result exceedes predetermined power threshold value;If input signal power testing result More than threshold value, then power attenuation treatment is carried out to input signal power, after completing decay, carry out decay reset.Power Control Module 303 includes Digital Signal Processing DSP331, attenuation module 332;
Wherein processor 331, connects analog-digital converter ADC323 output ends, for the output number of analog-digital converter 332 of sampling Word voltage signal, and input signal power is obtained, predetermined power threshold value is stored, the input letter that power detection module is calculated Number power is compared with predetermined power threshold value, if input signal power is not less than threshold value, not to input signal work( Rate is processed, including:The control of processor 331 attenuation module 332 does not decay to input signal power, or short circuit power control Molding block 303, directly exports input signal power;If input signal power exceedes threshold value, the control decay of processor 331 Module 332 carries out attenuation processing to input signal power;Attenuation module 332, connects processor 323, is instructed according to processor 323 Start input signal power decay or resetted;If processor requirement attenuation module not to input signal power at Reason, then do not start input signal power decay.According to high reject signal watt level, the decay control of differential declines gear is carried out System, jamming power is bigger, decay it is bigger, it is therefore an objective to ensure that jamming power can not make the saturation of amplifier 308, eliminate radio-frequency front-end Saturation and the obstructing problem that causes.
Wherein attenuation module 332 is numerical-control attenuator ATT or fixed attenuator, or uses diode, resistance capacitance Go to constitute a discrete device attenuator Deng discrete device.Wherein discrete device attenuator is discrete by diode, resistance capacitance etc. Device is constituted, and is implemented circuit and is seen Fig. 6, including (first) resistance 601, inductance 602, PIN diode 603, the first electric capacity 604, the second electric capacity 605, the 3rd electric capacity 606, digital analog converter 607, the one end of digital analog converter 607 connection processor 331, digital-to-analogue The other end of converter 607 connects resistance 601, the connection inductance of resistance 601 one end 602, the other end of inductance 602 connection PIN diode 603 positive poles, and being attempted by main circuit simultaneously, the negative pole of PIN diode 603 ground connection, resistance 601 is connected the with the centre of inductance 602 One electric capacity 604, the first electric capacity 604 is grounded;Bandpass filter 307 is connected the second electric capacity 605 and the 3rd electricity with the centre of amplifier 308 Hold 606, the second electric capacity 605 is of coupled connections with prime bandpass filter 307, the 3rd electric capacity 606 and the company of coupling of post-amplifier 308 Connect, processor 331 is turned on by controlling the output voltage control PIN diode 603 of digital analog converter 607, realize main circuit Two electric capacity 605 couples the power attenuation of input signal, and is coupled to post-amplifier 308 by the 3rd electric capacity 606.
According to high reject signal watt level, numerical-control attenuator or discrete device attenuator carry out declining for differential declines gear Down control, jamming power is bigger, decay it is bigger, it is therefore an objective to ensure that jamming power can not make amplifier LNA saturations, eliminate radio frequency Front end saturation and the obstructing problem that causes.The anti-strong signal blocking interference performance of receiver is improved, dynamic range is improved;This RFAGC It is that brought to strong signal high-power decays in radio-frequency front-end, will not causes before radio frequency under saturation distortion, and demodulation ability The obstructing problem that drop is caused;
Before power detection module 302 is placed on power control module 303 by the embodiment of the present invention, real-time detection power, no By influence of fading, it is to avoid form closed loop cycle vibration between detection power and decay.The intermediate frequency AGC controls of existing scheme, power Detection module is exactly that after power control module, it is not realtime power after the attenuation that thus the power in the presence of detection is, It is susceptible to closed loop cycle vibration.
The anti-interference reception circuit, improves receiver and resists strong signal Intermodulation Interference ability, improves system linear degree;Strong signal Intermodulation Interference, signal level exceedes the saturation incoming level of amplifier LNA308, makes amplifier LNA308 saturations, produces non-linear Distortion, intermodulation component increase.Using digital-analog mixed type RFAGC301 strong signal attenuation to the saturation less than amplifier LNA308 Incoming level, then substantially reduce intermodulation component.Such as, when close to saturation state, interference signal decays amplifier LNA308 3dB, then intermodulation component reduction 9dB.Here it is digital-analog mixed type RFAGC301 improves receiver resists strong signal Intermodulation Interference ability, Anti- intermodulation ability is improved and namely improves system linear degree.
Based on Fig. 3, and the above analysis, the embodiment of the present invention two is illustrated, when the interference of strong signal, such as bandpass filter 307 (BPF1) power output+8dBm, the power coupled from primary link by coupling the high accuracy coupling of branch road 321 is -15dBm, coupling Close branch road 321 and select resistance herein, resistance sizes are related to the problem of coupling amount, select different resistance values, can obtain difference Coupling amount.Such as, selection coupling resistance value is 680 ohm, then coupling amount is exactly -23dB, the work(that the coupling of+8dBm signals is obtained Rate is 8-23=-15dBm.Corresponding relation between coupling amount and resistance is obtained by experiment test.Radio frequency detector device (Detector) 322 output detecting circuits are 750mV, and the output voltage of radio frequency detector device 322 is closed with the correspondence between input power System is tested by side circuit and obtained.This analog voltage is converted into data signal, processor (DSP) by analog-digital converter 323 331 sample this data signal, be averaged by 10 samplings, accurately calculate this detecting circuit, then detecting circuit is converted It is detection performance number, obtains the detection performance number of+8dBm, the detection voltage of the output of wave detector 322 is closed with the correspondence between power System is tested by side circuit and obtained, and the one-to-one relationship between voltage and power is then made look-up table, and software is obtained To detection voltage value table look-up and be known that corresponding performance number.Software according to the performance number of this+8dBm, in the control of software code This condition of 4≤Pdet < 10dBm is found in condition and range processed, the sentence below this condition, i.e. I/O mouthful two are then performed Control bit PE43204-C1, PE43204-C2 export low level L and high level H respectively, remove the control decay 12dB of attenuator 332, After decay 12dB so that the power for entering amplifier 308 is -4dBm, less than the saturation input power -2dBm of amplifier 308, The non-linear distortion of amplifier 308 is eliminated, the big signal interference blocking of receiver is solved the problems, such as.If detection power is less than amplification The saturation input power of device 308, attenuator is just unattenuated, that is, the 0dB that decays, and is equal to and is directly connected to amplifier 308.If In the case of the jamming power of appearance is especially big, decay 18dB, or is more than the saturation input power of amplifier 308 after there is decay, The attenuator 332 of bigger attenuation range need to be selected, to solve this superpower interference signal saturation problem, such case is crossed and is gone out Existing probability is less.
Detection power P det Control pad value (dB) PE43204-C1 PE43204-C2
Pdet < -2dBm 0 L L
- 2≤Pdet < 4dBm 6 H L
4≤Pdet < 10dBm 12 L H
Pdet≥10dBm 18 H H
Table 1 detects power and adjustable attenuation value corresponding relation
It is the embodiment of the present invention three referring to Fig. 4, power detection module 402 is same as embodiment two, and attenuator is fixed attenuation Before device 432 is serially connected in amplifier LNA408, processor (DSP) 431 cannot be directly connected to 432 amplifiers 408, lead to Cross and connect two RF switches, switch 433 and switch 434 in the both sides of fixed attenuator 432, processor (DSP) 431 is by control Two RF switches, can fixed attenuator 432 and it is direct-connected between switch over;This fixed attenuator 432 can be that π types decline Subtract;When power detection module 402 detects input signal power more than threshold value, by two RF switches by fixed attenuation Device 432 accesses main circuit, and the only one of which gear of fixed attenuator 432, such as 10dB decay carries out power to input signal power Attenuation processing;When main signal is stronger, power attenuation can be preferably carried out, suppress obstruction.When power detection module 402 When detecting input signal power not less than threshold value, by two RF switches directly by bandpass filter 407 and amplifier LNA408 is connected, and does not carry out power attenuation treatment to input signal power.
It is the embodiment of the present invention four referring to Fig. 5, power detection module 502 is same as embodiment two, and attenuator is numerical control attenuation Before device 532 is serially connected in amplifier LNA508, processor DSP531 is cannot to be directly connected to amplifier LNA508, by declining Subtract device both sides and connect two RF switches, switch 533 and switch 534, processor 531, can be with by controlling two RF switches Numerical-control attenuator 532 and it is direct-connected between switch over, simultaneous processor 531 is directly connected to numerical-control attenuator 532, and attenuator is adopted The many gear decay of numerical control.When power detection module 502 detects input signal power more than threshold value, penetrated by two Numerical-control attenuator 532 is accessed main circuit by frequency switch, according to different interference signal sizes are detected, input signal power is entered The decay of the rational corresponding gear of row;When power detection module 502 detects input signal power not less than threshold value, lead to Cross two RF switches to be directly connected bandpass filter 507 with amplifier 508, power attenuation is not carried out to input signal power Treatment.Many gear attenuators are more flexible than fixed attenuator:Using fixed attenuation, in the case where main signal is weak, decay It is too big, and many gear attenuators of numerical control are used, in the case where main signal is relatively weak, we can decay a little bit smaller, and this is Where advantage of the present invention.
It is the embodiment of the present invention five referring to Fig. 6, the replacement circuit way of realization on power control module, the present invention Attenuation control circuit, i.e. discrete device attenuator can be built using the discrete device such as PIN diodes and resistance, electric capacity, inductance. Power control module is made up of processor with discrete device attenuator, and discrete device attenuator is by digital analog converter (DAC) 607 Output voltage TV, goes to control the conducting of diode (PIN pipes) 603, realizes many gear decay,.Control pad value and TV magnitudes of voltage Corresponding relation it is as shown in table 6.The output voltage of digital analog converter 607 is controlled by processor DSP, when circuit not When needing decay, processor controls digital analog converter DAC607 to export 0V voltages by software instruction, then diode (PIN pipes) 603 attenuator circuits are unattenuated, and when circuit needs decay 6dB, processor passes through software instruction control process device Output 0.56V voltages, then 0.56V voltages are added in above diode (PIN pipes) 603, realize the decay of main circuit power 6dB, It is similar below.The power attenuation value of circuit and the corresponding relation of TV control voltages are obtained by the test of side circuit.
Control pad value TV magnitudes of voltage (V)
0 0
6dB 0.56
12dB 0.64
18dB 0.75
Table 2 controls attenuator values and TV magnitude of voltage corresponding relations
It is a kind of receiving circuit anti-interference method schematic flow sheet one referring to Fig. 7, including:
S701, real-time detection input signal power, comparator input signal power and predetermined power threshold value;
S702, input signal power exceed predetermined power threshold value when, processor control attenuation module to input information Power carries out attenuation processing;
S703, processor control attenuation module complete decay, and attenuation module is resetted.
Disturbed when strong signal blocking is received so that the LNA and frequency mixer saturation of receiver radio frequency front end, produce non-linear mistake Very, cause to receive demodulation ability decline and block, then just can be before input signal enters amplifier by this method, inspection Input signal power is surveyed, according to predetermined power threshold value, input signal power is decayed by controlling attenuation module, in advance The strong signal blocking interference that elimination is received, the input signal after decay will not cause amplifier and frequency mixer saturation, enter without Non-linear distortion can be caused, obstructing problem caused by reception demodulation ability declines also is solved;To declining complete to decay simultaneously after Subtract module to be resetted, it is ensured that the input signal that next frame is received can real-time detection decayed.The present invention can not only be processed Disturbed with outer strong signal, moreover it is possible to which treatment is disturbed with interior strong signal, can substantially improve the high-power transmitting barrage reception of interfered with terminal Terminal problem.
Further, if input signal power testing result is not less than threshold value, not to input signal power at Reason.
Processor and attenuation module do not decay to input signal power, including processor outputs level signals, control Attenuation module does not carry out attenuation processing to input signal power;Or processor short circuit attenuation module, input signal power is not entered Row attenuation processing.
It is a kind of receiving circuit anti-interference method schematic flow sheet two referring to Fig. 8, idiographic flow includes;
Before RFAGC1 starts control, processor resets attenuation module to S801;
S802 broadbands high-precision signal termination power couples input signal energy to wave detector from receives link;
S803 wave detectors carry out detection treatment to input signal, export detection voltage;
S804 analog-digital converters carry out voltage analog-to-digital conversion, and the analog voltage signal that wave detector is exported is converted into digital electricity Pressure signal, digital voltage signal is the testing result of input signal power;
S805 processors carry out n times sampling to digital voltage signal, and (N is more than 2, can be 10 times) ensures detection power Accuracy;
S806 processors calculate average voltage;
S807 calculates input signal power according to average voltage;
S808 processors compare input signal power with predetermined power threshold value, judge whether input signal power surpasses Predetermined power threshold value is crossed, and then selects adjustable attenuation condition, output attenuatoin module control signal, processor is defeated by I/O mouthfuls Go out low and high level, go to control attenuation module;
S809 then controls attenuation module to carry out attenuation processing to input power of information if desired for decay;
S810 is such as not required to decay, then control attenuation module not decay to input signal power, processor output level Signal, control attenuation module does not carry out attenuation processing to input signal power;Or processor short circuit attenuation module, input is not believed Number power carries out attenuation processing.
It is control signal frame schematic diagram of the present invention, each control frame of input signal, when all comprising receiving referring to Fig. 9 Gap and free timeslot (Idle slot), free timeslot are located at the previous time slot for receiving time slot, and free timeslot is examined comprising startup power Survey and power control instruction.Receive time slot to receive for control process device log-on data, free timeslot does for control process device The preparation for needing is received, such as starts interference attenuation control, just completed to decay before signal is received.Receiving time slot solution Radio-frequency front-end non-linear distortion jamming receiver caused by strong signal interference, the inspection of present frame power are just eliminated before tune in advance Survey, present frame Gain tuning, with real-time, anticipating property, even if the first frame of start has high reject signal, can also connect Before receiving first time slot demodulation, just high reject signal is decayed, the elimination high reject signal jamming receiver of essence, Just complete whole power detection and adjustable attenuation process.When RFAGC starts control, processor is multiple to attenuation module Position, is that 146SN starts in that free timeslot before the reception RX time slots of each frame, and the treatment to previous frame is answered Position is not in start nor starting to receive signal.
Compared to existing intermediate frequency AGC schemes, power detection is that, in present frame, power attenuation is the first frame of starting shooting in next frame Strong signal interference cannot be processed, control process refer to this action of power attenuation, there are delayed, existing defects.The present invention Using the anticipating property of RFAGC, the free timeslot before the reception time slot in the first frame of starting shooting receives signal is just processed, Fulfiled ahead of schedule before receiving time slot valid data;Present frame detects that present frame gain is controlled, it is to avoid the hysteresis quality of control process; Whole processing procedure includes two processes of power detection and power attenuation, and power detection and power attenuation are complete before and after same frame Into control process do not exist hysteresis quality.Thus can solve the problem that the first frame of start there is strong signal interference problem, the innovation side Case the first frame of not only starting shooting will be processed, and each frame will be processed afterwards, and with real-time, anticipating property, the first frame demodulates it It is preceding just the interference of strong signal decay, improve the deficiency of intermediate frequency AGC hysteresis qualitys, solve the first frame there is the interference of strong signal and Obstructing problem.
A kind of receiver, the receiving circuit of the receiver is the anti-interference reception electricity such as above example one to embodiment five Road.
The receiving circuit of receiver is a kind of anti-interference reception circuit, including:Reception antenna, wave filter, amplifier and in Frequency circuit, is connected between wave filter and amplifier:Power detection module, power control module;Power detection module, with filter The signal output part connection of ripple device, for detecting input signal power, and is sent to power by input signal power testing result Control module;Power control module, is connected between wave filter and amplifier, stores predetermined power threshold value, judges input letter Whether number power detection result exceedes predetermined power threshold value;If input signal power testing result exceedes threshold value, right Input signal power carries out power attenuation treatment, after completing decay, carries out decay reset.
The receiving circuit of receiver is a kind of anti-interference reception circuit, on the basis of foregoing circuit, if input signal work( Rate testing result is not processed input signal power then not less than threshold value.
The receiving circuit of receiver is a kind of anti-interference reception circuit, on the basis of foregoing circuit, power control module bag Containing processor and attenuation module, processor is not processed input signal power, including processor control attenuation module is not right Input signal power is decayed, and attenuation module does not start input signal power decay;Or short circuit power control module, it is directly defeated Go out input signal power.
The receiving circuit of receiver is a kind of anti-interference reception circuit, and on the basis of foregoing circuit, attenuation module can be Numerical-control attenuator, it is also possible to which the discrete device attenuator with attenuation function, including digital analog converter are constituted by discrete device, PIN diode, inductance, electric capacity, resistance.Digital analog converter one end connects processor, digital analog converter other end connection resistance, electricity Resistance connection inductance one end, inductance other end connection PIN diode positive pole, and be attempted by main circuit simultaneously, PIN diode negative pole The first electric capacity of connection, the first capacity earth in the middle of ground connection, resistance and inductance;In the middle of wave filter and amplifier the second electric capacity of connection with 3rd electric capacity, the second electric capacity is of coupled connections with prime wave filter, and the 3rd electric capacity is of coupled connections with post-amplifier, and processor passes through The output voltage control PIN diode conducting of digital analog converter is controlled, the work(of main circuit the second Capacitance Coupled input signal is realized Rate decays, and is capacitively coupled to post-amplifier by the 3rd.
Each embodiment in this specification is described by the way of progressive, identical similar portion between each embodiment Divide mutually referring to what each embodiment was stressed is the difference with other embodiment.Especially for equipment reality Apply for example, because it is substantially similar to embodiment of the method, so describing fairly simple, related part is referring to embodiment of the method Part explanation.Some or all of module therein can be according to the actual needs selected to realize this embodiment scheme Purpose.Those of ordinary skill in the art are without creative efforts, you can to understand and implement.The above is only Specific embodiment of the invention, it is noted that for those skilled in the art, is not departing from the present invention On the premise of principle, some improvements and modifications can also be made, these improvements and modifications also should be regarded as protection scope of the present invention.

Claims (10)

1. a kind of anti-interference reception circuit, including:Reception antenna, wave filter, amplifier and intermediate-frequency circuit, it is characterised in that It is connected between the wave filter and the amplifier:Power detection module, power control module;
The power detection module, the signal output part with the wave filter is connected, for detecting input signal power, and by institute State input signal power testing result and be sent to the power control module;
The power control module, is connected between the wave filter and the amplifier, stores predetermined power threshold value, judges Whether the input signal power testing result exceedes predetermined power threshold value;If the input signal power testing result surpasses Threshold value is crossed, then power attenuation treatment is carried out to the input signal power, after completing decay, carry out decay reset.
2. a kind of anti-interference reception circuit according to claim 1, it is characterised in that if the input signal power is detected Result is not processed the input signal power then not less than threshold value.
3. a kind of anti-interference reception circuit according to claim 2, it is characterised in that the power control module includes treatment Device and attenuation module, it is described the input signal power not to be processed, including the processor control attenuation module The input signal power is not decayed, the attenuation module does not start and the input signal power is decayed;Or short circuit The power control module, directly exports the input signal power.
4. a kind of anti-interference reception circuit according to claim 3, it is characterised in that the attenuation module is numerical control attenuation Device.
5. a kind of anti-interference reception circuit according to claim 3, it is characterised in that the attenuation module includes digital-to-analogue conversion Device, PIN diode, inductance, electric capacity, resistance, described digital analog converter one end connects the processor, and the digital analog converter is another One end connects the resistance, and the resistance connects described inductance one end, and the inductance other end is connecting the PIN diode just Pole, and be attempted by main circuit simultaneously, the PIN diode negative pole ground connection, connection first in the middle of the resistance and the inductance Electric capacity, first capacity earth;Connection the second electric capacity and the 3rd electric capacity in the middle of the wave filter and amplifier, second electricity Appearance is of coupled connections with wave filter described in prime, and the 3rd electric capacity is of coupled connections with amplifier described in rear class, and the processor is by control PIN diode conducting described in the output voltage control of the digital analog converter is made, realizes being input into described in second Capacitance Coupled The power attenuation of signal, and it is capacitively coupled to amplifier described in rear class by the described 3rd.
6. a kind of receiving circuit anti-interference method, it is characterised in that methods described includes:
Processor real-time detection input signal power, relatively more described input signal power testing result and predetermined power threshold value;
When the input signal power testing result exceedes predetermined power threshold value, the processor controls attenuation module to defeated Entering power of information carries out attenuation processing;
Processor control attenuation module completes decay, and attenuation module is resetted.
7. a kind of receiving circuit anti-interference method according to claim 6, it is characterised in that if the input signal power Testing result is not processed the input signal power not less than threshold value, the then processor and attenuation module.
8. a kind of receiving circuit anti-interference method according to claim 7, it is characterised in that the processor and attenuation module Input signal power is not decayed, including the processor controls the attenuation module not enter to the input signal power Row decay, the attenuation module does not start and the input signal power is decayed;Or power control module described in short circuit, it is directly defeated Go out the input signal power.
9. a kind of receiving circuit anti-interference method according to claim 6 or 7, it is characterised in that the input signal includes Control frame, the control frame includes that free timeslot is used to control the processor to start number with time slot, the reception time slot is received According to receiving, the free timeslot is used to start interference attenuation control, and the free timeslot is located at described a period of time before receiving time slot Gap, the free timeslot is detected and power control instruction comprising startup power.
10. a kind of receiver, it is characterised in that the receiving circuit of the receiver is as described in any one of claim 1 to 5 Anti-interference reception circuit.
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CN107800785A (en) * 2017-10-19 2018-03-13 惠州高盛达科技有限公司 It is a kind of with adaptation function, the arrowband Internet of Things module having a wide range of application
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CN109857021A (en) * 2019-01-30 2019-06-07 烟台东方威思顿电气有限公司 For the jamproof active shield system and method for M-bus bus
CN114915304A (en) * 2022-03-28 2022-08-16 海能达通信股份有限公司 Receiver and signal anti-interference circuit and signal anti-interference method thereof
CN114915304B (en) * 2022-03-28 2023-08-11 海能达通信股份有限公司 Receiver, signal anti-interference circuit thereof and signal anti-interference method

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