CN106876068A - Array type chip resistor and the method for manufacturing the array type chip resistor - Google Patents
Array type chip resistor and the method for manufacturing the array type chip resistor Download PDFInfo
- Publication number
- CN106876068A CN106876068A CN201610767454.0A CN201610767454A CN106876068A CN 106876068 A CN106876068 A CN 106876068A CN 201610767454 A CN201610767454 A CN 201610767454A CN 106876068 A CN106876068 A CN 106876068A
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- Prior art keywords
- substrate
- array type
- cream
- resistor
- type chip
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C13/00—Resistors not provided for elsewhere
- H01C13/02—Structural combinations of resistors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Abstract
A kind of array type chip resistor and the method for manufacturing the array type chip resistor are provided, methods described includes：Form in the upper and lower surface of substrate Top electrode and bottom electrode respectively at regular intervals and form resistor element between the part of Top electrode；The multiple holes through substrate are formed between resistor element；The multiple hole is filled using cream；Substrate is separated into multiple bars；Lateral electrode is formed on the region for not applying cream on the side surface of each in the multiple bar.
Description
This application claims Korea Spro 10-2015-0175849 submitted in Korean Intellectual Property Office on December 10th, 2015
The rights and interests of state's patent application, the disclosure of the korean patent application is incorporated herein by reference this.
Technical field
Present inventive concept is related to a kind of array type chip resistor and the method for manufacturing the array type chip resistor.
Background technology
Chip resistor is suitably adapted for realizing precision resistor, therefore, its demand has been extended to various electronic building bricks
Field.Generally, performing the resistor of the memory module of impedance matching can be arranged to the form of array type chip resistor, and
And the external connection terminals side of module substrate can be arranged on.
As the method for the lateral electrode for forming array type chip resistor, through hole print process and application to printed method can be used
Deng, also, in order to form prominent lateral electrode, generally usable application to printed method.
However, application to printed method has such as material cost increase and weaker limitation in terms of sulfur resistance is ensured,
And need coating and the drying process for repeating.
(patent document 1) Japanese Patent No. 2008-103462 Patent Publication is announced
The content of the invention
The design that the content of the invention introduces selection in simplified form is provided, is further retouched in a specific embodiment below
State the design.Present invention is not intended to limit the principal character or essential feature of theme required for protection, is also not intended to be used to help
Help the scope for determining theme required for protection.
The one side of present inventive concept provides a kind of array type chip resistor and manufactures the array type chip resistor
Method, with allow reduce manufacturing cost and improve production efficiency.
According to a total aspect, a kind of method of manufacture array type chip resistor may include：At regular intervals
Top electrode and bottom electrode are formed in the upper and lower surface of substrate respectively, and resistor unit is formed between Top electrode
Part；Formed through multiple holes of substrate in the region for not forming resistor element, each hole position in the multiple hole is in phase
Between adjacent Top electrode；The multiple hole is filled using cream；Substrate is separated into multiple bars；Each in the multiple bar
Side surface on do not apply to form lateral electrode on the region of cream.
According to another total aspect, a kind of array type chip resistor can be manufactured by the following method manufacture, the manufacture
Method includes：At regular intervals respectively in the upper and lower surface of substrate formed Top electrode and bottom electrode, and
Resistor element is formed between Top electrode；Formed through multiple holes of substrate in the region for not forming resistor element, it is described
Each hole position in multiple holes is between adjacent Top electrode；The multiple hole is filled using cream；Substrate is separated into multiple bars；
Not applying on the side surface of each in the multiple bar forms lateral electrode on the region of cream.
Brief description of the drawings
Fig. 1 is the indicative flowchart of the example of the method for showing manufacture array type chip resistor；
Fig. 2 is the perspective schematic view of the example of the substrate for showing to be formed with Top electrode, bottom electrode and resistor element；
Fig. 3 is the perspective schematic view of the example of the substrate for showing to be printed with cream in the multiple holes being formed in substrate；
Fig. 4 is the diagram of the example of the technique for showing substrate is separated into multiple bars；
Fig. 5 A to Fig. 5 D are the diagrams of the example for showing to form the technique of lateral electrode.
In whole the drawings and specific embodiments, identical label indicates identical element.Accompanying drawing can not to scale
Draw, for clear, explanation and conventionally, the relative size of element, ratio and description in accompanying drawing can be exaggerated.
Specific embodiment
Following specific embodiment is provided, to help reader to obtain to method described here, equipment and/or system
Comprehensive understanding.However, the various changes of method described here, equipment and/or system, modification and equivalent are for this area
Those of ordinary skill for will be apparent.The order of operation described here is only example, is not limited to be illustrated at this
Operation order, but in addition to the operation that must be carried out with particular order, can such as to one of ordinary skill in the art
For will be apparent being changed like that.Additionally, in order to more clear and succinct, one of ordinary skill in the art can be omitted
The description of known function and structure.
Feature described here can be implemented in different forms, and should not be construed as limited to described herein
Example.More specifically, there is provided example described here, so that the disclosure will be thoroughly with it is complete, and by the disclosure
Four corner convey to one of ordinary skill in the art.
Throughout the specification, it will be appreciated that, when the element of such as layer, region or wafer (substrate) is referred to as " " separately
One element " on ", " being connected to " or during " being attached to " another element, the element can directly " " another element " on ", " even
It is connected to " or " being attached to " another element, or there may be other elements between them.By contrast, when element quilt
Referred to as " directly exist " another element " on ", " being directly connected to " or during " being bonded directly to " another element, can not exist between
Element or layer between them.Like number represents same element all the time.As used herein, term "and/or" includes one
Any and all combinations in individual or more the associated item enumerated.
It will be apparent that, although can herein use the term such as " first ", " second ", " the 3rd " to describe various components, group
Part, region, layer and/or part, but these components, component, region, layer and/or part should not be limited by these terms.These
Term is only used for distinguishing a component, component, region, layer or part with another component, component, region, layer or part.Cause
This, the first component of discussion below, component, region, layer or part can be referred to as in the case where the teaching of embodiment is not departed from
Second component, component, region, layer or part.
For convenience of description, can use herein with the term of space correlation (for example, " ... on ", " top ",
" ... under " and " lower section " etc.), to describe the relation of an element and another element as illustrated.It will be understood that
, in addition to the orientation shown in accompanying drawing, it is intended to include device in use or operation not with the term of space correlation
Same orientation.For example, if the device in figure is reversed, be described as " " another element or feature " on " or " top " unit
Part be oriented with " " another element or feature " under " or " lower section ".Therefore, the specific direction based on accompanying drawing, term
" ... on " can include " ... on " and " ... under " two kinds of orientation.Device can be by positioning (rotation in addition
90 degree or at other orientations), and can to spatial relation description as used herein symbol correspondingly be explained.
Term as used herein is only used for describing specific embodiment, and is not intended to limit the disclosure.Unless context is another
Clearly indicate outward, singulative otherwise as used herein is also intended to include plural form.It will be further understood that when in this theory
In bright book using term " including " and/or during "comprising", indicate feature, integer, step, operation, component, the element described in presence
And/or combinations thereof, but do not preclude the presence or addition of one or more further features, integer, step, operation, component, unit
Part and/or combinations thereof.
Hereinafter, embodiment will be described with reference to schematic diagram.In the accompanying drawings, for example, due to manufacturing technology and/or public affairs
Difference, can estimate the modification of shown shape.Therefore, embodiment should not be construed as being limited to the specific of the region being shown in which
Shape, for example, however it is not limited to the change including caused vpg connection in manufacture.The following examples can also by one or they
Combination and constitute.
The content of invention described below design can have various constructions, and only propose the construction for needing herein, but
Not limited to this.
Fig. 1 is the indicative flowchart of the example of the method for showing manufacture array type chip resistor.
Reference picture 1, the method for manufacturing array type chip resistor includes：At regular intervals respectively in the upper table of substrate
Top electrode and bottom electrode are formed on face and lower surface, and resistor element (S110) is formed between the part of Top electrode；
The multiple holes (S120) through substrate are formed between resistor element；Multiple holes (S130) are filled using cream；Substrate is separated into
Multiple bars (S140)；Not applying on the side surface of each in the multiple bar forms lateral electrode on the region of cream
(S150)。
Fig. 2 to Fig. 4 is sequentially to be shown to manufacture the diagram of the method for array type chip resistor according to the flow chart of Fig. 1.
Hereinafter, reference picture 1, will describe manufacture array type chip in detail according to the order shown in Fig. 2 to Fig. 4
The method of resistor.
In addition, although Fig. 2 to Fig. 5 shows a case that substrate 100 includes four chip main bodys, and each chip main body includes
Four pairs of Top electrodes 110 and bottom electrode (that is, array type chip resistor includes four resistor elements 130), but, this
The restriction of sample is for illustration only and sets, and can also change the quantity and substrate of included resistor element in chip main body
In included chip main body quantity.
Fig. 2 is the schematic of the example of the substrate for showing to be formed with Top electrode 110, bottom electrode and resistor element 130
View.Reference picture 2, it will be acknowledged that Top electrode 110 is formed in upper surface 101 and lower surface at regular intervals
On the upper surface of 102 substrate 100.
Substrate 100 may be structured to the form of the thin plate of rectangular parallelepiped shape, and can be by its surface
By anodized and the aluminum with insulating properties is formed.
Can work as and be formed on the top of Top electrode 110 after mask layer, by using the conductive paste for forming electrode
Print process form Top electrode 110, or, can form upper electricity by methods such as infusion process, print process or sputtering methods
Pole 110.
Additionally, forming the multiple bottom electrode (not shown) for setting at predetermined intervals on the lower surface 102 of substrate 100.
Can substrate 100 and Top electrode 110 back to lower surface 102 on form bottom electrode.
It is similar to Top electrode 110, can work as and be formed on the top of bottom electrode after mask layer, by using conductive paste
Print process forms bottom electrode, or, bottom electrode can be formed by methods such as infusion process, print process or sputtering methods.
Resistor element 130 can be formed between the adjacent part of Top electrode 110.For example, resistor element 130 can be led
To be formed by the ruthenium-oxide (RuO) as main component.In this case, resistor element 130 and be arranged on resistor unit
The Top electrode 110 of the outside of part 130 can be electrically connected to each other.
Meanwhile, after resistor element 130 is formed, there can be the upper surface of resistor element 130 in the formation of substrate 100
Protective layer (not shown) is formed on 101.Protective layer can be by such as silicon (SiO2) or the material of glass formed, and can including will
Substrate is separated into the subsequent technique of multiple bars for protective resistor element.Protective layer may be formed at resistor element 130
Whole exposed surface on, but can also partly cover the Top electrode 110 of the outside for being arranged on resistor element 130 simultaneously
Interior section, so that resistor element 130 is fully sealed.
Additionally, resistor element 130 can have the predetermined resistance characteristic for hindering electric current to flow through array type chip resistor.
Therefore, resistor element 130 can have suitable electricity by using the trim process (trimming process) of laser beam
Resistance.
Fig. 3 is the perspective schematic view of the example of the substrate for showing to be printed with cream in multiple holes in a substrate are formed.
Reference picture 3, multiple holes 140 can be formed in substrate 100 and multiple holes 140 is filled using cream 150.
In detail, can be formed through multiple holes 140 of substrate 100, institute in the region for not forming resistor element 130
Each in stating 140 in multiple is located between adjacent Top electrode 110, can be in the predetermined of the substrate 100 including multiple holes 140
Printing paste 150 in region, so as to multiple holes 140 can be made to be filled with cream 150.
Here, can be on both the upper surface 101 of substrate 100 and lower surface 102 according in the inside in multiple holes 140
Form mode as the conforming layer of cream 150 to perform the printing of cream 150, and can perform on each surface one or more
It is secondary.Additionally, cream 150 can be selected from the chemical mask material or physical mask material for contributing to its attachment and cleaning operation.For example,
Cream 150 can include ethyl cellulose and additive (frit, ceramic powders).
Fig. 4 is the diagram of the example of the technique for showing substrate is separated into multiple bars.
Reference picture 4, substrate 100 can be separated into multiple bar 100' by cutting technique.Additionally, multiple bar 100' can be loaded
In the grip device for forming lateral electrode.Thereafter, can not applying on the side surface of each in multiple bar 100'
Lateral electrode is formed on the region of cream 150.
Then, the bar 100' of lateral electrode is formed with thereon can be separated into the plate resistor of chip unit by cutting technique
Device 100 ".
Fig. 5 is the diagram of the example for showing to form the technique of lateral electrode.
Fig. 5 shows the single chip resistor 100 on bar 100' " lateral electrode is formed on the region of (being shown in Fig. 4)
Technique.
Additionally, as described above, chip resistor 100 " may include cover resistor element whole exposed surface and
The protective layer (not shown) of the interior section of Top electrode 110 is simultaneously partially covered, with protective resistor element.
Reference picture 5A, can confirm to have printed cream in the inside of multiple holes 140 (Fig. 2) before lateral electrode is formed
150 bar 100'.
As shown in Figure 5 B, metal level 170 can be formed on the side surface of bar 100'.For example, can be formed by sputtering technology
Metal level 170.For example, metal level 170 can be formed by nichrome (NiCr).In metal level 170 by nichrome (NiCr) shape
In the case of, the sulfur resistance of lateral electrode can be improved.
Next, as shown in Figure 5 C, bar 100' capable of washing is therefrom removing cream 150.For example, cream 150 can be in water (H2O)、
NaOH、C2H5It is cleaned in OH etc., so as to be removed from bar 100'.
Then, as shown in Figure 5 D, coating 180 can be formed on metal level 170.
Meanwhile, cream 150 can be removed in the cleaning performed after forming coating 180.
That is, when lateral electrode is formed, can be by removing cream 150 and so that metal level 170 is merely retained in and does not apply
Plus lateral electrode is formed on the region of cream 150.
Coating 180 can be formed in lateral electrode in plating technic.Coating 180 may include in nickel (Ni), tin (Sn) extremely
Few one kind.And coating 180 may also include copper (Cu).For example, coating 180 may include the multiple layers with Ni coating and Sn coating
(and additional Cu coating).Ni coating can prevent the material of metal level 170 from leaching into the mounting process of chip resistor
In solder, Sn coating may be configured as being easy to make chip resistor be attached to solder in the mounting process of chip resistor.
As described above, the method for manufacture array type chip resistor can improve the efficiency of the technique to form lateral electrode, and
The defect in the technique to form lateral electrode can be reduced.
Additionally, array type chip resistor can make moderate progress in terms of the sulfur resistance of lateral electrode, and in array matrix
The precision aspect of formula resistor makes moderate progress.
Although exemplary embodiment has been shown and described above, will be obvious to those skilled in the art
It is that, in the case where the scope of the present invention being defined by the claims is not departed from, modifications and variations can be made.
Claims (9)
1. a kind of method for manufacturing array type chip resistor, methods described includes：
Top electrode is formed on the upper surface of substrate at regular intervals and bottom electrode is formed on the lower surface of substrate, and
Resistor element is formed between Top electrode；
Formed through multiple holes of substrate in the region for not forming resistor element, each hole position in the multiple hole is in phase
Between adjacent Top electrode；
The multiple hole is filled using cream；
Substrate is separated into multiple bars；
Lateral electrode is formed on the region for not applying cream on the side surface of each in the multiple bar.
2. the method for claim 1, wherein forming lateral electrode includes：
Metal level is formed on the side surface of the bar；
Remove the cream.
3. method as claimed in claim 2, wherein, form metal level using sputtering technology.
4. method as claimed in claim 2, wherein, in the step of forming lateral electrode, by removing the cream and causing
Metal level is merely retained on the region for not applying the cream to form lateral electrode.
5. the method for claim 1, methods described also includes：Have on the upper surface of resistor element in the formation of substrate
Form protective layer.
6. the method for claim 1, methods described also includes：Coating is formed in lateral electrode.
7. the method for claim 1, methods described also includes：The bar that lateral electrode will be formed with is separated into chip unit.
8. the method for claim 1, wherein lateral electrode is formed by nichrome.
9. a kind of array type chip resistor, the array type chip resistor is by according to any one in claim 1 to 8
Method described in claim is manufactured.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020150175849A KR20170068864A (en) | 2015-12-10 | 2015-12-10 | Method for manufacture of the array type chip resister and the array type chip resistor fabricating by the method |
| KR10-2015-0175849 | 2015-12-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106876068A true CN106876068A (en) | 2017-06-20 |
Family
ID=59238725
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610767454.0A Withdrawn CN106876068A (en) | 2015-12-10 | 2016-08-30 | Array type chip resistor and the method for manufacturing the array type chip resistor |
Country Status (2)
| Country | Link |
|---|---|
| KR (1) | KR20170068864A (en) |
| CN (1) | CN106876068A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5334968A (en) * | 1992-03-02 | 1994-08-02 | Rohm Co., Ltd. | Chip network-type resistor array |
| JP2000348914A (en) * | 1999-06-04 | 2000-12-15 | Rohm Co Ltd | Network electronic component |
| CN101826384A (en) * | 2009-03-02 | 2010-09-08 | 昆山厚声电子工业有限公司 | Method for manufacturing arrayed chip resistor |
-
2015
- 2015-12-10 KR KR1020150175849A patent/KR20170068864A/en not_active Application Discontinuation
-
2016
- 2016-08-30 CN CN201610767454.0A patent/CN106876068A/en not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5334968A (en) * | 1992-03-02 | 1994-08-02 | Rohm Co., Ltd. | Chip network-type resistor array |
| JP2000348914A (en) * | 1999-06-04 | 2000-12-15 | Rohm Co Ltd | Network electronic component |
| CN101826384A (en) * | 2009-03-02 | 2010-09-08 | 昆山厚声电子工业有限公司 | Method for manufacturing arrayed chip resistor |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20170068864A (en) | 2017-06-20 |
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|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
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| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20170620 |
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| WW01 | Invention patent application withdrawn after publication |