CN106873909B

CN106873909B - Storage access method and system and storage device

Info

Publication number: CN106873909B
Application number: CN201710046343.5A
Authority: CN
Inventors: 龚成
Original assignee: Buildwin International Zhuhai Ltd
Current assignee: BUILDWIN INTERNATIONAL (ZHUHAI) LTD.
Priority date: 2017-01-22
Filing date: 2017-01-22
Publication date: 2020-06-30
Anticipated expiration: 2037-01-22
Also published as: CN106873909A

Abstract

The present invention relates to the field of memory technologies, and in particular, to a memory access method, a system thereof, and a memory device. The storage device comprises a first storage module, a second storage module and a processing module; the first storage module is used for storing virtual instructions; the processing module is used for reading the virtual instruction, analyzing the virtual instruction into an execution instruction, and accessing the second storage module according to the execution instruction. On one hand, when a second storage module of a new type appears, a virtual instruction corresponding to the second storage module of the new type can be configured for the first storage module, so that the compatibility of the processing module for accessing the second storage module is improved; on the other hand, compared with the prior art, the method can construct a simplified virtual instruction, thereby saving the memory capacity for storing the instruction and reducing the production cost.

Description

Storage access method and system and storage device

Technical Field

The present invention relates to the field of memory technologies, and in particular, to a memory access method, a system thereof, and a memory device.

Background

At present, in a storage system, when a master controller is equipped with a plurality of storage devices as storage devices, the master controller needs to consider the drive boot codes of the plurality of storage interfaces, and once the integrated boot codes have the defect of compatibility, the application robustness of the master controller to the storage support is reduced.

In the related art, a memory of a master stores a driver boot code for driving a storage, and when the master accesses the storage, the master accesses the storage by calling and executing the driver boot code.

However, in the process of implementing the present invention, the inventor finds that at least the following problems exist in the prior related art: when the master control needs to access the new type of storage, the master control fails to access the storage because the master control's memory does not yet store the drive boot code corresponding to the new type of storage, and the compatibility of the master control is poor. Also, when the master needs to complete a particular access to the memory, for example, a rising edge reads the data. The prior art masters require multiple driver boot code executions to accomplish this access. Therefore, the master needs to consume a large memory capacity to store these driver boot codes.

Disclosure of Invention

An object of the embodiments of the present invention is to provide a storage access method, a system thereof, and a storage device, which solve the technical problems of poor compatibility of the access storage method in the prior art and large memory capacity for storing a driver boot code.

In order to solve the above technical problems, embodiments of the present invention provide the following technical solutions:

in a first aspect, an embodiment of the present invention discloses a storage device, where the storage device includes a first storage module, a second storage module, and a processing module;

the first storage module is used for storing a virtual instruction, the virtual instruction comprises a logic operation instruction and an I/O operation instruction, and the I/O operation instruction corresponds to a level control signal of an I/O interface of the second storage module;

the processing module is used for reading a virtual instruction, analyzing the virtual instruction into an execution instruction, and accessing the second storage module according to the execution instruction.

Optionally, before reading the virtual instruction, the processing module is further configured to: and constructing a plurality of I/O operation instructions according to the reading sequence of accessing the second storage module.

Optionally, the logic operation instruction at least includes one or more than two of the following operation instructions: a loop instruction, a jump instruction, a judgment instruction and an end instruction.

Optionally, the I/O operation instruction at least includes one or more than two of the following operation instructions: a high level instruction, a low level instruction, a rising edge instruction, a falling edge instruction, a high jump instruction, a low jump instruction, an output data instruction, and a read data instruction.

Optionally, the first storage module is an electrically erasable programmable read only memory.

In a second aspect, an embodiment of the present invention provides a storage access method, where the method includes:

reading a virtual instruction, wherein the virtual instruction comprises a logic operation instruction and an I/O operation instruction, and the I/O operation instruction corresponds to a level control signal of an I/O interface of the second storage module;

parsing the virtual instruction into an execution instruction;

and accessing the second storage module according to the execution instruction.

Optionally, before reading the virtual instruction, the method further includes:

constructing a plurality of I/O operation instructions according to the reading sequence of accessing the second storage module;

and storing the I/O operation instruction.

In a third aspect, an embodiment of the present invention provides a storage access system, where the storage access system includes the storage device described above.

In the embodiments of the present invention, on one hand, a plurality of types of virtual instructions for driving the second storage module are configured for the first storage module, and when a new type of second storage module occurs, a virtual instruction corresponding to the new type of second storage module may be further configured for the first storage module, so as to improve the compatibility of the processing module accessing the second storage module; on the other hand, since the virtual instruction includes a logic operation instruction and an I/O operation instruction, the processing module may access the I/O interface of the second storage module according to the logic operation instruction and the I/O operation instruction. Compared with the prior art, the method can construct a simplified virtual instruction, and when the same operation (reading 1-byte data on the rising edge) for accessing the second storage module is executed, the prior art needs to spend a large number of instructions to achieve the purpose, however, the processing module can achieve the purpose through a short virtual instruction, so that the memory capacity for storing the instructions is saved, and the production cost is reduced.

Drawings

One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.

FIG. 1 is a schematic structural diagram of a storage device according to an embodiment of the present invention;

FIG. 2 is a flow chart illustrating a method for accessing a storage according to an embodiment of the present invention;

fig. 3 is a flowchart illustrating a storage access method according to another embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

In a storage system, when the storage system is powered on and operated, a controller in the storage system needs to read system codes from a memory in which the system codes are stored for initialization. At this point, the controller needs to load the boot code for driving the memory to access the memory and read the system code in the memory. In some embodiments, the boot code may be pre-stored in a Read-Only Memory (ROM) or MASK ROM Memory of the controller. In some embodiments, the boot code may also be pre-stored in a memory module of the peripheral.

The boot code for each memory is different. When the controller needs to access the memory storing the system code, and the memory is a new type of memory, and the boot code driven by the memory is not pre-stored in the read-only memory of the controller, the controller cannot access the memory, and therefore, the compatibility of the memory system is poor. However, in the embodiments of the present invention, in order to improve the compatibility of the storage system, the boot codes corresponding to the various types of memories may be stored in a storage module of the peripheral device, and when a new memory with a new boot code appears in the storage system, the new boot code may be burned in the storage module in advance. When the controller needs to access the new memory, the new boot code may be called from the storage module in advance, and the new memory may be accessed according to the new boot code. Therefore, the memory system adopting this manner can be compatible with various types of memories.

In some embodiments, the storage system to which the above and following embodiments are applied includes, but is not limited to, the following electronic products: USB flash Disk (USB flash Disk), Secure Digital Card (SD Card), Card Reader (Card Reader), SSD Solid State Disk (SSD), and so on.

When the "calling the boot code from the storage module to access the memory in which the system code is stored" is adopted, in some embodiments, the code amount of the boot code is large, and therefore, it is necessary to use the storage module having a large storage capacity to store the boot code, however, the cost of using the storage module having a large storage capacity is also increased. In particular, in the booting process of the storage system, in order to improve the compatibility of the storage system and store a large amount of boot codes, the storage module mostly uses a Serial Peripheral Interface (SPI) interface, for example, a piece of 2M byte spiflish can store 2048byte boot codes, and the price is generally 0.80 rmb. However, for a memory system with relatively low production cost, the cost of using SPI FLASH accounts for about 10% of the overall cost, which makes the way of using spiflah as a memory module restricted in the practical production process.

Further, in order to reduce the cost, fig. 1 is a schematic structural diagram of a storage device according to an embodiment of the present invention. As shown in fig. 1, the storage device 100 includes a first storage module 11, a second storage module 12, and a processing module 13, wherein the processing module 13 is connected to the first storage module 11 and the second storage module 12, respectively. The first storage module 11 stores virtual instructions, and when the storage device 100 is powered on, the processing module 13 accesses the first storage module 11 through the IIC interface and reads the virtual instructions from the first storage module 11, parses the virtual instructions into execution instructions, and accesses the second storage module 12 through the main storage interface according to the execution instructions. The virtual instruction is used to instruct the processing module 13 to complete the corresponding logic operation and to access the I/O operation of the I/O interface of the second storage module 12 based on the cooperation of the logic operation, for the purpose of accessing the second storage module 12. The virtual command includes a logic operation command and an I/O operation command, and the I/O operation command corresponds to a level control signal of an I/O interface of the second memory module 12. For example, when the processing module 13 reads 1byte of data by outputting a rising edge to the second storage module 12 in three cycles, the logic operation instruction corresponds to a logic operation of "cycle three times", and the I/O operation instruction corresponds to an "output rising edge".

In some embodiments, the virtual instructions may be formed by self-construction, which can replace standard instructions recognizable by the processing module 13, and which are characterized by short and compact construction, with a certain code length. Therefore, in some embodiments, before reading the virtual instructions, the processing module 13 may construct several I/O operation instructions according to the read sequence accessing the second storage module 12, and compress and store the I/O operation instructions in the first storage module 11. Wherein different types of the second storage module 12 have different read timings, and therefore, the processing module 13 can construct different types of I/O operation instructions. Because the processing module 13 constructs the I/O operation instruction according to the read sequence of the second storage module 12, when the processing module 13 accesses the second storage module 12, it is not necessary to consider the interface type of the second storage module 12, and thus it is possible to access the second storage module 12.

The read sequence of the second memory block 12 includes various types of level control signals, for example, the level control signals may be a high level signal, a low level signal, a rising edge signal, a falling edge signal, a high jump signal, a low jump signal, an output data signal, a read data signal, and so on. Meanwhile, the I/O operation command is a command corresponding to the level control signal, and thus the I/O operation command includes at least one or two or more of the following: a high level instruction, a low level instruction, a rising edge instruction, a falling edge instruction, a high jump instruction, a low jump instruction, an output data instruction, and a read data instruction. Each I/O operation instruction has a certain code length, wherein the code length is customized by a developer according to business requirements.

Of course, the processing module 13 may also construct the logical operation instructions according to the pre-rules before reading the virtual instructions. The logic operation instruction at least comprises one or more than two of the following operation instructions: a loop instruction, a jump instruction, a judgment instruction and an end instruction.

In the following, for describing the virtual instructions in detail, the present embodiment provides a virtual instruction table, as shown in table 1, which can give the type, meaning and code length of each virtual instruction, however, it should be understood by those skilled in the art that the content provided in table 1 is not a limitation to the technical solution disclosed in the embodiments of the present invention, and is used for explanation only.

TABLE 1

Referring to table 1, by constructing a short and simple virtual instruction to replace a standard instruction of the processing module 13, on one hand, by configuring a plurality of types of virtual instructions for driving the second storage module 12 to the first storage module 11, and when a new type of second storage module 12 appears, a virtual instruction corresponding to the new type of second storage module 12 may be further configured to the first storage module 11, so as to improve the compatibility of the processing module 13 accessing the second storage module 12; on the other hand, since the virtual instruction includes a logic operation instruction and an I/O operation instruction, the processing module 13 can access the I/O interface of the second storage module 12 according to the logic operation instruction and the I/O operation instruction. Compared with the prior art, the method can construct a simplified virtual instruction, and when the same operation (reading 1-byte data on the rising edge) for accessing the second storage module 12 is executed, the prior art needs to spend a large number of instructions to achieve the purpose, however, the processing module 13 can achieve the purpose through a short virtual instruction, so that the memory capacity for storing the instruction is saved, and the production cost is reduced.

In some embodiments, because the virtual instruction is self-building, the processing module 13 is not able to identify and execute the virtual instruction to access the second storage module 12. Thus, processing module 12 needs to load virtual instruction parsing firmware that can parse virtual instructions into execution instructions that can be recognized and executed by processing module 12 according to specified rules as shown in table 1. Further, the processing module 12 accesses the storage interface of the second storage module 12 according to the execution instruction, and may read the system code from the second storage module 12 for initialization.

In some embodiments, the first memory module 11 is an electrically erasable Programmable Read-Only memory (EEPROM). The virtual instruction is compressed and stored in the first storage module 11. In contrast to the case where the first storage module 11 is an SPI FLASH (which stores standard commands that can be executed by the processing module 13), the EEPROM memory has a small capacity, but can satisfy the storage of reduced virtual commands. However,

in the following, in order to explain the differences between the cost and the compression capacity of the SPI FLASH and the EEPROM memory in detail, the embodiment of the present invention provides table 2, and table 2 is a comparison diagram between the cost and the compression capacity of the SPI FLASH and the EEPROM memory provided in the embodiment of the present invention. The comparison here is based on the processing module 13 completing access to the same functionality of the second memory module 12.

TABLE 2

Storage type	Type (for example)	Capacity (examples)	Price	Boot code
					EEPROM	AT24C02	256byte	0.09 RMB	About 120bye (compression)
SPI FLASH		2M byte	0.80 RMB	2048byte left and right (uncompressed)

As shown in table 2, the boot code using the dummy command has a smaller capacity than the boot code using the standard command of the processing module 13, and therefore, the EEPROM memory of low cost can be selected using the dummy command.

In some embodiments, the second storage module 12 may be a Nand-flash memory. Also, the second storage module 12 may also be a storage module of an external electronic device.

In some embodiments, the Processing module 13 may be a Central Processing Unit (CPU), SSD controller, SD controller, or U disk controller. In some embodiments, the processing module 13 may also be comprised of a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. Also, here, the processing module 13 can be any conventional processor, controller, microcontroller, or state machine. Processing module 13 may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

In the following, the embodiments of the present invention provide related examples to further illustrate the working principle of the memory device provided by the embodiments of the present invention.

Referring back to table 1 and fig. 1, for example: reading 1byte of data on the rising edge of the output clock of the I/O interface of the Nand-flash memory (the second storage module 12) by using an OR100K microprocessor (the processing module 13):

if the standard instruction supported by the microprocessor is used to read data, the number of required instructions is 18, and the capacity of 18 instructions is 72 bytes. As follows:

20118d8:00 80 60 a8 1.ori r3,r0,0x8000

20118dc:fc 17 e1 d7 1.sw -4(r1),r2

20118e0:f8 0f e1 d7 1.sw -8(r1),r1

20118e4:f4 ff 21 9c 1.addi r1,r1,-12

20118e8:00 00 83 b4 1.mfspr r4,r3,0x0

20118ec:fd ff 40 9c 1.addi r2,r0,-3

20118f0:02 00 84 a8 1.ori r4,r4,0x2

20118f4:00 20 03 c0 1.mtspr r3,r4,0x0

20118f8:04 80 80 a8 1.ori r4,r0,0x8004

20118fc:00 00 84 b4 1.mfspr r4,r4,0x0

2011900:ff 00 84 a4 1.andi r4,r4,0xff

2011904:03 20 01 d8 1.sb 3(r1),r4

2011908:00 00 83 b4 1.mfspr r4,r3,0x0

201190c:03 10 84 e0 1.and r4,r4,r2

2011910:00 20 03 c0 1.mfspr r3,r4,0x0

2011914:0c 00 21 9c 1.addi r1,r1,12

2011918:f8 ff 21 84 1.lwz r1,-8(r1)

201191c:fc ff 41 84 1.lwz r2,-4(r1)

however, when data is read by using a virtual instruction, the number of required instructions is 2, and the capacity of 2 instructions is 2 bytes. As follows:

IO x1bit output rising edge

IO x8bit read data

Therefore, it can construct a simplified virtual instruction, and when the same operation (reading 1byte of data on the rising edge) accessing the second storage module is executed, the prior art needs to spend a large amount of instructions to achieve the purpose, however, the processing module can achieve the purpose through a short virtual instruction, thereby saving the memory capacity for storing the instructions and reducing the production cost.

As another aspect of the embodiment of the present invention, an embodiment of the present invention provides a flowchart of a storage access method. The storage access method is used in the storage device shown in the above embodiments, and as shown in fig. 2, the storage access method includes:

step 20, reading a virtual instruction, wherein the virtual instruction comprises a logic operation instruction and an I/O operation instruction, and the I/O operation instruction corresponds to a level control signal of an I/O interface of the second storage module;

step 21, analyzing the virtual instruction into an execution instruction;

and step 22, accessing the second storage module according to the execution instruction.

In this embodiment, on one hand, by configuring a plurality of types of virtual instructions for driving the second storage module, and when a new type of second storage module occurs, a virtual instruction corresponding to the new type of second storage module may be additionally configured, so as to improve compatibility of accessing the second storage module; on the other hand, because the virtual instruction includes a logic operation instruction and an I/O operation instruction, the I/O interface of the second storage module can be accessed according to the logic operation instruction and the I/O operation instruction. Compared with the prior art, the method can construct a simplified virtual instruction, and when the same operation (reading 1-byte data on the rising edge) for accessing the second storage module is executed, the prior art needs to spend a large number of instructions to achieve the purpose, however, the purpose can be achieved through a short virtual instruction, so that the memory capacity for storing the instructions is saved, and the production cost is reduced.

In some embodiments, as shown in fig. 3, before reading the dummy instruction, the storage access method further comprises:

step 23, constructing a plurality of I/O operation instructions according to the reading sequence of the access storage module;

step 24, storing the I/O operation instruction.

Since the embodiment of the storage device and the embodiment of the storage access method are based on the same concept, the contents of the embodiment of the storage device may refer to the embodiment of the method on the premise that the contents do not conflict with each other, which is not described herein again.

As another aspect of the embodiments of the present invention, an embodiment of the present invention provides a storage access system, where the storage access system includes the storage device of each of the above embodiments.

In this embodiment, on one hand, a plurality of types of virtual instructions for driving the second storage module are configured for the first storage module, and when a new type of second storage module appears, a virtual instruction corresponding to the new type of second storage module may be further configured for the first storage module, so as to improve the compatibility of the processing module for accessing the second storage module; on the other hand, since the virtual instruction includes a logic operation instruction and an I/O operation instruction, the processing module may access the I/O interface of the second storage module according to the logic operation instruction and the I/O operation instruction. Compared with the prior art, the method can construct a simplified virtual instruction, and when the same operation (reading 1-byte data on the rising edge) for accessing the second storage module is executed, the prior art needs to spend a large number of instructions to achieve the purpose, however, the processing module can achieve the purpose through a short virtual instruction, so that the memory capacity for storing the instructions is saved, and the production cost is reduced.

Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; within the idea of the invention, also technical features in the above embodiments or in different embodiments may be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the invention as described above, which are not provided in detail for the sake of brevity; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

Claims

1. The storage device is characterized by comprising a first storage module, a second storage module and a processing module;

the first storage module is used for storing a virtual instruction, the virtual instruction comprises a logic operation instruction and an I/O operation instruction, and the I/O operation instruction is self-constructed according to the reading sequence of the second storage module;

the I/O operation instruction corresponds to a level control signal of an I/O interface of the second storage module; the processing module is used for reading a virtual instruction, analyzing the virtual instruction into an execution instruction, and accessing the second storage module according to the execution instruction.

2. The storage device according to claim 1, wherein the logical operation instructions include at least one or more of the following: a loop instruction, a jump instruction, a judgment instruction and an end instruction.

3. The storage device according to claim 1, wherein the I/O operation instructions include at least one or more of the following: a high level instruction, a low level instruction, a rising edge instruction, a falling edge instruction, a high jump instruction, a low jump instruction, an output data instruction, and a read data instruction.

4. The memory device according to any one of claims 1 to 3, wherein the first memory module is an electrically erasable programmable read only memory.

5. A storage access method, comprising:

reading a virtual instruction, wherein the virtual instruction comprises a logic operation instruction and an I/O operation instruction, and the I/O operation instruction is self-constructed according to the reading sequence of the second storage module;

the I/O operation instruction corresponds to a level control signal of an I/O interface of the second storage module; parsing the virtual instruction into an execution instruction;

and accessing the second storage module according to the execution instruction.

6. The method of claim 5, wherein prior to reading the dummy instruction, the method further comprises:

and storing the I/O operation instruction.

7. The method of claim 1, wherein the logical operation instructions comprise at least one or more of the following: a loop instruction, a jump instruction, a judgment instruction and an end instruction.

8. The method of claim 1, wherein the I/O operation instructions comprise at least one or more of the following: a high level instruction, a low level instruction, a rising edge instruction, a falling edge instruction, a high jump instruction, a low jump instruction, an output data instruction, and a read data instruction.

9. A storage access system comprising a storage device according to any one of claims 1 to 4.