CN106814295B - Multi-channel circuit testing device and deep brain electrode testing method - Google Patents
Multi-channel circuit testing device and deep brain electrode testing method Download PDFInfo
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- CN106814295B CN106814295B CN201710162261.7A CN201710162261A CN106814295B CN 106814295 B CN106814295 B CN 106814295B CN 201710162261 A CN201710162261 A CN 201710162261A CN 106814295 B CN106814295 B CN 106814295B
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/12—Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
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Abstract
The invention provides a multi-channel circuit testing device, which belongs to the technical field of circuit testing and comprises a main testing circuit and a tested channel switching circuit, wherein the tested channel switching circuit comprises a main processor and at least two controllable switches controlled to be switched on and off by the main processor, and the controllable switches are respectively connected in series in a circuit loop formed by the main testing circuit and electrodes of each channel to be tested. The main processor can enable the main test circuit to be connected with different channels to be tested by controlling the on-off of different controllable switches, so that the automatic test process of a plurality of channels to be tested can be realized. Compared with a method for manually switching test channels, the method is simple in test operation, high in test efficiency and high in reliability.
Description
Technical Field
The invention relates to the technical field of circuit testing, in particular to a multi-channel circuit testing device and a brain deep electrode testing method.
Background
At present, when a voltage withstand test or a conduction test of a multi-channel circuit is performed, two test ends of a tester need to be manually connected with electrodes at two ends of a channel to be tested respectively for testing, and after one channel is measured, the two test ends are moved to electrodes at two ends of another channel to be tested respectively to complete the test of the other channel. For example, a deep brain electrode including a plurality of contacts has a large number of contacts, a high density of electrode wires having the same cross-sectional area, and a complicated production process, and the final product is strictly screened by a voltage withstand test. The voltage-withstanding test method mainly used at present is to directly clamp two output electrode interfaces of a voltage-withstanding instrument on a tested electrode contact for testing, manual intervention is needed to rewire and restart the voltage-withstanding instrument after one group of electrodes are tested, and the operation flow is complex. On the other hand, because electrode contacts are more, repeated testing or missing testing can easily occur in manual wiring, and hidden dangers exist in product screening.
Disclosure of Invention
Therefore, the technical problem to be solved by the invention is that when the number of channels to be tested is large, the test circuits are connected one by manpower, so that the operation is complicated, the condition of test missing is easy to occur, and the reliability of the test result is low.
Therefore, the embodiment of the invention provides the following technical scheme:
a multi-channel circuit testing device comprises a main testing circuit and a tested channel switching circuit, wherein the tested channel switching circuit comprises a main processor and at least two controllable switches controlled to be switched on and off by the main processor, and the controllable switches are respectively connected in series in a circuit loop formed by the main testing circuit and electrodes of each channel to be tested.
Optionally, the controllable switch is a solid-state relay, two input ends of the solid-state relay are respectively connected with the main processor, two ends of one output are respectively connected with one end of the main test circuit voltage supply circuit and one electrode of the channel to be tested, and two ends of the other output are respectively connected with the other end of the main test circuit voltage supply circuit and the other electrode of the channel to be tested.
Optionally, the main test circuit includes a voltage acquisition circuit for acquiring voltages at two ends of the channel to be tested, and an output end of the voltage acquisition circuit is connected to the main processor.
Optionally, the test device further comprises a display circuit for displaying the test parameters and the test state, wherein the display circuit comprises a display device and a connector, and the display device is connected with the main processor through the connector.
Optionally, the device further comprises at least one key circuit, and the key circuits are respectively connected with the main processor and used for controlling the start and stop of the test process, setting the start channel and the end channel of the test, and selecting different test parameters.
Optionally, the key circuit includes a key element, a first capacitor and a first resistor, the first capacitor is connected in parallel with the first resistor, and then one end of the first capacitor is connected to one end of the key element, the other end of the first capacitor is grounded, and the other end of the key element is connected to the power supply.
Optionally, the power supply system further comprises a power supply management circuit and an energy storage module, wherein the power supply management circuit comprises a charge and discharge management circuit and a voltage conversion circuit, the charge and discharge management circuit is used for controlling the charge and discharge process of the energy storage module, and the voltage conversion circuit is used for converting the output voltage of the energy storage module into the voltage required by the circuit to be powered.
Optionally, the charging and discharging management circuit includes a charging management chip, and a state indication output end of the charging management chip is connected to the main processor.
Optionally, the energy storage module further comprises a voltage detection circuit for detecting the voltage of the energy storage module, and the voltage detection circuit is connected with the main processor.
Optionally, the voltage conversion circuit includes a voltage conversion chip, an electric energy input end of the voltage conversion chip is connected to the energy storage module, and an electric energy output end of the voltage conversion chip is connected to the circuit to be powered.
The invention also provides a brain deep electrode testing method, which adopts the device and comprises the following steps:
carrying out voltage withstanding test on any two electrode contacts;
after the withstand voltage test is finished, connecting a first electrode contact and a second electrode contact and/or a second electrode contact and a third electrode contact on the deep brain electrode from the top end by using a resistor, wherein the resistance value of the resistor is 300-500 ohms, then, introducing a voltage of 50-150V to the second electrode contact on the deep brain electrode from the top end, adjusting the voltage value until the temperature at the electrode contacts rises to 80-90 ℃, and keeping for 2s;
after the test, the brain deep part electrode is still intact and is a good product, otherwise, the brain deep part electrode is a waste product.
The technical scheme of the invention has the following advantages:
according to the testing device provided by the embodiment of the invention, the main processor can enable the main testing circuit to be connected with different channels to be tested by controlling the on-off of different controllable switches, so that the automatic testing process of a plurality of channels to be tested can be realized. Compared with a method for manually switching channels to be tested, the method has the advantages that the operation process is simple, the workload of testers is reduced, the testing efficiency is improved, in addition, the repeated testing or missing testing condition which is easily caused by manual wiring when the number of electrode contacts is large is also avoided, and the testing accuracy and reliability are greatly improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a diagram of a host processor and its peripheral circuits according to an embodiment of the present invention;
FIG. 2 is a circuit diagram of a voltage acquisition circuit according to an embodiment of the present invention;
FIG. 3 is a pin connection diagram of a solid state relay in an embodiment of the invention;
FIG. 4 is a circuit diagram of a display circuit according to an embodiment of the present invention;
FIG. 5 is a key circuit diagram according to an embodiment of the present invention;
FIG. 6 is a circuit diagram of charge and discharge management according to an embodiment of the present invention;
FIG. 7 is a diagram of a voltage conversion circuit according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a deep brain electrode.
Description of reference numerals:
1-a sleeve; 2-electrode contact; 21-a wire; 3-a temperature sensor; 31-signal transmission line
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Example 1
As shown in fig. 1-2, this embodiment provides a multi-channel circuit testing apparatus, including a main testing circuit, which is used to provide a voltage for testing, detect and output voltages at two ends of a channel to be tested, where the main testing circuit may be a voltage-withstanding instrument, and the apparatus further includes a channel switching circuit to be tested, where the channel switching circuit to be tested includes a main processor and at least two controllable switches controlled by the main processor to be turned on and off, and the controllable switches are respectively connected in series in a circuit loop formed by the main testing circuit and electrodes of each channel to be tested. The main processor can adopt an ARM-based 32-bit microcontroller STM32F103VET6, and the main processor can enable the main test circuit to be connected with different channels to be tested by controlling the on-off of different controllable switches, so that the automatic test process of a plurality of channels to be tested can be realized. The number of the controllable switches corresponds to the number of the channels to be tested, and specifically, the number of the controllable switches may be 18 as shown in fig. 3, or may be other reasonable number greater than 2, so that each channel to be tested is sequentially conducted with the main test circuit.
The testing device provided by the embodiment can be used for detecting whether the insulation resistance and the power frequency withstand voltage of the channel to be tested meet the design standard, and the specific testing process can be as follows: and sequentially controlling the two ends of one channel to be tested to be conducted with the output voltage end of the voltage-withstanding instrument according to a preset algorithm in the main processor, so that the power frequency voltage output by the voltage-withstanding instrument is added at the two ends of the channel to be tested, the voltage at the two ends of the channel to be tested is detected in real time by the voltage-withstanding instrument and is output, and if the voltage at the two ends of the channel to be tested abnormally drops, the voltage-withstanding test of the channel to be tested is judged to be unqualified. Wherein, the two ends of the channel to be tested are electrode contacts, that is, the connection of the circuit loop is realized through the electrode contacts. The testing device can be particularly applied to the withstand voltage test of the multi-contact brain deep electrode. Compared with the existing mainstream voltage-withstanding test method for directly clamping two output electrode interfaces of the voltage-withstanding instrument on the tested electrode contact for testing, the method saves the process of manually intervening rewiring and restarting the voltage-withstanding instrument after testing each group of electrodes, has simple operation flow, reduces the workload of testers, improves the test efficiency, avoids the repeated test or test missing condition which easily occurs when manual wiring is carried out when the number of electrode contacts is large, and greatly increases the accuracy and reliability of the test.
The test device can also be used for other types of tests, such as testing the conduction performance among channels to be tested.
In a specific embodiment, the main test circuit includes a voltage acquisition circuit for acquiring voltages at two ends of the channel to be tested, and an output end of the voltage acquisition circuit is connected with the main processor, specifically, a PC1 port of the main processor, so that the main processor can acquire the test voltage of the channel to be tested in real time, and thus, whether the channel to be tested is qualified is judged. As shown in fig. 2, the voltage acquisition circuit mainly includes resistors R438 and R439 connected in series, and is configured to divide the voltage at two ends of the channel to be detected and input the divided voltage to the main processor; a capacitor C419 is also included to provide a path for the inverted ac signal. In addition, as shown in fig. 3, the controllable switch may be a solid-state relay, for example, a dual-channel solid-state relay CT338 of COTOmos, two input ends of the solid-state relay are respectively connected to the main processor to receive an on-off control signal of the main processor, two ends of one output are respectively connected to one end of the main test circuit voltage supply circuit and one electrode of the channel to be tested, and two ends of the other output are respectively connected to the other end of the main test circuit voltage supply circuit and the other electrode of the channel to be tested. Therefore, the electrode at the two ends of the channel to be tested and the loop of the main test circuit voltage supply circuit can be conducted, and meanwhile, a voltage acquisition circuit used for detecting the voltage at the two ends of the channel to be tested in the main test circuit can also be conducted.
As shown in fig. 4, the testing apparatus provided in this embodiment further includes a display circuit for displaying the testing parameters and the testing status, for example, for displaying the testing start channel, the testing end channel, the power-on time, the time interval, the charging/discharging status of the energy storage power supply, the testing status of the channels, and the like, where the display circuit includes a display device and a connector J30, and the display device is connected to the main processor through the connector J30. Specifically, the display device may be a liquid crystal display panel, and the connector J30 may be FH12A-20S-0.5SH having 20 ports. The main processor is used as a main device, the display device is used as a slave device, an SPI communication interface PB12_ SPI2_ NSS of the main processor is connected with a chip selection end CS of the display device, a PD11 port of the main processor is connected with a data/command selection end RS of the display device, an SPI communication clock signal end PB13_ SPI2_ SCK of the main processor is connected with a port SCL of the display device for receiving clock signals, an SPI communication data output interface PB15 of the main processor is connected with a data receiving port SDI of the display device, a RESET signal output end PD13 of the main processor is connected with a RESET signal receiving end RESET of the display device, enabling signal output ends PE0 and PE1 of the main processor are respectively connected with control ends of controllable switches Q31 and Q30, the controllable switch Q31 is used for controlling the on-off of a power supply of a connector J30, and the controllable switch Q30 is used for controlling the on-off of one of the display component LED-A and the power supply. The display circuit can be matched with a main processor serving as a control circuit to realize a human-computer interaction function.
In addition, the device also comprises at least one key circuit which is respectively connected with the main processor and used for controlling the starting and stopping of the test flow, setting the starting channel and the ending channel of the test and selecting different test parameters. In a specific embodiment, the key circuit needs to be combined with a display circuit to realize the accurate setting of the test channel and the test parameters. The key circuit comprises a key element, a first capacitor and a first resistor, wherein one end of the first capacitor is connected with one end of the key element after being connected with the first resistor in parallel, the other end of the first capacitor is grounded, the other end of the key element is connected with a power supply, and the power supply can be an energy storage module or a voltage conversion circuit of the device. As shown in fig. 5, in this embodiment, 4 paths of key circuits may be provided for implementing different functions, respectively, and a loop (a connection between a key element and a first capacitor, and a connection between a key element and a first resistor) of each key circuit is connected to one input interface (ports PA0, PD8, PD9, and PC11, respectively) of the main processor, so that the main processor may receive control signals sent by key operations, respectively.
The testing device provided by the embodiment can provide channel testing among up to 18 electrode contacts, but the number of the channels to be tested is possibly small in practical use, so that the starting channel and the ending channel of the testing can be set through the key circuit. Therefore, the test flow is not performed for the test circuit which is not connected with the electrode contact to be tested. That is, the testing algorithm of the testing device and the number of the tested channels can be flexibly set according to the requirement, and the universality of the device is improved. In addition, test parameters such as the power-on time and the interval time can be set through the key circuit, so that the main processor can perform traversal test on the channel to be tested according to the initial channel, the end channel, the power-on time and the interval parameter set by a user, acquire the voltage signal acquired by the voltage acquisition circuit in real time, and finally judge whether the current channel to be tested passes the test according to the voltage signal, wherein the specific judgment logic is as follows: if the voltage signal is larger than the preset threshold value, judging that the current channel to be tested passes the test, and displaying a prompt message of 'test passing' on a display device of the display circuit; and if the voltage signal is smaller than the preset threshold value, judging that the current tested channel is unqualified in test, displaying a prompt of test failure on a display device of the display circuit, specifically displaying the electrode contact number of the test failure by using a red font, and continuously flashing for 5 times on a display interface to prompt a user to check the tested electrode contact.
As another specific implementation manner, the test apparatus further includes a power management circuit and an energy storage module, where the energy storage module may be specifically an energy storage battery BAT, and the power management circuit includes a charge and discharge management circuit and a voltage conversion circuit. The charging and discharging management circuit is used for controlling the charging and discharging process of the energy storage module and identifying an external input direct current power supply. The voltage conversion circuit is used for converting the output voltage of the energy storage module into the voltage required by the circuit to be powered, so that power utilization management is realized, and power distribution is completed. The circuit to be powered comprises a main processor, a peripheral circuit of the main processor and a display circuit.
Specifically, as shown in fig. 6, the charge and discharge management circuit includes a charge management chip U21, which may be a bq24103ARHLR chip, and the state indication output terminal of the charge management chip U21 is connected to the main processor, that is, the STAT1 port that may be used to indicate the charging state is connected to the PC9 port of the main processor, the STAT2 port that may be used to indicate the charging completion state is connected to the PC7 port of the main processor, and the STAT2 port that may be used to indicate the battery state
The port is connected to the PC8 port of the main processor. In addition, the main processor is also connected with a voltage detection circuit of the energy storage module to acquire the current voltage of the energy storage module. The voltage detection circuit of the energy storage module comprises resistors R23 and R23 which are connected in series and used for dividing the voltage of the energy storage module and inputting the divided voltage into the main processor. Charging management coreThe electric energy output end OUT of the U21 is connected with the energy storage module through an inductor L21 and a resistor R22 which are sequentially connected in series, and the connection position of the inductor L21 and the resistor R22 is grounded through a capacitor C24. The current detection input end SNS of the charging management chip U21 is connected with a circuit loop of the electric energy output end OUT, and the temperature detection input end of the charging management chip U21 is connected with the output end of a temperature detection device P20 for detecting the temperature of the energy storage module so as to judge whether the charging is suitable according to the current temperature state of the energy storage module.
Specifically, as shown in fig. 7, the voltage conversion circuit includes a voltage conversion chip U22, which may be tps62745DSST, and an electric energy input end of the voltage conversion chip is connected to the energy storage module and an electric energy output end is connected to the circuit to be supplied with power. The enable end EN of the voltage conversion chip U22 is also connected to the energy storage module, and the electric energy output end VOUT outputs 3.3V voltage.
Example 2
The method for testing the deep brain electrode, which adopts the device of embodiment 1, includes the following steps:
carrying out a withstand voltage test on any two electrode contacts, wherein the test method is already embodied in embodiment 1;
after the withstand voltage test is finished, the first electrode contact 2 and the second electrode contact 2 (the first electrode contact and the second electrode contact from the left in the figure) and/or the second electrode contact 2 and the third electrode contact 2 on the brain deep electrode from the top are connected by using resistors, the resistance value of the resistors is 300-500 ohms, the resistors are adhered by conductive adhesive and used for simulating the resistance in a human body, then, a voltage of 50-150V is introduced to the second electrode contact on the brain deep electrode from the top, and because the two contacts are electrically connected and conducted, current can be generated and heat is generated, the voltage value is adjusted until the temperature at the electrode contact is increased to 80-90 ℃, the temperature is kept for 2s, the temperature can be monitored by the temperature sensor 3 of the electrode, and the temperature can also be monitored by other thermometers.
Because the electrode contact 2 of the deep brain electrode is annular, in order to ensure the accuracy of measurement, the electric sheet connected with the electrode by the resistor at least covers 2/3 of the area of the electrode.
After the test, the deep brain electrode is still intact and is a good product, otherwise, the deep brain electrode is a waste product.
The method for testing the deep brain electrode is convenient to measure and simple.
During the test, the deep brain electrode can also be inserted into the physiological saline without using the resistor.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.
Claims (9)
1. A brain deep electrode testing method adopts a multi-channel circuit testing device and is characterized by comprising the following steps:
carrying out voltage withstanding test on any two electrode contacts;
after the withstand voltage test is finished, connecting a first electrode contact and a second electrode contact and/or a second electrode contact and a third electrode contact on the deep brain electrode from the top end by using a resistor, wherein the resistance value of the resistor is 300-500 ohms, then introducing a voltage of 50-150V to the second electrode contact on the deep brain electrode from the top end, adjusting the voltage value until the temperature of the electrode contacts rises to 80-90 ℃, and keeping for 2s;
after testing, the deep brain electrode is still intact and is a good product, otherwise, the deep brain electrode is a waste product;
the multi-channel circuit testing device comprises a main testing circuit and a tested channel switching circuit, wherein the tested channel switching circuit comprises a main processor and at least two controllable switches controlled to be switched on and off by the main processor, and the controllable switches are respectively connected in series in a circuit loop formed by the main testing circuit and electrodes of each channel to be tested.
2. The method according to claim 1, wherein the controllable switch is a solid-state relay, two input terminals of the solid-state relay are respectively connected with the main processor, two ends of one output are respectively connected with one end of the main test circuit voltage supply circuit and one electrode of the channel to be tested, and two ends of the other output are respectively connected with the other end of the main test circuit voltage supply circuit and the other electrode of the channel to be tested.
3. The method of claim 1, wherein the main test circuit comprises a voltage acquisition circuit for acquiring a voltage across the channel under test, an output of the voltage acquisition circuit being connected to the main processor.
4. The method of any one of claims 1-3, further comprising a display circuit for displaying test parameters and test status, the display circuit comprising a display device and a connector through which the display device is connected to the main processor.
5. The method according to any one of claims 1-3, further comprising at least one key circuit, wherein the key circuit is connected to the main processor, and is configured to control the start and stop of the test procedure, set the start channel and the end channel of the test, and select different test parameters.
6. The method according to any one of claims 1-3, further comprising a power management circuit and an energy storage module, wherein the power management circuit comprises a charge and discharge management circuit and a voltage conversion circuit, the charge and discharge management circuit is used for controlling the charge and discharge process of the energy storage module, and the voltage conversion circuit is used for converting the output voltage of the energy storage module into the voltage required by the circuit to be powered.
7. The method of claim 6, wherein the charge and discharge management circuit comprises a charge management chip, and wherein a status indication output of the charge management chip is connected to the main processor.
8. The method of claim 6, further comprising a voltage detection circuit for detecting the energy storage module voltage, the voltage detection circuit being coupled to the primary processor.
9. The method according to claim 6, wherein the voltage conversion circuit comprises a voltage conversion chip, and an electric energy input end of the voltage conversion chip is connected with the energy storage module, and an electric energy output end of the voltage conversion chip is connected with a circuit to be powered.
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| CN108845240A (en) * | 2018-04-27 | 2018-11-20 | 上海电机学院 | A kind of SCM Based automatic testing circuit system |
| CN111880513B (en) * | 2020-07-22 | 2021-12-07 | 广州小鹏汽车科技有限公司 | Test circuit and test method of device to be tested |
| CN113253095A (en) * | 2021-05-12 | 2021-08-13 | 中国科学院地质与地球物理研究所 | MEMS acceleration sensor chip batch test method and system |
| CN115951288A (en) * | 2023-01-05 | 2023-04-11 | 珠海市奥德维科技有限公司 | Capacitance calibration system, method, device and storage medium |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2003123601A (en) * | 2003-07-25 | 2005-01-27 | Общество с ограниченной ответственностью Научно-производственно-конструкторска фирма "Медиком МТД" (RU) | METHOD FOR STUDYING THE FUNCTIONAL STATE OF THE BRAIN, A DEVICE FOR RESEARCHING THE FUNCTIONAL STATE OF THE BRAIN AND A METHOD FOR MEASURING POD ELECTRODE RESISTANCE |
| CN102508000A (en) * | 2011-10-24 | 2012-06-20 | 三江学院 | Electroencephalogram (EEG) neural signal detector impedance test and activation matching system |
| CN104490386A (en) * | 2014-12-16 | 2015-04-08 | 中国科学院深圳先进技术研究院 | Switching method and system of multichannel electrode array |
| CN204832430U (en) * | 2015-08-06 | 2015-12-02 | 中石化炼化工程（集团）股份有限公司 | Combined electrode's withstand voltage test device |
| CN205263572U (en) * | 2015-12-18 | 2016-05-25 | 深圳秋田微电子有限公司 | Multichannel impedance test controlling means |
| CN206573680U (en) * | 2017-03-17 | 2017-10-20 | 常州瑞神安医疗器械有限公司 | A kind of multi-channel circuit test device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102316797B (en) * | 2009-01-27 | 2014-08-20 | 科学基础有限公司 | Switch probe for multiple electrode measurement of impedance |
-
2017
- 2017-03-17 CN CN201710162261.7A patent/CN106814295B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| RU2003123601A (en) * | 2003-07-25 | 2005-01-27 | Общество с ограниченной ответственностью Научно-производственно-конструкторска фирма "Медиком МТД" (RU) | METHOD FOR STUDYING THE FUNCTIONAL STATE OF THE BRAIN, A DEVICE FOR RESEARCHING THE FUNCTIONAL STATE OF THE BRAIN AND A METHOD FOR MEASURING POD ELECTRODE RESISTANCE |
| CN102508000A (en) * | 2011-10-24 | 2012-06-20 | 三江学院 | Electroencephalogram (EEG) neural signal detector impedance test and activation matching system |
| CN104490386A (en) * | 2014-12-16 | 2015-04-08 | 中国科学院深圳先进技术研究院 | Switching method and system of multichannel electrode array |
| CN204832430U (en) * | 2015-08-06 | 2015-12-02 | 中石化炼化工程（集团）股份有限公司 | Combined electrode's withstand voltage test device |
| CN205263572U (en) * | 2015-12-18 | 2016-05-25 | 深圳秋田微电子有限公司 | Multichannel impedance test controlling means |
| CN206573680U (en) * | 2017-03-17 | 2017-10-20 | 常州瑞神安医疗器械有限公司 | A kind of multi-channel circuit test device |
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