CN106802365B - Novel reference current testing method and structure of sensor signal acquisition chip - Google Patents

Novel reference current testing method and structure of sensor signal acquisition chip Download PDF

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Publication number
CN106802365B
CN106802365B CN201710155026.7A CN201710155026A CN106802365B CN 106802365 B CN106802365 B CN 106802365B CN 201710155026 A CN201710155026 A CN 201710155026A CN 106802365 B CN106802365 B CN 106802365B
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current
sensor signal
signal acquisition
acquisition chip
reference current
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CN106802365A (en
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江石根
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Suzhou Gemeixin Microelectronic Co ltd
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Suzhou Gemeixin Microelectronic Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • G01R19/257Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques using analogue/digital converters of the type with comparison of different reference values with the value of voltage or current, e.g. using step-by-step method

Abstract

A novel reference current testing method and structure of a sensor signal acquisition chip. According to the method, a circuit is built again, the reference current is led out from the inside of the sensor acquisition chip to the outside of the chip, and an appropriate test point is selected to perform accurate test of the reference current. The reference current testing structure comprises a new built circuit which is completely the same as the original reference current circuit, a current leading-out element, a proper current testing point and a current testing element.

Description

Novel reference current testing method and structure of sensor signal acquisition chip
Technical Field
The invention relates to a method and a structure for testing reference current of a novel sensor signal acquisition chip, and belongs to the technical field of integrated circuits.
Background
In the sensor signal acquisition chip, in order to acquire the micro signal of the sensor, a reference current needs to be built in the sensor signal chip, the reference current needs to be very stable and the flow is tiny (less than 0.1 uA), and meanwhile, the reference current needs to be monitored in real time. However, the monitoring of the reference current is always a difficult point in the industry, and at present, the better reference current testing method in the industry is to arrange a successive approximation type AD converter with more than 14 bits in the sensor signal acquisition chip, but even if the monitoring method is adopted, the reference current is still difficult to accurately capture, because the embedded successive approximation type AD converter with more than 14 bits causes the increase of the overall power consumption of the sensor acquisition chip, the stability of the reference current is affected, and the embedded successive approximation type AD converter with more than 14 bits is expensive, and the power consumption is larger, so that the area of the whole sensor acquisition chip is increased, the cost is higher, but the sensor signal cannot be accurately acquired and fed back.
In order to solve the problem of testing the reference current in the sensor signal acquisition chip, the invention provides a method and a structure for testing the reference current. In addition, compared with a reference current testing method and structure which are superior in industry, the method can also reduce the power consumption, the area and the cost of the whole sensor signal acquisition chip.
Disclosure of Invention
The invention relates to a novel sensor signal A reference current test method and structure of a collection chip.
A novel reference current testing method of a sensor signal acquisition chip comprises the following steps:
(1) A new circuit 103 is built inside the sensor signal acquisition chip. The new circuit 103 has no contact points in space with the circuit 102 of the original reference current. And the new circuit 103 needs to be substantially identical to the circuit 102 of the original reference current. Further preferably, the new circuit 103 needs to be identical to the circuit 102 of the original reference current.
(2) The current of the new circuit 103 is directed outside the sensor signal acquisition chip 101. A suitable current test point 105 is selected outside the sensor signal acquisition chip 101.
(3) The current at the current test point 105 is measured using conventional current testing methods. Preferably, the current test method includes a voltage/resistance test current method and an AD converter method.
The test structure of the reference current of the novel sensor signal acquisition chip 101 designed by the method of the invention is characterized by comprising the following specific steps: in the novel reference current test structure, a group of circuits 103 which are identical to the original reference current circuit 102 are arranged, the circuits 103 have no contact points with the original circuits 102 in space, and the circuits 103 are arranged in the sensor signal acquisition chip 101 in a matching layout mode. The circuit leads out the reference current inside the sensor signal acquisition chip 101 to the outside of the chip through a current lead-out element 104, and performs current monitoring at a proper current test point 105.
Further, the new circuit 103 may be one circuit M, or n parallel branches M, where n is greater than or equal to 2, preferably n is 2-16, and more preferably n=8.
Further, each circuit M includes a transistor 31, a resistor, a capacitor, and the like.
Further, each circuit M includes n transistors, where n is a natural number greater than or equal to 1, and preferably n is 2-8.
Further, the transistor 31 may be a PMOS transistor or an NMOS transistor, and preferably, a PMOS transistor is used in the present invention.
Further, the resistance of each circuit M is a poly resistance, a high-poly resistance, a ndiff resistance, a pdiff resistance, a well resistance, or the like.
Further, the capacitance on each circuit M is PMOS capacitance, NMOS capacitance, PIP capacitance, MIM capacitance, etc.
Further, the current extraction element 104 of the present invention is a metal wire which is extracted to the outside of the sensor signal acquisition chip 101 through pad for testing, and further, a transmission gate (composed of an NMOS tube and a PMOS tube) and a choke resistor are distributed on the metal wire.
Further, the current test point 105 is outside the sensor signal acquisition chip 101, and the distance between the current test point 105 and the sensor signal acquisition chip 101 is determined according to actual requirements.
Further, the current test element of the current test point 105 of the present invention may be a resistor/voltage current test element or an AD converter.
Further, the resistor may be a carbon film resistor, a cement resistor, a metal film resistor, a wire winding resistor, or the like.
Further, the AD converter may be 1) an integrating type; 2) A press frequency conversion type; 3) Parallel comparison type/serial-parallel comparison type; 4) Modulating; 5) Successive approximation type capacitor array; 6) Successive approximation type. Preferably, the AD converter is a successive approximation type, and more preferably, the AD converter is a 14-bit or more successive approximation type.
Drawings
FIG. 1 is a flow chart of a reference current testing method of a novel sensor acquisition chip of the present invention.
Fig. 2 is a schematic structural diagram of a reference current testing method of the novel sensor acquisition chip of the present invention.
Fig. 3 is a circuit diagram of a reference current circuit or newly built circuit of the present invention.
Fig. 4 is a schematic structural diagram of a reference current testing method of the novel sensor acquisition chip according to embodiment 1 of the present invention.
Fig. 5 is a schematic structural diagram of a reference current testing method of a novel sensor acquisition chip according to embodiment 2 of the present invention.
Fig. 6 is a schematic structural diagram of a reference current testing method of the novel sensor acquisition chip according to embodiment 3 of the present invention.
Description of the main reference signs
The invention will be further described in the following detailed description in conjunction with the above-described figures.
Specific embodiment case 1:
as shown in fig. 4, a set of new circuits 103 is built inside the sensor signal acquisition chip 101, the new circuits 103 are completely the same as the original reference current circuit 102, the new circuits 103 are parallel circuits of 8 branches, each branch M is provided with 2 PMOS tubes and 1 resistor, the new circuits 103 guide current to the outside of the sensor signal acquisition chip 101 through current lead wires, a part of the current lead wires are positioned inside the sensor signal acquisition chip 101, a part of the current lead wires are positioned outside the sensor signal acquisition chip 101, the current lead wires positioned inside the sensor signal acquisition chip 101 comprise a transmission gate 32 consisting of the PMOS tubes and the NMOS tubes and a protection resistor 33, the protection resistor 33 can prevent the electric element 106 outside the sensor signal acquisition chip 101 from interfering with the current of the new circuits inside the sensor signal acquisition chip, the current lead wires are output to the outside of the sensor signal acquisition chip 101 at pad (lead-out interface) 34, and the current is tested by a current type AD converter 106 at a distance pad of 1um, and the test result is (0.3±1%) uA. If the reference current is measured in the sensor signal acquisition chip 101, the current fluctuation is (0.3±10%) uA, so that the reference current of the sensor signal acquisition chip 101 can be accurately measured by the method and the structure of the invention, and the test result is relatively stable.
Specific embodiment case 2:
as shown in fig. 5, a set of new circuits 103 is built inside the sensor signal acquisition chip 101, the new circuits 103 are completely the same as the original reference current circuit 102, the new circuits 103 are single circuits, 2 PMOS tubes and 1 resistor are arranged on the new circuits, the new circuits 103 guide current to the outside of the sensor signal acquisition chip 101 through current outgoing lines, a part of current guide lines are positioned inside the sensor signal acquisition chip 101, a part of current guide lines are positioned outside the sensor signal acquisition chip 101, a part connected with the sensor signal acquisition chip 101 is pad, a current guide line positioned inside the sensor signal acquisition chip 101 comprises a transmission gate 32 formed by PMOS tubes and NMOS tubes and a protection resistor 33, the protection resistor 33 can prevent the electric elements outside the sensor signal acquisition chip 101 from interfering with the current of the new circuits 103, the current guide lines are grounded after adding 1M resistor 107 at a distance pad of 1mm outside the sensor signal acquisition chip 101, the current is tested by using a 14-bit successive approximation AD converter 106, and the current is output by the 14-bit successive approximation AD converter 106 and finally compared with the current data of 1.0% in a test. The original reference current is tested by using a 14-bit successive approximation type AD converter in the sensor signal acquisition chip 101, and the current fluctuation is (1+/-5%) uA. Therefore, the method and the structure can accurately measure the reference current of the sensor signal acquisition chip 101, and the test result is stable.
Specific embodiment 3:
as shown in fig. 6, a set of new circuits 103 is built inside the sensor signal acquisition chip 101, the new circuits 103 are completely the same as the original reference current circuit 102, the new circuits are parallel circuits of 100 branches, each circuit M is provided with 2 PMOS tubes and 1 resistor, the new circuits 103 guide current to the outside of the sensor signal acquisition chip 101 through current lead wires, one part of the current lead wires is located inside the sensor signal acquisition chip 101, the other part of the current lead wires is located outside the sensor signal acquisition chip 101, and the part connected with the sensor signal acquisition chip 101 is pad. The current guide line in the sensor signal acquisition chip 101 comprises a transmission gate 32 composed of a PMOS tube and an NMOS tube, and a protection resistor 33, wherein the protection resistor 33 can prevent an electric element outside the sensor signal acquisition chip 101 from interfering with the current of the new circuit 103, a 200K resistor 107 is added at a position with a distance pad of 1mm outside the sensor signal acquisition chip 101 and then is grounded, a 14-bit successive approximation type AD converter 106 is used for testing the current, data is output through the AD converter 106, the current is compared with the current, and finally the test current is (5+/-1%) uA. The original reference current was tested with a 14-bit successive approximation AD converter inside the sensor signal acquisition chip 101 with current ripple of (5±100%) uA. Therefore, the method and the structure can accurately measure the reference current of the sensor signal acquisition chip 101, and the test result is stable.

Claims (5)

1. A test method of reference current of a sensor signal acquisition chip comprises the following steps:
a new circuit is built in the sensor signal acquisition chip, wherein the new circuit and the circuit of the original reference current have no contact point in space, and the new circuit and the circuit of the original reference current are completely consistent;
guiding the current of the new circuit to the outside of the sensor signal acquisition chip;
selecting a proper current test point outside the sensor signal acquisition chip;
the current at the current test point is measured using conventional current testing methods.
2. The reference current testing method of the sensor signal acquisition chip according to claim 1, wherein: the current is measured at the current test point by a voltage/resistance method or by an AD converter method.
3. The reference current testing method of the sensor signal acquisition chip according to claim 1, wherein: the reference current is 0-0.1uA.
4. A test structure of reference current of sensor signal acquisition chip, its characterized in that: the sensor signal acquisition chip comprises at least one set of built new circuit, at least one internal current extraction element, at least one current test point and at least one current test element, wherein the new circuit and the original reference current circuit are completely free of contact points in space and are arranged in the sensor signal acquisition chip, the new circuit and the original reference current circuit are completely consistent, the current test point is positioned outside the sensor signal acquisition chip, and the internal current extraction element is used for extracting the reference current in the sensor signal acquisition chip to the outside of the chip and performing current monitoring on the current test point.
5. The sensor signal acquisition chip reference current test structure of claim 4, wherein: the current testing element comprises a resistor/voltage current testing element and an AD converter.
CN201710155026.7A 2017-03-14 2017-03-14 Novel reference current testing method and structure of sensor signal acquisition chip Active CN106802365B (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04366771A (en) * 1991-06-12 1992-12-18 Murata Mfg Co Ltd Current detecting unit
US6031777A (en) * 1998-06-10 2000-02-29 Integrated Silicon Solution, Inc. Fast on-chip current measurement circuit and method for use with memory array circuits
KR20010065155A (en) * 1999-12-29 2001-07-11 박종섭 Circuit for trimming Reference cell
CN101251557A (en) * 2008-03-21 2008-08-27 苏州长新微电子有限公司 Built-in permanence resistor automatic calibration method for high-precision circuit
CN101887895A (en) * 2009-05-12 2010-11-17 立锜科技股份有限公司 Power transistor chip internally provided with enhancement metal-oxide-semiconductor field effect transistor (MOSFET) and applying circuit thereof
CN102790039A (en) * 2011-05-18 2012-11-21 拉碧斯半导体株式会社 Semiconductor chip and test method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04366771A (en) * 1991-06-12 1992-12-18 Murata Mfg Co Ltd Current detecting unit
US6031777A (en) * 1998-06-10 2000-02-29 Integrated Silicon Solution, Inc. Fast on-chip current measurement circuit and method for use with memory array circuits
KR20010065155A (en) * 1999-12-29 2001-07-11 박종섭 Circuit for trimming Reference cell
CN101251557A (en) * 2008-03-21 2008-08-27 苏州长新微电子有限公司 Built-in permanence resistor automatic calibration method for high-precision circuit
CN101887895A (en) * 2009-05-12 2010-11-17 立锜科技股份有限公司 Power transistor chip internally provided with enhancement metal-oxide-semiconductor field effect transistor (MOSFET) and applying circuit thereof
CN102790039A (en) * 2011-05-18 2012-11-21 拉碧斯半导体株式会社 Semiconductor chip and test method

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