CN106785914B - Semiconductor laser chip and semicondcutor laser unit - Google Patents
Semiconductor laser chip and semicondcutor laser unit Download PDFInfo
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- CN106785914B CN106785914B CN201710176874.6A CN201710176874A CN106785914B CN 106785914 B CN106785914 B CN 106785914B CN 201710176874 A CN201710176874 A CN 201710176874A CN 106785914 B CN106785914 B CN 106785914B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
- H01S5/3205—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures with an active layer having a graded composition in the growth direction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Semiconductor Lasers (AREA)
Abstract
The disclosure is directed to a kind of semiconductor laser chip and semicondcutor laser unit, which includes: substrate；Active layer on the substrate；Limiting layer on the active layer, wherein closing surface separates the active layer and the limiting layer respectively；P-type layer on the closing surface and the N-type layer in the P-type layer；The covering contacted above the P-type layer and the N-type layer and with the P-type layer, the N-type layer and the limiting layer；Electric contacting layer on the covering；And isolation channel, the isolation channel are located between the active layer separated, and the isolation channel separates the electric contacting layer, the covering, the N-type layer and the P-type layer.The disclosure improves the yields of unit sizes semiconductor-on-insulator laser chip.
Description
Technical field
This disclosure relates to technical field of semiconductors, in particular to a kind of semiconductor laser chip and semiconductor laser
Device.
Background technique
Semicondcutor laser unit is to generate the device of laser based on semiconductor material, have it is small in size, light-weight,
Driving power and electric current is low, high-efficient, long working life and is easy to the advantages that realizing optoelectronic intagration with various opto-electronic devices,
Thus have been widely used.Wherein, semiconductor laser chip (semiconductor laser) is the important of semicondcutor laser unit
Component, semicondcutor laser unit generally comprise semiconductor laser chip driving circuit, temperature control, light-operated circuit and heat sink etc., partly lead
Volumetric laser chip is located on heat sink.
Currently, the fabrication schedule of semiconductor laser chip is more complex, for example, for each layer of growth, it may be necessary to
Multiple deposition process are carried out, and for each deposition process, due to equipment precision and technological parameter etc., the result of deposition can
It can be had differences with expected effect, this may cause the low problem of yields of semiconductor laser chip.
It should be noted that information is only used for reinforcing the reason to the background of the disclosure disclosed in above-mentioned background technology part
Solution, therefore may include the information not constituted to the prior art known to persons of ordinary skill in the art.
Summary of the invention
The disclosure is designed to provide a kind of semiconductor laser chip and semicondcutor laser unit, and then at least certain
One or more is overcome the problems, such as caused by the limitation and defect due to the relevant technologies in degree.
According to one aspect of the disclosure, a kind of semiconductor laser chip is provided, comprising:
Substrate；
Active layer on the substrate；
Limiting layer on the active layer, wherein closing surface separates the active layer and the limiting layer respectively；
P-type layer on the closing surface and the N-type layer in the P-type layer；
It is contacted above the P-type layer and the N-type layer and with the P-type layer, the N-type layer and the limiting layer
Covering；
Electric contacting layer on the covering；And
Isolation channel, the isolation channel is located between the active layer separated, and the isolation channel connects the electricity
Contact layer, the covering, the N-type layer and P-type layer partition.
According to another aspect of the present disclosure, a kind of semicondcutor laser unit is provided, the semicondcutor laser unit includes upper
State semiconductor laser chip.
As shown from the above technical solution, on the one hand, the disclosure can be in the single semiconductor laser chip ruler of the prior art
Two or more semiconductor laser chips are formed on very little, and the two or more semiconductor laser chips are tested
Afterwards, the semiconductor laser chip that can choose better performances is packaged, so as to improve unit sizes semiconductor-on-insulator laser
The yields of chip；On the other hand, by the way that isolation channel is arranged, the parasitic capacitance of semiconductor laser chip is reduced, can reduce
The leakage current of semiconductor laser chip, to improve the performance of semiconductor laser chip.
It should be understood that above general description and following detailed description be only it is exemplary and explanatory, not
The disclosure can be limited.
Detailed description of the invention
The drawings herein are incorporated into the specification and forms part of this specification, and shows the implementation for meeting the disclosure
Example, and together with specification for explaining the principles of this disclosure.It should be evident that the accompanying drawings in the following description is only the disclosure
Some embodiments for those of ordinary skill in the art without creative efforts, can also basis
These attached drawings obtain other attached drawings.In the accompanying drawings:
Fig. 1 diagrammatically illustrates the sectional view of semiconductor laser chip according to an exemplary embodiment of the present disclosure；
Fig. 2 diagrammatically illustrates the top view of double semiconductor laser chips according to an exemplary embodiment of the present disclosure；
Fig. 3 diagrammatically illustrates the section of three semiconductor laser chip of one kind according to an exemplary embodiment of the present disclosure
Figure；
Fig. 4 diagrammatically illustrates the top view of three semiconductor laser chips according to an exemplary embodiment of the present disclosure；
And
Fig. 5 shows the cross-sectional view of the structure of the electrode infall of adjacent two semiconductor laser chips B and C.
Specific embodiment
Example embodiment is described more fully with reference to the drawings.However, example embodiment can be with a variety of shapes
Formula is implemented, and is not understood as limited to embodiment set forth herein；On the contrary, thesing embodiments are provided so that the present invention will
Fully and completely, and by the design of example embodiment comprehensively it is communicated to those skilled in the art.Identical attached drawing in figure
Label indicates same or similar structure, thus the detailed description that will omit them.
Described feature, structure or characteristic can be incorporated in one or more embodiments in any suitable manner
In, if possible, it is characterized in discussed in each embodiment interchangeable.In the following description, many details are provided
Embodiments of the present invention are fully understood to provide.It will be appreciated, however, by one skilled in the art that this hair can be practiced
Bright technical solution, or can be using other methods, component, material without one or more in the specific detail
Deng.In other cases, known features, material or operation are not shown in detail or describe to avoid each side of the invention is obscured
Face.
Although the term of relativity, such as "upper" "lower" is used to describe a component of icon for another in this specification
The relativeness of one component, but these terms are in this manual merely for convenient, for example, with reference to the accompanying drawings described in show
The direction of example.It is appreciated that, if making it turn upside down the device overturning of icon, the component described in "upper" will
As the component in "lower".Term of other relativities, such as "high" " low " "top" "bottom" " preceding " " rear " " left side " " right side " etc. are also made
With similar meaning.When certain structure is at other structures "upper", it is possible to refer to that certain structural integrity is formed in other structures, or
Refer to that certain structure is " direct " to be arranged in other structures, or refers to that certain structure is arranged in other structures by the way that another structure is " indirect ".
Term " one ", "the", " described " and "at least one" to indicate there are one or more elements/component part/
Deng；Term " comprising " and " having " is to indicate the open meaning being included and refer to element/group in addition to listing
At part/wait except also may be present other element/component part/etc.；Term " first ", " second " etc. only make as label
With not being to the limitation of the quantity of its object.
In the illustrative embodiments of the disclosure, semiconductor laser chip may include chip unit and be formed in chip
Electrode on unit.Fig. 1 diagrammatically illustrates the chip of semiconductor laser chip according to an exemplary embodiment of the present disclosure
The sectional view of unit.With reference to Fig. 1, the chip unit of semiconductor laser chip according to an exemplary embodiment of the present disclosure can be with
Including substrate 1, active layer 2, limiting layer 3, P-type layer 5, N-type layer 6, covering 7, electric contacting layer 8 and isolation channel 9.
According to some embodiments of the present disclosure, constitute substrate 1 material can be with good crystalline quality and and its
The material of upper growth has the semiconductor material of good Lattice Matching.Embodiment of the present disclosure can be filled with long wavelength laser
It is set to example, in this case, the material of substrate 1 can be N-type InP, it will be readily appreciated by those skilled in the art that substrate 1
Material can also be other semiconductor materials, for example, the material of substrate 1 can be N-type for GaAs laser
GaAs.In addition, the surface of substrate 1 should smooth, zero defect, to help the growth of layer each thereon.
According to some embodiments of the present disclosure, active layer 2 could be formed on substrate 1, and in the exemplary of the disclosure
In embodiment, the material of active layer 2 can be InGaAsP, in addition, active layer 2 can also be InGaAlAs and InGaAs structure
At lamination.It, can be in order to realize active layer 2 and the better Lattice Matching of substrate 1 in addition, according to other embodiment
A buffer layer is formed between substrate 1 and active layer 2.
It could be formed with limiting layer 3 on active layer 2, limiting layer 3 can be used for for light field being limited in the maximum extent active
Around layer 2, in the illustrative embodiments of the disclosure, limiting layer 3 may, for example, be p-type InGaAsP and p-type InP and constitute
Lamination.
In the illustrative embodiments of the disclosure, active layer 2 and limiting layer 3 can be separated and be formed with closing surface,
And P-type layer 5 and N-type layer 6 can be sequentially formed on closing surface.According to some embodiments of the present disclosure, can will separate
The contact surface that face is interpreted as active layer 2 and limiting layer 3 and P-type layer 5 is formed.At this point, P-type layer 5 and N-type layer 6 may be constructed one instead
To PN junction, pass through for limiting electric current from active area 2.According to some embodiments of the present disclosure, P-type layer 5 and N-type layer 6 are constituted
Material can be respectively p-type InP and N-type InP.
In the covering 7 that can be formed above limiting for light of P-type layer 5 and N-type layer 6, and in covering 7 and P-type layer
5, N-type layer 6 and limiting layer 3 contact.In addition, could be formed with the electric contacting layer 8 for being used to form electrode on covering 7.
It could be formed with isolation channel 9 between the active layer 2 separated, isolation channel 9 can be by electric contacting layer 8, covering 7, N
Type layer 6 and P-type layer 5 are separated, to reduce parasitic capacitance.
Fig. 2 diagrammatically illustrates the top view of semiconductor laser chip according to an exemplary embodiment of the present disclosure.Ginseng
Fig. 2 is examined, the semiconductor laser chip of the illustrative embodiments of the disclosure can also include electrode 10.Those skilled in the art answer
When not doing special limit to the shape of electrode in this illustrative embodiment it is noted that the shape of electrode 10 is not limited to shown in Fig. 2
It is fixed.
In addition, can also include insulating layer (not shown) according to the semiconductor laser chip of the disclosure, wherein pass through insulation
For the corresponding isolation mesa of layer by active layer 2 and the partition of limiting layer 3 to form closing surface, and after forming N-type layer 6, removal is exhausted
Insulating layer on edge platform face.Specifically, isolation mesa can be formed and performing etching to insulating layer, by means of isolation mesa
And the active layer and the limiting layer are separated in a manner of chemical attack.In addition, the material for constituting insulating layer can be such as
It is silica and/or silicon nitride.
Structure as shown in Figure 2 can be seen that because of one chip list of an individual corresponding structure composition of active layer
Member, it is possible to form two or more semiconductor laser cores in the single semiconductor laser chip size of the prior art
Piece after testing the two or more semiconductor laser chips, can choose the semiconductor laser core of better performances
Piece is packaged, to improve the yields of unit sizes semiconductor-on-insulator laser chip.In addition, being reduced by setting isolation channel
The parasitic capacitance of semiconductor laser chip, can reduce the leakage current of semiconductor laser chip, to improve semiconductor laser
The performance of chip.
Further, a kind of semicondcutor laser unit is additionally provided in this example embodiment, the semicondcutor laser unit
Including above-mentioned semiconductor laser chip.
In addition, semicondcutor laser unit can also be by a test and comparison unit to being formed on semiconductor laser chip size
Two or more semiconductor laser chips tested, and the test result of more each semiconductor laser chip, to obtain
The optimal semiconductor laser chip of performance obtains the semiconductor laser chip that performance reaches a preset standard, and most to performance
The semiconductor laser chip that good semiconductor laser chip or performance reaches a preset standard is packaged processing.
Fig. 3 diagrammatically illustrates the section of three semiconductor laser chip of one kind according to an exemplary embodiment of the present disclosure
Figure.Structure shown in Fig. 3 is similar with the structure of above-described double semiconductor laser chips, and details are not described herein.
Fig. 4 diagrammatically illustrates the top view of three semiconductor laser chips according to an exemplary embodiment of the present disclosure.
With reference to Fig. 4, three semiconductor laser chips are respectively laser chip A, laser chip B and laser chip C, wherein laser chip
A, laser chip B and the corresponding electrode of laser chip C are respectively electrode 11, electrode 12 and electrode 13.
Figure 4, it is seen that electrode 12 and electrode 13 have the case where laminating on laser chip C, this will lead to electricity
Pole 12 is connected to electrode 13, cannot achieve the separation of laser chip B Yu laser chip C.
In order to solve this problem, an insulating layer can be formed, between electrode 12 and electrode 13 to prevent electrode 12 and electricity
Pole 13 is connected to.Specific structure is as described in Figure 5, with reference to Fig. 5, is formed after electrode 13, can be in electrode 13 to folded with electrode 12
Insulating layer 15 is formed on the part of pressure, and electrode 12 is then formed on insulating layer 15.Wherein, material used by insulating layer 15 with
And forming method can be identical as material used by above-mentioned insulating layer and forming method, details are not described herein.
In addition, the disclosure further includes that the process of test and comparison is carried out to the semiconductor laser chip produced, with
Into the semiconductor laser chip, the optimal semiconductor laser chip of performance or performance reach the semiconductor of a preset standard
Laser chip, and to the optimal semiconductor laser chip of performance or performance reach the semiconductor laser chip of a preset standard into
Row encapsulation process.
Those skilled in the art after considering the specification and implementing the invention disclosed here, will readily occur to its of the disclosure
Its embodiment.This application is intended to cover any variations, uses, or adaptations of the disclosure, these modifications, purposes or
Person's adaptive change follows the general principles of this disclosure and including the undocumented common knowledge in the art of the disclosure
Or conventional techniques.The description and examples are only to be considered as illustrative, and the true scope and spirit of the disclosure are wanted by right
It asks and points out.
It should be understood that the present disclosure is not limited to the precise structures that have been described above and shown in the drawings, and
And various modifications and changes may be made without departing from the scope thereof.The scope of the present disclosure is only limited by the accompanying claims.
Claims (5)
1. a kind of semiconductor laser chip characterized by comprising
Substrate；
Active layer on the substrate；
Limiting layer on the active layer, wherein closing surface separates the active layer and the limiting layer respectively；
P-type layer on the closing surface and the N-type layer in the P-type layer；
The packet contacted above the P-type layer and the N-type layer and with the P-type layer, the N-type layer and the limiting layer
Layer；
Electric contacting layer on the covering；And
Isolation channel, the isolation channel are located between the active layer that is separated, and the isolation channel by the electric contacting layer,
The covering, the N-type layer and P-type layer partition.
2. semiconductor laser chip according to claim 1, which is characterized in that the semiconductor laser chip further include:
Isolation mesa；
Wherein, by means of the insulating layer in the isolation mesa, by the active layer and the limitation in a manner of chemical attack
Layer separates and forms the closing surface, and after forming the N-type layer, removes the insulating layer in the isolation mesa.
3. semiconductor laser chip according to claim 2, which is characterized in that be equipped with insulating layer on the limiting layer；
Wherein, the insulating layer forms the isolation mesa through over etching.
4. semiconductor laser chip according to claim 3, which is characterized in that the insulating layer be silica and/or
Silicon nitride.
5. a kind of semicondcutor laser unit, which is characterized in that including semiconductor laser described in any one of Claims 1-4
Chip.
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| CN201710176874.6A CN106785914B (en) | 2017-03-22 | 2017-03-22 | Semiconductor laser chip and semicondcutor laser unit |
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| CN201710176874.6A CN106785914B (en) | 2017-03-22 | 2017-03-22 | Semiconductor laser chip and semicondcutor laser unit |
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| CN106785914B true CN106785914B (en) | 2019-09-20 |
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| CN107275925A (en) * | 2017-07-31 | 2017-10-20 | 青岛海信宽带多媒体技术有限公司 | Laser chip and preparation method thereof, optical module |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010135506A (en) * | 2008-12-03 | 2010-06-17 | Furukawa Electric Co Ltd:The | Semiconductor device |
| CN102035137A (en) * | 2009-09-30 | 2011-04-27 | 索尼公司 | Semiconductor laser |
| CN102136678A (en) * | 2010-01-22 | 2011-07-27 | 三菱电机株式会社 | Method for manufacturing a semiconductor device |
| CN108011295A (en) * | 2016-10-31 | 2018-05-08 | 住友电工光电子器件创新株式会社 | Semiconductor laser diode with multi-quantum pit structure |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4792854B2 (en) * | 2005-07-25 | 2011-10-12 | 三菱電機株式会社 | Semiconductor optical device and manufacturing method thereof |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010135506A (en) * | 2008-12-03 | 2010-06-17 | Furukawa Electric Co Ltd:The | Semiconductor device |
| CN102035137A (en) * | 2009-09-30 | 2011-04-27 | 索尼公司 | Semiconductor laser |
| CN102136678A (en) * | 2010-01-22 | 2011-07-27 | 三菱电机株式会社 | Method for manufacturing a semiconductor device |
| CN108011295A (en) * | 2016-10-31 | 2018-05-08 | 住友电工光电子器件创新株式会社 | Semiconductor laser diode with multi-quantum pit structure |
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