CN106783587A - The minimizing technology of semiconductor surface metal impurities - Google Patents

The minimizing technology of semiconductor surface metal impurities Download PDF

Info

Publication number
CN106783587A
CN106783587A CN201510827442.8A CN201510827442A CN106783587A CN 106783587 A CN106783587 A CN 106783587A CN 201510827442 A CN201510827442 A CN 201510827442A CN 106783587 A CN106783587 A CN 106783587A
Authority
CN
China
Prior art keywords
semiconductor
metal impurities
flow
duration
argon gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201510827442.8A
Other languages
Chinese (zh)
Other versions
CN106783587B (en
Inventor
龙命潮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SAE Technologies Development Dongguan Co Ltd
Original Assignee
SAE Technologies Development Dongguan Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SAE Technologies Development Dongguan Co Ltd filed Critical SAE Technologies Development Dongguan Co Ltd
Priority to CN201510827442.8A priority Critical patent/CN106783587B/en
Publication of CN106783587A publication Critical patent/CN106783587A/en
Application granted granted Critical
Publication of CN106783587B publication Critical patent/CN106783587B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32131Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by physical means only

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

The cleaning method of semiconductor surface metal impurities of the invention, comprises the following steps:Protect the first surface of semiconductor;With semiconductor described in sulfuric acid or nitric acid dousing;And the impurity on the semiconductor second surface is peeled off using ion beam etching method;The ion beam etching method includes:Argon gas is passed through with first flow, the first duration is kept;The mixed gas of argon gas and oxygen are passed through with second flow, the second duration is kept;Argon gas is passed through with the 3rd flow, the 3rd duration is kept.It efficiently can quickly remove the metal impurities of semiconductor surface, so as to ensure the electric conductivity of semiconductor and reduce scrappage.

Description

The minimizing technology of semiconductor surface metal impurities
Technical field
The present invention relates to method for cleaning semiconductor, more particularly to semiconductor surface metal impurities minimizing technology.
Background technology
In semiconductor fabrication process, the metal impurities (back side can be formed at the back side of chip, chip or silicon circle Metal, referred to as carries on the back gold).It is abnormal that such metal impurities can cause that the back side of semiconductor occurs, so that after influenceing Continuous encapsulation, and reduce the reliability of device.Especially, the electric conductivity reduction of semiconductor, causes electrostatic Electric discharge problem is serious, so as to cause the scrappage of semiconductor product high.
So, a kind of minimizing technology of semiconductor surface metal impurities is needed badly, to overcome the defect of the above.
The content of the invention
It is an object of the invention to provide a kind of cleaning method of semiconductor surface metal impurities, it can be efficient The metal impurities of quick removal semiconductor surface, so as to ensure the electric conductivity of semiconductor and reduce scrappage.
To achieve the above object, the cleaning method of semiconductor surface metal impurities of the present invention, comprises the following steps:
Protect the first surface of semiconductor;
With semiconductor described in sulfuric acid or nitric acid dousing;And
Impurity on the second surface of the semiconductor is peeled off using ion beam etching method;The ion beam is carved Etching method includes:
Argon gas is passed through with first flow, the first duration is kept;
The mixed gas of argon gas and oxygen are passed through with second flow, the second duration is kept;
Argon gas is passed through with the 3rd flow, the 3rd duration is kept.
Compared with prior art, the minimizing technology of semiconductor surface metal impurities of the invention is first to semiconductor Element surface protected, semiconductor back surface metal impurities are then dissolved by sulfuric acid or nitric acid dousing, so Ion beam etching method stripping metal impurity is used afterwards, can safely, effectively remove semiconductor surface metal miscellaneous Matter, the performance without damaging semiconductor element, so as to reduce the scrappage of semiconductor.
Used as a preferred embodiment, the etching power in the ion beam etching method is 100~120W, Etching pressure is 300~320mTorr.
It is preferred that the first flow and the 3rd flow are selected between 15~20sccm, described first 20~30s of Shi Changwei, second duration is more than first duration.
It is preferred that in the mixed gas, the flow-rate ratio of the argon gas and the oxygen is 18:1.
It is preferred that it is described with the 3rd flow be passed through argon gas the step of also including the angle of inclination of ion beam be 30~40 Degree.
It is preferred that it is described argon gas is passed through with the 3rd flow the step of after also include:It is passed through with the 4th flow Argon gas, keeps the 4th duration, and the angle of inclination of ion beam is 70~80 degree;4th duration is more than described 3rd duration.
As another preferred embodiment, pad pasting on the first surface, the film is polytetrafluoroethylene (PTFE).
It is preferred that after soaking the semiconductor, carry out the ion beam etching method before include:Go Except the polytetrafluoroethylene (PTFE) on the first surface, the semiconductor is cleaned with absolute ethyl alcohol or acetone.
As another preferred embodiment, also include after the ion beam etching method:With absolute ethyl alcohol or Acetone cleans the semiconductor.
Specific embodiment
The minimizing technology of semiconductor surface metal impurities of the present invention is made furtherly with reference to embodiment It is bright, but it is not so limited the present invention.
The minimizing technology of semiconductor surface metal impurities of the invention is applied to chip, chip or silicon circle etc. partly leads Body product.A preferred embodiment to the minimizing technology of semiconductor surface metal impurities of the present invention is carried out below Describe in detail.The method includes:
Step one, protects the first surface of semiconductor;
Step 2, with semiconductor described in sulfuric acid or nitric acid dousing;And
Step 3, the impurity on the semiconductor second surface is peeled off using ion beam etching method.
Specifically, to protect the facade element of semiconductor from the corrosion of acid solution, must be pasted in the front of semiconductor Upper erosion-resisting diaphragm, such as polytetrafluoroethylene (PTFE).In step 2, the semiconductor of coated with protective film is put Enter immersion in sulfuric acid or salpeter solution, it is preferred that the concentration ratio of sulfuric acid or nitric acid is 2%~3%, soak duration It it is 2~3 minutes, temperature control is at 80~90 degree.Alternatively, if the metal impurities particle of semiconductor back surface compared with Greatly, it is greater than using sulfuric acid solution less than 3 μm using salpeter solution, size at 3 μm.
As a preferred embodiment, after the acid soak by step 2, the front of semiconductor is protected Cuticula is removed, and cleans the semiconductor with absolute ethyl alcohol or acetone, when a length of 20~30 minutes, temperature is 25~30 Degree.
In step 3, ion beam etching (IBE) method is preferably comprised the following steps:
(1) argon gas, is passed through with first flow, the first duration is kept;
(2) mixed gas of argon gas and oxygen, are passed through with second flow, the second duration is kept;
(3) argon gas, is passed through with the 3rd flow, the 3rd duration is kept;
(4) argon gas, is passed through with the 4th flow, the 4th duration is kept.
Specifically, the etching power in the IBE methods is 100~120W, and etching pressure is 300~320mTorr. Specifically, the first flow for being passed through argon gas is 18~20sccm, a length of 15~20s when first.Then, it is passed through The mixed gas of argon gas and oxygen, both flow proportionals not 18:1, duration is about 50~60s.Then again Be passed through argon gas, the 3rd flow is slightly smaller than first flow, when a length of 60~120 seconds, it is preferred that in this step The angle of inclination of intermediate ion beam is 30~40 degree, to ensure the more preferable stripping of impurity.To ensure preferably removal Effect, argon gas is passed through in step (4) with the flow of 15~18sccm, a length of 130~150 seconds during holding, The angle of inclination of ion beam is 70~80 degree.So far, the metal impurities at the back side of semiconductor are removed.
More preferably, if still suffering from minute metallic impurity by light microscopy semiconductor surfaces following, can Above-mentioned step (three), step (4) is repeated, now duration can suitably be shortened according to actual conditions.
To ensure semiconductor cleaning using ionic liquids, can again be cleaned using absolute ethyl alcohol or acetone after IBE, Time is about 20 minutes, and temperature is 25~30 degree.
In sum, the minimizing technology of semiconductor surface metal impurities of the invention is first to the element of semiconductor Surface is protected, and then dissolves semiconductor back surface metal impurities by sulfuric acid or nitric acid dousing, then uses Ion beam etching method stripping metal impurity, can safely, effectively remove semiconductor surface metal impurities, and The performance of semiconductor element is not damaged, so as to reduce the scrappage of semiconductor.
Above disclosed is only presently preferred embodiments of the present invention, can not limit the present invention with this certainly Interest field, therefore equivalent variations made according to scope of the present invention patent still belong to the present invention and are covered Scope.

Claims (9)

1. a kind of minimizing technology of semiconductor surface metal impurities, comprises the following steps:
Protect the first surface of semiconductor;
With semiconductor described in sulfuric acid or nitric acid dousing;And
Impurity on the second surface of the semiconductor is peeled off using ion beam etching method;It is characterized in that: The ion beam etching method includes:
Argon gas is passed through with first flow, the first duration is kept;
The mixed gas of argon gas and oxygen are passed through with second flow, the second duration is kept;
Argon gas is passed through with the 3rd flow, the 3rd duration is kept.
2. the minimizing technology of semiconductor surface metal impurities as claimed in claim 1, it is characterised in that:Institute The etching power in ion beam etching method is stated for 100~120W, etching pressure is 300~320mTorr.
3. the minimizing technology of semiconductor surface metal impurities as claimed in claim 1, it is characterised in that:Institute State first flow and the 3rd flow selected between 15~20sccm, a length of 20~30s when described first, Second duration is more than first duration.
4. the minimizing technology of semiconductor surface metal impurities as claimed in claim 1, it is characterised in that:Institute State in mixed gas, the flow-rate ratio of the argon gas and the oxygen is 18:1.
5. the minimizing technology of semiconductor surface metal impurities as claimed in claim 1, it is characterised in that:Institute Stating the step of being passed through argon gas with the 3rd flow also includes that the angle of inclination of ion beam is 30~40 degree.
6. the minimizing technology of semiconductor surface metal impurities as claimed in claim 1, it is characterised in that: It is described the step of be passed through argon gas with the 3rd flow after also include:Argon gas is passed through with the 4th flow, the 4th is kept Duration, the angle of inclination of ion beam is 70~80 degree;4th duration is more than the 3rd duration.
7. the minimizing technology of semiconductor surface metal impurities as claimed in claim 1, it is characterised in that: Pad pasting on the first surface, the film is polytetrafluoroethylene (PTFE).
8. the minimizing technology of semiconductor surface metal impurities as claimed in claim 7, it is characterised in that: After soaking the semiconductor, include before the ion beam etching method:Remove the first surface On polytetrafluoroethylene (PTFE), clean the semiconductor with absolute ethyl alcohol or acetone.
9. the minimizing technology of semiconductor surface metal impurities as claimed in claim 1, it is characterised in that: Also include after the ion beam etching method:The semiconductor is cleaned with absolute ethyl alcohol or acetone.
CN201510827442.8A 2015-11-24 2015-11-24 Method for removing metal impurities on surface of semiconductor Active CN106783587B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510827442.8A CN106783587B (en) 2015-11-24 2015-11-24 Method for removing metal impurities on surface of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510827442.8A CN106783587B (en) 2015-11-24 2015-11-24 Method for removing metal impurities on surface of semiconductor

Publications (2)

Publication Number Publication Date
CN106783587A true CN106783587A (en) 2017-05-31
CN106783587B CN106783587B (en) 2020-07-17

Family

ID=58963962

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510827442.8A Active CN106783587B (en) 2015-11-24 2015-11-24 Method for removing metal impurities on surface of semiconductor

Country Status (1)

Country Link
CN (1) CN106783587B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070264436A1 (en) * 2006-05-11 2007-11-15 Yezdi Dordi Apparatus for applying a plating solution for electroless deposition
CN101209449A (en) * 2006-12-27 2008-07-02 中芯国际集成电路制造(上海)有限公司 Method for cleaning back of wafer
CN101459120A (en) * 2007-12-13 2009-06-17 中芯国际集成电路制造(上海)有限公司 Method for removing interconnecting metal layer surface oxidation membrane
CN101774584A (en) * 2009-01-09 2010-07-14 华南师范大学 Method for purifying solar-grade silicon

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070264436A1 (en) * 2006-05-11 2007-11-15 Yezdi Dordi Apparatus for applying a plating solution for electroless deposition
CN101209449A (en) * 2006-12-27 2008-07-02 中芯国际集成电路制造(上海)有限公司 Method for cleaning back of wafer
CN101459120A (en) * 2007-12-13 2009-06-17 中芯国际集成电路制造(上海)有限公司 Method for removing interconnecting metal layer surface oxidation membrane
CN101774584A (en) * 2009-01-09 2010-07-14 华南师范大学 Method for purifying solar-grade silicon

Also Published As

Publication number Publication date
CN106783587B (en) 2020-07-17

Similar Documents

Publication Publication Date Title
CN103885099B (en) A kind of transmission optical component damage threshold method for improving based on successive ignition etching
JP2011527080A5 (en)
CN105914137B (en) A kind of wet process silicon wafer cleaning method
WO2012172724A1 (en) Method for cleaning semiconductor wafer
CN104752161A (en) Method for improving appearance quality of rear surface of thin sheet
WO2016065728A1 (en) Method for detecting welding strength of chip bonding wire
US20100093177A1 (en) Method of cleaning semiconductor wafer and semiconductor wafer
JP2005093869A (en) Method of regenerating silicon wafer, and regenerated wafer
TWI422996B (en) Particle-containing resist peeling liquid and peeling method by using it
CN106783587A (en) The minimizing technology of semiconductor surface metal impurities
TW201325744A (en) Method for treating pollutant of workpiece provided with yttrium oxide coating layer
CN103021817B (en) Cleaning method after wet etching
JP4398091B2 (en) Cleaning solution and cleaning method for parts of semiconductor processing equipment
US20120288966A1 (en) Method for decapsulating integrated circuit package
KR102019658B1 (en) Soi wafer manufacturing method
CN109534683B (en) Method for eliminating defects of quartz glass subsurface layer
CN106558486A (en) The method for removing semiconductor chip mask layer
CN103617945B (en) A kind of restorative procedure of ic core plate electrode
JP5208658B2 (en) Semiconductor wafer cleaning method and semiconductor wafer
Tang et al. Decapsulation of high pin count IC packages with palladium coated copper wire bonds using an atmospheric pressure plasma
CN103972051B (en) A kind of aluminum etching preliminary processes method eliminating crystal edge particle residue
JP2008001101A (en) Removing method of surplus amount of forming material from substrate
KR100848777B1 (en) Method for removing defect in backside of wafer
KR102159244B1 (en) Cleaner composition for glass substrate for waste solar cell and method for cleaning the glass substrate for solar cell using thereof
TW201325745A (en) Pollutant treatment method for spray head with silicon carbide cover layer

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant