CN106782425A - The input voltage rise time controls circuit - Google Patents
The input voltage rise time controls circuit Download PDFInfo
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- CN106782425A CN106782425A CN201710204095.2A CN201710204095A CN106782425A CN 106782425 A CN106782425 A CN 106782425A CN 201710204095 A CN201710204095 A CN 201710204095A CN 106782425 A CN106782425 A CN 106782425A
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- voltage
- capacitor cell
- rise
- comparator
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Abstract
The present invention provides a kind of input voltage rise time control circuit.Input voltage rise time control circuit is included by setting voltage control unit, voltage control unit in panel driving unit：Voltage rate of rise detecting unit, first comparator, second comparator, control unit, and capacitor cell, the voltage rate of rise at the second end of voltage rate of rise detecting unit detecting capacitor cell is simultaneously exported to first comparator and the second comparator, the first comparator, and second comparator the second slope of the first slope of the voltage rate of rise and corresponding default minimum available machine time and correspondence default maximum available machine time is compared respectively, control module changes the capacitance of the capacitor cell according to comparative result, the time of input voltage is risen to so as to the voltage for adjusting the second end of capacitor cell, the control panel available machine time meets normal boot-strap time range, improve product quality.
Description
Technical field
The present invention relates to technical field of integrated circuits, more particularly to a kind of control of input voltage rise time circuit.
Background technology
With the development of Display Technique, the plane such as liquid crystal display (Liquid Crystal Display, LCD) display dress
Put because having the advantages that high image quality, power saving, fuselage is thin and has a wide range of application, and be widely used in mobile phone, TV, individual number
The various consumption electronic products such as word assistant, digital camera, notebook computer, desktop computer, as the master in display device
Stream.
It is backlight liquid crystal display that liquid crystal display device on existing market is most of, it include liquid crystal display panel and
Backlight module (Backlight Module).The operation principle of liquid crystal display panel is put in the middle of the parallel glass substrate of two panels
Liquid crystal molecule is put, there are many tiny electric wires vertically and horizontally in the middle of two panels glass substrate, liquid crystal is controlled by whether being powered
Molecular changes direction, generation picture is reflected by the light of backlight module.
Usual liquid crystal display panel is by color film (CF, Color Filter) substrate, thin film transistor (TFT) (TFT, Thin Film
Transistor) substrate, the liquid crystal (LC, Liquid Crystal) that is sandwiched between color membrane substrates and thin film transistor base plate and close
Sealing frame (Sealant) is constituted, and its moulding process is generally comprised：Leading portion array (Array) processing procedure (film, gold-tinted, etching and stripping
Film), stage casing (drive IC with printing electricity into box (Cell) processing procedure (TFT substrate and CF baseplate-laminatings) and back segment module group assembling processing procedure
Road plate is pressed).Wherein, leading portion Array processing procedures are mainly to form TFT substrate, in order to control the motion of liquid crystal molecule；Stage casing
Cell processing procedures are mainly and add liquid crystal between TFT substrate and CF substrates；Back segment module group assembling processing procedure is mainly driving IC pressings
Rotated with the integration of printed circuit board (PCB), and then driving liquid crystal molecule, display image.
Continuous improvement with consumer to product quality requirement, the available machine time of liquid crystal display panel closes as consumer
One of focus of note, and the available machine time of liquid crystal display panel is (defeated with the rise time of the input voltage of liquid crystal display panel
Enter voltage from the zero to the time needed for panel start voltage) it is relevant, it is too short when the rise time of input voltage, surge electricity can be caused
Stream (Inrush Current) is too big, it will the integrated circuit on impact panel, and then damages integrated circuit, when input voltage
Rise time is long, and the available machine time can be caused long, triggers customer complaint, therefore the generally available machine time of liquid crystal display panel to need
It is maintained between 0.5ms to 10ms.As shown in figure 1, be a kind of existing input voltage rise time control circuit, including：Machine
The panel driving unit 102 that core plate 101 and the machine core board 101 are electrically connected with, the panel driving unit 102 is provided with simultaneously
The first end of multiple electric capacity C10 of connection, the multiple electric capacity C10 is electrically connected with machine core board 101, and the second end is grounded, institute
State machine core board 101 and be input into a machine core board voltage Vin12 and one input voltage vin 1 of the backward output of panel driving unit 102, pass through
Rise time of the quantity control input voltage Vin1 of electric capacity C10 in control panel driver element 102, and then control panel opens
Machine time, electric capacity C10 quantity is more, and the rise time of input voltage vin 1 is more long, and the available machine time of panel is more long, electric capacity C10 numbers
Amount is fewer, and the rise time of input voltage vin 1 is shorter, and the available machine time of panel is shorter, this kind of input voltage rise time control electricity
It cannot be guaranteed that the panel driving unit 102 is arranged in pairs or groups, the machine core board 101 of any specification can make the available machine time of panel in 0.5ms on road
To between 10ms, it will influence product quality.
The content of the invention
It is an object of the invention to provide a kind of control of input voltage rise time circuit, the upper of input voltage can be adjusted
The time of liter, so the control panel available machine time meet normal boot-strap time range, improve product quality.
To achieve the above object, the present invention provides a kind of input voltage rise time control circuit, including：Machine core board and
The panel driving unit that the machine core board is electrically connected with, the panel driving unit is electrically connected with load；The panel driving list
Unit includes：The voltage control unit being electrically connected with the machine core board；
The voltage control unit includes：Voltage rate of rise detecting unit, first comparator, the second comparator, control
Module and capacitor cell；The input of the voltage rate of rise detecting unit is electrically connected with the output end of machine core board, the electricity
The output end of rate of rise detecting unit is pressed while being electrically connected with in-phase input end, the same phase of the second comparator of first comparator
Input；The inverting input of the first comparator receives first slope, and the output end of the first comparator is electrically connected with
The first input end of control module；The inverting input of second comparator receives the second slope, second comparator
Output end is electrically connected with the second input of control module；The first end of the capacitor cell is electrically connected with the output of control module
End, the second end of the capacitor cell is electrically connected with the output end of machine core board；When first slope is for corresponding default minimum start
Between capacitor cell the second end the voltage rate of rise, the second slope is the capacitor cell of correspondence default maximum available machine time
The second end the voltage rate of rise；
The output end of the machine core board exports an input voltage to panel driving unit；The voltage rate of rise detecting is single
The voltage rate of rise at the second end of unit's detecting capacitor cell, and the voltage rate of rise is exported to first comparator and the second ratio
Compared with the in-phase input end of device, be compared for the voltage rate of rise and first slope by the first comparator, and to control module
Export the first comparative result；With the second slope be compared the voltage rate of rise by second comparator, and to control module
Export the second comparative result；The control module changes the electric capacity list according to first comparative result and the second comparative result
The capacitance of unit, so that the voltage for adjusting the second end of capacitor cell rises to the time of input voltage.
When second comparative result is that the voltage rate of rise is less than the second slope, the control module controls the electricity
Hold the capacitance reduction of unit, so that the voltage for reducing the second end of capacitor cell rises to the time of input voltage；
When first comparative result is that the voltage rate of rise is more than first slope, the control module controls the electricity
Hold the capacitance increase of unit, so that the voltage for increasing the second end of capacitor cell rises to the time of input voltage.
When first comparative result is that the voltage rate of rise is less than first slope and is more than the second slope, the control
Module does not change the capacitance of capacitor cell.
The capacitor cell includes：Multiple FETs and multiple electric capacity one-to-one with the multiple FET；
The grid of the multiple FET is electrically connected with control module, source grounding, and drain electrode is electrically connected with the of correspondence electric capacity
One end；Second end of the multiple electric capacity is electrically connected with the output end of machine core board；
Described control unit changes the capacitance of capacitor cell with cut-off by controlling the conducting of multiple FETs respectively.
The panel driving unit also includes the current control unit being electrically connected with the voltage control unit；
The current control unit includes：Photo-coupler, first resistor, second resistance, the 3rd comparator and the 4th compare
Device；First pin of the photo-coupler is electrically connected with the output end of machine core board, and second pin is electrically connected with load, the 3rd pin
The first end of second resistance is electrically connected with, the 4th pin is electrically connected with first node；The second of the second resistance is terminated into electricity
Source voltage；The first end of the first resistor is electrically connected with first node, the second end ground connection；3rd comparator it is same mutually defeated
Enter end and be electrically connected with first node, inverting input receives the first comparison voltage, and it is defeated that output end is electrically connected with control module the 3rd
Enter end；The in-phase input end of the 4th comparator is electrically connected with first node, and inverting input receives the second comparison voltage, defeated
Go out the 4th input that end is electrically connected with control module；
When first comparison voltage is that default minimum surge current flows into the first pin of photo-coupler, first node
The voltage at place；When second comparison voltage is that default maximum surge current flows into the first pin of photo-coupler, first segment
Voltage at point；
It is described when surge current when the voltage at the second end of capacitor cell rises flows into the first pin of photo-coupler
With the first comparison voltage be compared voltage at first node by the 3rd comparator, and compares knot to control module output the 3rd
Really；With the second comparison voltage be compared voltage at first node by the 4th comparator, and to control module output the
Four comparative results；The control module changes the electricity of the capacitor cell according to the 3rd comparative result and the 4th comparative result
Capacity, so that the surge current when voltage for adjusting the second end of capacitor cell rises.
The photo-coupler includes light emitting diode and phototriode；The anode of the light emitting diode is photo-coupler
The first pin, negative electrode for photo-coupler second pin；The 3rd of the transmitting extremely photo-coupler of the phototriode draws
Pin, the 4th pin of current collection extremely photo-coupler.
When the 3rd comparative result is less than the first comparison voltage for the voltage at first node, the control module control
The capacitance reduction of the capacitor cell is made, so that the surge current when voltage for increasing the second end of capacitor cell rises；
When the 4th comparative result is more than the second comparison voltage for the voltage at first node, the control module control
The capacitance increase of the capacitor cell is made, so that the surge current when voltage for reducing the second end of capacitor cell rises.
When the 3rd comparative result for the voltage at first node is more than the first comparison voltage, and the described 4th compares knot
When being really less than the second comparison voltage for the voltage at first node, the control module does not change the electric capacity of the capacitor cell
Amount.
The control module is time schedule controller；
The voltage rate of rise detecting unit is differentiator.
The default minimum available machine time is 0.5ms, and the default maximum available machine time is 10ms.
Beneficial effects of the present invention：The input voltage rise time of the invention controls circuit, by panel driving unit
Interior setting voltage control unit, voltage control unit includes：Voltage rate of rise detecting unit, first comparator, second are compared
Device, control unit and capacitor cell, the voltage rate of rise at the second end of voltage rate of rise detecting unit detecting capacitor cell
And export to first comparator and the second comparator, the first comparator and the second comparator respectively rise tiltedly the voltage
Rate is compared with the first slope and second slope of correspondence default maximum available machine time of corresponding default minimum available machine time
Compared with control module changes the capacitance of the capacitor cell according to comparative result, so as to adjust the electricity at the second end of capacitor cell
Pressure rises to the time of input voltage, and the control panel available machine time meets normal boot-strap time range, improves product quality.
Brief description of the drawings
In order to be able to be further understood that feature of the invention and technology contents, refer to below in connection with of the invention detailed
Illustrate and accompanying drawing, however accompanying drawing only provide with reference to and explanation use, not for being any limitation as to the present invention.
In accompanying drawing,
Fig. 1 is the circuit diagram that the existing input voltage rise time controls circuit；
Fig. 2 is the circuit diagram that the input voltage rise time of the invention controls circuit；
Fig. 3 is that the voltage at the second end of input voltage rise time control circuit capacitance unit of the invention is changed over time
Line Chart.
Specific embodiment
Further to illustrate technological means and its effect that the present invention is taken, it is preferable to carry out below in conjunction with of the invention
Example and its accompanying drawing are described in detail.
Fig. 2 is referred to, the present invention provides a kind of input voltage rise time control circuit, including：Machine core board 1 and described
The panel driving unit 2 that machine core board 1 is electrically connected with, the connection of the panel driving unit 2 load 3；The panel driving unit 2 is wrapped
Include：The voltage control unit 21 being electrically connected with the machine core board 1；
The voltage control unit 21 includes：Voltage rate of rise detecting unit 211, first comparator 212, second are compared
Device 213, control module 214 and capacitor cell 215；The input of the voltage rate of rise detecting unit 211 is electrically connected with machine
The output end of core plate 1, the output end of the voltage rate of rise detecting unit 211 is electrically connected with first comparator 212 simultaneously
The in-phase input end of in-phase input end, the second comparator 213；It is oblique that the inverting input of the first comparator 212 receives first
Rate K1, the output end of the first comparator 212 is electrically connected with the first input end of control module 214；Second comparator
213 inverting input receives the second slope K 2, and the output end of second comparator 212 is electrically connected with control module 214
Second input；The first end of the capacitor cell 215 is electrically connected with the output end of control module 214, the capacitor cell 215
The second end be electrically connected with machine core board 1 output end；First slope K1 is the capacitor cell of correspondence default minimum available machine time
The voltage rate of rise at 215 the second end, the second slope K 2 is the of the capacitor cell 215 of correspondence default maximum available machine time
The voltage rate of rise at two ends；
The output end of the machine core board 1 exports an input voltage vin to panel driving unit 2；The voltage rate of rise
Detecting unit 211 detects the second terminal voltage rate of rise of capacitor cell 215, and the voltage rate of rise is exported to first compares
The in-phase input end of the comparator 213 of device 212 and second, the first comparator 212 is by the voltage rate of rise and first slope K1
It is compared, and the first comparative result is exported to control module 214；Second comparator 213 is by the voltage rate of rise and the
Two slope Ks 2 are compared, and export the second comparative result to control module 214；The control module 214 is according to described first
Comparative result and the second comparative result change the capacitance of the capacitor cell 215, so as to adjust the second end of capacitor cell 215
Voltage rise to time of input voltage vin.
Specifically, the control module 214 can be time schedule controller.
Specifically, the voltage rate of rise detecting unit 211 can be differentiator.
Preferably, the default minimum available machine time is 0.5ms, and the default maximum available machine time is 10ms.
It should be noted that due to the characteristic of electric capacity, the capacitor cell of voltage control unit 21 in panel driving unit 2
The voltage at 215 the second ends being electrically connected with the output end of machine core board 1 is in machine core board 1 to the input electricity of the output of panel driving unit 2 one
The input voltage vin can't be at once reached after pressure Vin, but linear rise and is somebody's turn to do to input voltage vin within a certain period of time
The available machine time of input voltage vin rise time influence panel is, it is necessary to the input voltage vin rise time is controlled default
Between maximum available machine time and default minimum available machine time, Fig. 3, rise time and the electric capacity list of input voltage vin are referred to
There is proportionate relationship in the voltage slope at first 215 second ends, the voltage rate of rise is bigger, and the input voltage vin rise time is shorter, electricity
The pressure rate of rise is smaller, and the input voltage vin rise time is more long, therefore the present invention is using voltage rate of rise detecting unit 211
Detect capacitor cell 215 the second end the voltage rate of rise, by the voltage rate of rise be input into respectively first comparator 212,
The in-phase input end of the second comparator 213, and inverting input in first comparator 212 receives a default minimum of correspondence and opens
The first slope K1 of machine time, a correspondence default maximum available machine time is received in the anti-phase input point of the second comparator 213
Second slope K 2, first slope K1 and the second slope K 2 by input voltage vin respectively with default minimum available machine time and pre-
If the maximum available machine time be divided by acquisition, by the comparator 213 of first comparator 212 and second respectively by capacitor cell 215
The voltage rate of rise at the second end is compared and obtains the first comparative result and the second ratio with first slope K1 with the second slope K 2
Relatively result, and first, second comparative result is exported to control module 214, control module 214 compares knot according to first, second
Fruit changes the capacitance of capacitor cell 215, the voltage rate of rise at the second end of capacitor cell 215 is maintained at first slope K1
Between the second slope K 2, input voltage vin rise time that also will be now be maintained at the default maximum available machine time with it is pre-
If the minimum available machine time between, the control panel available machine time meets normal boot-strap time range, improves product quality.
Specifically, the specific work process of input voltage rise time control circuit of the invention is as follows：
When second comparative result is that the voltage rate of rise is less than the second slope K 2, namely the second comparative result is low
Level, the control module controls the capacitance reduction of the capacitor cell 215, so as to reduce the second end of capacitor cell 215
Voltage rise to time of input voltage vin；
When first comparative result is that the voltage rate of rise is more than first slope K1, namely the first comparative result is height
Level, the control module 214 controls the capacitance of the capacitor cell 215 to increase, so as to increase the second of capacitor cell 215
The voltage at end rises to the time of input voltage vin；
When first comparative result is that the voltage rate of rise is less than first slope K1, and second comparative result is electricity
When the pressure rate of rise is more than the second slope K 2, namely the first comparative result is low potential, when the second comparative result is high potential, institute
The capacitance that control module 214 does not change capacitor cell 215 is stated, the voltage at the second end of capacitor cell 215 rises to input electricity
Press the time of Vin constant.
Specifically, the capacitor cell 215 includes：Multiple FET Q and with a pair of the multiple FET Q 1
The multiple electric capacity C for answering；The grid of the multiple FET Q is electrically connected with control module 214, source grounding, drain electrode electricity
Property connection correspondence electric capacity C first end；Second end of the multiple electric capacity C is electrically connected with the output end of machine core board 1；The control
Unit processed 214 changes the quantity of the electric capacity C that first end is grounded with cut-off by controlling the conducting of multiple FET Q respectively, changes
Become the capacitance of capacitor cell 215.
Further, the multiple FET Q is N-type FET, and described control unit 214 is by exporting electricity high
Control multiple FET Q in position are opened, and control multiple FET Q to close by exporting low potential.
Specifically, the panel driving unit 2 also includes the current control being electrically connected with the voltage control unit 21
Unit 22；The voltage control unit 21 connects load 3 by the current control unit 22；
The current control unit 22 includes：Photo-coupler 221, first resistor R1, second resistance R2, the 3rd comparator
222 and the 4th comparator 223；First pin 10 of the photo-coupler 221 is electrically connected with the output end of machine core board 1, and second draws
Pin 20 is electrically connected with load 3, and the 3rd pin 30 is electrically connected with the first end of second resistance R2, and the 4th pin 40 is electrically connected with first
Node A；The second of the second resistance R2 is terminated into supply voltage VCC；The first end of the first resistor R1 is electrically connected with the
One node A, the second end ground connection；The in-phase input end of the 3rd comparator 222 is electrically connected with first node A, inverting input
The first comparison voltage V1 is received, output end is electrically connected with the 3rd input of control module 214；4th comparator 223
In-phase input end is electrically connected with first node A, and inverting input receives the second comparison voltage V2, and output end is electrically connected with control mould
4th input of block 214；
When the first comparison voltage V1 is that default minimum surge current flows into the first pin 10 of photo-coupler 221,
Voltage at first node A；The second comparison voltage V2 is that default maximum surge current flows into the first of photo-coupler 221
During pin 10, the voltage at first node A；
Surge current when the voltage at the second end of capacitor cell 215 rises to input voltage vin flows into photo-coupler
During 221 the first pin 10, the 3rd comparator 222 is compared the voltage at first node A with the first comparison voltage V1
Compared with, and export the 3rd comparative result to control module 214；4th comparator 223 is by the voltage at first node A and second
Comparison voltage V2 is compared, and exports the 4th comparative result to control module 214；Control module 214 is according to the described 3rd ratio
Relatively result and the 4th comparative result change the capacitance of the capacitor cell 215, so that adjust the second end of capacitor cell 215
Surge current when voltage rises.
Specifically, the photo-coupler 221 includes light emitting diode D and phototriode VT；The light emitting diode D's
Anode is the first pin 10 of photo-coupler 221, and negative electrode is the second pin 20 of photo-coupler 221；The phototriode VT
Transmitting extremely photo-coupler 221 the 3rd pin 30, the 4th pin 40 of current collection extremely photo-coupler 221.
It should be noted that due to machine core board 1 output end to 2 output-input voltage Vin of panel driving unit when, electric capacity
The voltage at the second end that unit 215 is electrically connected with the output end of machine core board 1 is increased continuously until and reaches input voltage vin, has
Surge current is flowed into from the first pin 10 of photo-coupler 221 namely the anode of light emitting diode D, by after light emitting diode D
The negative electrode of second pin 20 namely light emitting diode D from photo-coupler 221 is exported to loading 3, now light emitting diode D hairs
Light, and luminous intensity and surge current positive correlation, therefore the voltage of the 4th pin 40 of photo-coupler 221 namely first node A
Voltage is one and the positively related value of surge current, is compared by by the comparator 222 and the 4th of control source the 3rd of first node A
The in-phase input end of device 223, while the inverting input in the 3rd comparator 222 and the 4th comparator 223 receives one respectively
One comparison voltage V1 and the second comparison voltage V2, the 3rd comparator 222 and the 4th comparator 223 are respectively by first node A
The voltage at place is compared with the first comparison voltage V1 and the second comparison voltage V2 and obtains the 3rd comparative result and the 4th compare knot
Fruit is simultaneously exported to control module 214, and control module 214 changes the electric capacity list according to the 3rd comparative result and the 4th comparative result
Unit 215 capacitance so that adjust the second end of capacitor cell 215 voltage rise when surge current be maintained at it is default most
Between big surge current and minimum surge current, prevent surge current excessive, the integrated circuit of counter plate is impacted, Jin Eryan
Panel service life long.
Specifically, when the 3rd comparative result is less than the first comparison voltage V1 for the voltage at first node A, namely
When 3rd comparative result is low level, the control module 214 controls the capacitance of the capacitor cell 215 to reduce, so as to increase
Plus the second end of capacitor cell 215 voltage rise when surge current；
When the 4th comparative result is more than the second comparison voltage V2 for the voltage at first node A, namely the 4th ratio
When relatively result is high level, the control module 214 controls the capacitance of the capacitor cell 215 to increase, so as to reduce electric capacity
The surge current when voltage at the second end of unit 215 rises；
When the 3rd comparative result for the voltage at first node A is more than the first comparison voltage V1, and the 4th compares knot
When being really less than the second comparison voltage V2 for the voltage at first node A, namely the 3rd comparative result is high level, and the 4th compares knot
Fruit is low level, and the control module 214 does not change the capacitance of the capacitor cell 215, the second end of capacitor cell 215
Surge current when voltage rises is constant.
In sum, control of a kind of input voltage rise time circuit that the present invention is provided, by panel driving unit
Interior setting voltage control unit, voltage control unit includes：Voltage rate of rise detecting unit, first comparator, second are compared
Device, control unit and capacitor cell, the voltage rate of rise at the second end of voltage rate of rise detecting unit detecting capacitor cell
And export to first comparator and the second comparator, the first comparator and the second comparator respectively rise tiltedly the voltage
Rate is compared with the first slope and second slope of correspondence default maximum available machine time of corresponding default minimum available machine time
Compared with control module changes the capacitance of the capacitor cell according to comparative result, so as to adjust the electricity at the second end of capacitor cell
Pressure rises to the time of input voltage, and the control panel available machine time meets normal boot-strap time range, improves product quality.More than
It is described, for the person of ordinary skill of the art, other can be made with technology according to the present invention scheme and technology design
Various corresponding changes and deformation, and all these changes and deformation should all belong to the protection model of appended claims of the present invention
Enclose.
Claims (10)
1. a kind of input voltage rise time control circuit, it is characterised in that including：Machine core board (1) and the machine core board (1)
The panel driving unit (2) of electric connection, the panel driving unit (2) connection load (3)；The panel driving unit (2)
Including：The voltage control unit (21) being electrically connected with the machine core board (1)；
The voltage control unit (21) includes：Voltage rate of rise detecting unit (211), first comparator (212), the second ratio
Compared with device (213), control module (214) and capacitor cell (215)；The input of the voltage rate of rise detecting unit (211)
It is electrically connected with the output end of machine core board (1), the output end of the voltage rate of rise detecting unit (211) is electrically connected with the simultaneously
The in-phase input end of one comparator (212), the in-phase input end of the second comparator (213)；The first comparator (212) it is anti-
Phase input receives first slope (K1), and the output end of the first comparator (212) is electrically connected with the of control module (214)
One input；The inverting input of second comparator (213) receives the second slope (K2), second comparator (213)
Output end be electrically connected with control module (214) the second input；The first end of the capacitor cell (215) is electrically connected with control
The output end of molding block (214), the second end of the capacitor cell (215) is electrically connected with the output end of machine core board (1)；First is oblique
Rate (K1) is the voltage rate of rise at the second end of the capacitor cell (215) of correspondence default minimum available machine time, the second slope
(K2) be correspondence default maximum available machine time capacitor cell (215) the second end the voltage rate of rise；
The output end of the machine core board (1) exports an input voltage (Vin) to panel driving unit (2)；The voltage rises oblique
Rate detecting unit (211) detecting capacitor cell (215) the second end the voltage rate of rise, and by the voltage rate of rise export to
The in-phase input end of first comparator (212) and the second comparator (213), the first comparator (212) rises voltage oblique
Rate is compared with first slope (K1), and exports the first comparative result to control module (214)；Second comparator
(213) the voltage rate of rise is compared with the second slope (K2), and the second comparative result is exported to control module (214)；
The control module (214) changes the electricity of the capacitor cell (215) according to first comparative result and the second comparative result
Capacity, so that the voltage for adjusting the second end of capacitor cell (215) rises to the time of input voltage (Vin).
2. input voltage rise time as claimed in claim 1 control circuit, it is characterised in that when second comparative result
When being less than the second slope (K2) for the voltage rate of rise, the control module (214) controls the electric capacity of the capacitor cell (215)
Amount is reduced, so that the voltage for reducing the second end of capacitor cell (215) rises to the time of input voltage (Vin)；
When first comparative result is that the voltage rate of rise is more than first slope (K1), control module (214) control
The capacitance increase of the capacitor cell (215), so that the voltage for increasing the second end of capacitor cell (215) rises to input electricity
Press the time of (Vin).
3. input voltage rise time as claimed in claim 1 or 2 control circuit, it is characterised in that compare when described first
Result is that the voltage rate of rise is less than first slope (K1), and second comparative result is the voltage rate of rise oblique more than second
During rate (K2), the control module (214) does not change the capacitance of capacitor cell (215).
4. input voltage rise time as claimed in claim 1 control circuit, it is characterised in that the capacitor cell (215)
Including：Multiple FETs (Q) and multiple electric capacity (C) one-to-one with the multiple FET (Q)；The multiple field
The grid of effect pipe (Q) is electrically connected with control module (214), source grounding, and drain electrode is electrically connected with the of correspondence electric capacity (C)
One end；Second end of the multiple electric capacity (C) is electrically connected with the output end of machine core board (1)；
Described control unit (214) changes capacitor cell (215) by controlling the conducting of multiple FETs (Q) respectively with cut-off
Capacitance.
5. input voltage rise time as claimed in claim 1 control circuit, it is characterised in that the panel driving unit
(2) current control unit (22) being electrically connected with the voltage control unit (21) is also included；
The current control unit (22) includes：Photo-coupler (221), first resistor (R1), second resistance (R2), the 3rd compare
Device (222) and the 4th comparator (223)；First pin (10) of the photo-coupler (221) is electrically connected with machine core board (1)
Output end, second pin (20) is electrically connected with load (3), and the 3rd pin (30) is electrically connected with the first end of second resistance (R2),
4th pin (40) is electrically connected with first node (A)；The second of the second resistance (R2) is terminated into supply voltage (VCC)；Institute
The first end for stating first resistor (R1) is electrically connected with first node (A), the second end ground connection；3rd comparator (222) it is same
Phase input is electrically connected with first node (A), and inverting input receives the first comparison voltage (V1), and output end is electrically connected with control
3rd input of module (214)；The in-phase input end of the 4th comparator (223) is electrically connected with first node (A), anti-phase
Input receives the second comparison voltage (V2), and output end is electrically connected with the 4th input of control module (214)；
First comparison voltage (V1) flows into first pin (10) of photo-coupler (221) for default minimum surge current
When, the voltage at first node (A) place；Second comparison voltage (V2) is that default maximum surge current flows into photo-coupler
(221) during the first pin (10), the voltage at first node (A) place；
Surge current when the voltage at the second end of capacitor cell (215) rises flows into the first pin of photo-coupler (221)
(10) when, be compared for the voltage at first node (A) place and the first comparison voltage (V1) by the 3rd comparator (222), and
The 3rd comparative result is exported to control module 214；4th comparator (223) is by the voltage and second at first node (A) place
Comparison voltage (V2) is compared, and exports the 4th comparative result to control module 214；The control module (214) is according to institute
State the 3rd comparative result and the 4th comparative result changes the capacitance of the capacitor cell (215), so as to adjust capacitor cell
(215) surge current when voltage at the second end rises.
6. input voltage rise time as claimed in claim 5 control circuit, it is characterised in that the photo-coupler (221)
Including light emitting diode (D) and phototriode (VT)；The anode of the light emitting diode (D) is the of photo-coupler (221)
One pin (10), negative electrode is the second pin (20) of photo-coupler (221)；The transmitting extremely optocoupler of the phototriode (VT)
3rd pin (30) of clutch (221), the 4th pin (40) of current collection extremely photo-coupler (221).
7. input voltage rise time as claimed in claim 5 control circuit, it is characterised in that when the 3rd comparative result
When being less than the first comparison voltage (V1) for the voltage at first node (A) place, the control module (214) controls the capacitor cell
(215) capacitance reduction, so that the surge current when voltage for increasing the second end of capacitor cell (215) rises；
When the 4th comparative result is more than the second comparison voltage (V2) for the voltage at first node (A) place, the control mould
Block (214) controls the capacitance increase of the capacitor cell (215), so as to reduce the voltage at the second end of capacitor cell (215)
Surge current during rising.
8. the input voltage rise time control circuit as described in claim 5 or 7, it is characterised in that compare when the described 3rd
Result is more than the first comparison voltage (V1) for the voltage at first node (A) place, and the 4th comparative result is first node (A)
When the voltage at place is less than the second comparison voltage (V2), the control module (214) does not change the electric capacity of the capacitor cell (215)
Amount.
9. input voltage rise time as claimed in claim 1 control circuit, it is characterised in that the control module (214)
It is time schedule controller；
The voltage rate of rise detecting unit (211) is differentiator.
10. input voltage rise time as claimed in claim 1 control circuit, it is characterised in that the default minimum is opened
The machine time is 0.5ms, and the default maximum available machine time is 10ms.
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| CN109326254A (en) * | 2018-11-07 | 2019-02-12 | 深圳市华星光电技术有限公司 | A kind of output signal control circuit and control method |
| CN110112901A (en) * | 2019-05-28 | 2019-08-09 | 苏州浪潮智能科技有限公司 | A kind of soft starting circuit and its control method applied to voltage regulator circuit |
| WO2020015197A1 (en) * | 2018-07-18 | 2020-01-23 | 深圳市华星光电半导体显示技术有限公司 | Circuit and method for detecting rise speed of input voltage |
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| CN106782425B (en) | 2019-05-31 |
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