CN205104490U - Thin film transistor base plate and display device thereof - Google Patents
Thin film transistor base plate and display device thereof Download PDFInfo
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- CN205104490U CN205104490U CN201520845447.9U CN201520845447U CN205104490U CN 205104490 U CN205104490 U CN 205104490U CN 201520845447 U CN201520845447 U CN 201520845447U CN 205104490 U CN205104490 U CN 205104490U
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Abstract
The utility model discloses a thin film transistor base plate and display device thereof relates to and shows technical field. The thin film transistor base plate includes that the base plate reaches thin film transistor circuit on the base plate, a thin film transistor circuit includes input electrode layer, output electrode layer and control electrode layer, the control electrode layer with the output electrode layer constitutes the first electric capacity that steps up, when the control electrode layer provides the on voltage, electric conductance leads to between input electrode layer and the output electrode layer. In this way, the utility model discloses can reduce the occupation space of drive circuit on display panel.
Description
Technical field
The utility model relates to Display Technique field, particularly relates to a kind of thin film transistor base plate and display unit thereof.
Background technology
Thin-film transistor (TFT, ThinFilmTransistor) display device has the characteristic such as high-responsivity, high-contrast, and its display effect is close to traditional cathode ray tube (CRT, CathodeRayTube) display, in equipment today to lightening development, become the display device of current main flow already.
Film crystal tube display apparatus includes display floater, and display floater comprises viewing area and non-display area, wherein, each pixel in viewing area is driven by the thin-film transistor be integrated in after pixel, and the driving connection of single-stage pixel is realized by single scan line, the driving of multiple scan lines that multiple pixel is corresponding is then primarily of the integrated circuit (IC of the independent making be arranged on around viewing area on display floater, IntegratedCircuit) come, by integrated circuit control at different levels in the charging and discharging step by step of scan line.But this structure can cause, when making display floater, needing to make special integrated circuit region on a display panel, is unfavorable for the area reducing display floater, affect the narrow frameization development of display device.
Along with industrial expansion, there has been proposed a kind of drive circuit substrate (GOA, GateDriverOnArray) technology, namely original processing procedure of display floater is used, the processing procedure similar with pixel thin-film transistor is below used to be produced on the substrate of non-display area by the drive circuit of scan line, make it one-body molded with the substrate of viewing area, substitute traditional integrated circuit region that need additional process be adopted to make outside display floater processing procedure.The advantage of drive circuit substrate technology is, reduces the welding sequence of integrated circuit, promotes production capacity and reduces product cost, and display floater can be made to be more suitable for making the display device of narrow frame or Rimless.
But existing drive circuit substrate technology is for guaranteeing that external integrated circuit can export correct voltage, volume is comparatively large, is still unfavorable for that display floater is to narrow frame or Rimless future development.
Utility model content
The technical problem that the utility model mainly solves is to provide a kind of thin film transistor base plate and display unit thereof, can reduce drive circuit taking up room on a display panel.
For solving the problems of the technologies described above, the technical scheme that the utility model adopts is: provide a kind of thin film transistor base plate.
Wherein, comprise, the first film transistor circuit on substrate and described substrate, described the first film transistor circuit comprises input electrode layer, output electrode layer and control electrode layer, described control electrode layer and described output electrode layer form boosting first electric capacity, when described control electrode layer provides conducting voltage, conduct between described input electrode layer and output electrode layer.
Wherein, described output electrode layer and the described control electrode layer small part that is projected on the substrate overlaps.
Wherein, the transistor of described the first film transistor circuit is N-type MOS transistor, described input electrode layer is drain electrode layer, described output electrode layer is source layer, described control electrode layer is grid layer, between described drain electrode layer and source layer, be provided with active layer, and described grid layer and described source layer form boosting first electric capacity, when described grid electrode layer provides conducting voltage, described source layer is conducted by described active layer and described drain electrode layer.
Wherein, described active layer and described grid layer form the second electric capacity, described second electric capacity and described first Capacitance parallel connection.
Wherein, it is characterized in that, described thin film transistor base plate comprises the second thin-film transistor circuit being positioned at viewing area, described the first film transistor circuit is positioned at the non-display area outside described viewing area, and the output electrode layer of described the first film transistor circuit is connected to described second thin-film transistor circuit, provide sweep signal to described second thin-film transistor circuit.
For solving the problems of the technologies described above, another technical scheme that the utility model adopts is: provide a kind of display unit.
Wherein, comprise thin film transistor base plate, described thin film transistor base plate comprises, the first film transistor circuit on substrate and described substrate, described the first film transistor circuit comprises input electrode layer, output electrode layer and control electrode layer, described control electrode layer and described output electrode layer form boosting first electric capacity, when described control electrode layer provides conducting voltage, conduct between described input electrode layer and output electrode layer.
Wherein, the projection on the substrate of described output electrode layer and described control electrode layer overlaps.
Wherein, the transistor of described the first film transistor circuit is N-type MOS transistor, described input electrode layer is drain electrode layer, described output electrode layer is source layer, described control electrode layer is grid layer, between described drain electrode layer and source layer, be provided with active layer, and described grid layer and described source layer form boosting first electric capacity, when described grid electrode layer provides conducting voltage, described source layer is conducted by described active layer and described drain electrode layer.
Wherein, described active layer and described grid layer form the second electric capacity, described second electric capacity and described first Capacitance parallel connection.
Wherein, it is characterized in that, described thin film transistor base plate comprises the second thin-film transistor circuit being positioned at viewing area, described the first film transistor circuit is positioned at the non-display area outside described viewing area, and the output electrode layer of described the first film transistor circuit is connected to described second thin-film transistor circuit, provide sweep signal to described second thin-film transistor circuit.
The beneficial effects of the utility model are: the situation being different from prior art, the first film transistor of the present utility model comprises the first film transistor circuit on substrate and substrate, the first film transistor circuit comprises input electrode layer, output electrode layer and control electrode layer, control electrode layer and output electrode layer is made to form the first electric capacity, the input voltage of control electrode layer can be raised, make thin-film transistor circuit also can conducting easily when not needing additionally to increase traditional capacitance, export correct voltage, thus be conducive to reducing drive circuit taking up room on a display panel, meanwhile, when control electrode layer provides conducting voltage, also ensure conducting between input electrode layer and output electrode layer.
Accompanying drawing explanation
Fig. 1 is a part of schematic cross-section of the utility model thin film transistor base plate one execution mode;
Fig. 2 is the schematic equivalent circuit of the thin-film transistor circuit in Fig. 1;
Fig. 3 is the concrete structure schematic diagram of thin film transistor base plate shown in Fig. 2;
Fig. 4 is the schematic top plan view of the utility model thin film transistor base plate one execution mode;
Fig. 5 is the structural representation of P line of vision thin film transistor base plate in Fig. 4;
Fig. 6 is the circuit diagram that the first film transistor circuit in Fig. 2 is applied to scan drive circuit;
Fig. 7 is another schematic equivalent circuit of thin-film transistor of the utility model thin film transistor base plate one execution mode;
Fig. 8 is the schematic equivalent circuit of the thin-film transistor of another execution mode of the utility model thin film transistor base plate;
Fig. 9 is the schematic top plan view of the utility model display unit one execution mode.
Embodiment
Consult Fig. 1 and Fig. 2, the utility model thin film transistor base plate one execution mode comprises: the first film transistor circuit 12 on substrate 11 and substrate 11, the first film transistor circuit 12 comprises input electrode layer 121, output electrode layer 122 and control electrode layer 123, control electrode layer 123 and output electrode layer 122 form boosting first electric capacity C1, when control electrode layer 123 provides conducting voltage, conduct between input electrode layer 121 and output electrode layer 122.Wherein, the electrode layer structure in Fig. 1 and the circuit relationships in Fig. 2 correspond to: output electrode layer 121 is D pole, and input electrode layer 122 is S pole, and control electrode layer 123 is G pole.
In the processing procedure of thin film transistor base plate, control electrode layer 123 and output electrode layer 122 are made two-plate to form the first electric capacity C1, save the electric capacity that traditional GOA technology needs peripheral hardware, with when control electrode layer provides conducting voltage, ensure conducting between input electrode layer 121 and output electrode layer 122, thus reduce drive circuit taking up room on a display panel, meet the narrow frame of display floater, lightening requirement.
Consult Fig. 1 and Fig. 3, output electrode layer 122 and control electrode layer 123 small part that is projected on the substrate 11 overlaps, and output electrode layer 122 and control electrode layer 123 are conductor, form the first electric capacity C1.
Consult Fig. 1, Fig. 2 and Fig. 3, in present embodiment, the transistor of the first film transistor circuit 12 is N-type MOS transistor, and its input electrode layer 121 is drain electrode layer, output electrode layer 122 is source layer, control electrode layer 123 is grid layer, is provided with active layer 124 between drain electrode layer and source layer, and grid layer and source layer form boosting first electric capacity C1, when grid layer provides conducting voltage, source layer is conducted by active layer 124 and drain electrode layer.Grid layer and source layer form boosting first electric capacity C1, be equivalent in traditional GOA technology the traditional capacitance needing to take the setting of display floater additional space, effectively improve the space utilization of thin film transistor base plate, solve the problem that traditional electric capacity need take display floater space.
Consult Fig. 4, Fig. 5 and Fig. 6, in present embodiment, thin film transistor base plate comprises the second thin-film transistor circuit 13 being positioned at viewing area 200, the first film transistor circuit 12 is arranged in the non-display area 300 outside viewing area, and the output electrode layer 122 of the first film transistor circuit 12 is connected to the second thin-film transistor circuit 13, sweep signal to the second thin-film transistor circuit 13 is provided, ensureing under the prerequisite conducted between output electrode layer 121 and output electrode layer 122, for the second thin-film transistor circuit 12 provides more stable sweep signal, promote the exhibit stabilization of viewing area 200.
Consult Fig. 6, can the utility model the first film transistor circuit execution mode be applied in scan drive circuit, this scan drive circuit comprises lower transmission module T0, output module T1 and drop-down module T2, T3, Qn is control end, CK is input, and Gn is output, and wherein output module T1 determines the current potential that grid exports, output module T1 comprises thin-film transistor of the present utility model, ensures the output quality of scan line.
Consult Fig. 7, another execution mode of the utility model thin film transistor base plate is on the basis of aforementioned embodiments, further, grid layer and source layer form the second electric capacity C2, second electric capacity C2 is in parallel with the first electric capacity C1, improves the capacity of electric capacity, more can ensure conducting of thin-film transistor.
Consult Fig. 2 and Fig. 8, must external capacitor for display floater, on the basis of above-mentioned execution mode, any electric capacity C3 can be increased according to actual needs ... Cn, to meet the demand of practical application, and has certain flexibility.
Consult Fig. 1, Fig. 2, Fig. 4 and Fig. 9, the utility model also provides a kind of display unit 1, and it comprises the substrate 11 of the thin film transistor base plate in above-mentioned execution mode and another stacked substrate 4.Control electrode layer 123 and output electrode layer 122 form the first electric capacity C1, and what solve traditional capacitance arranges the problem that can take display unit part space, meets the narrow frame of display unit, lightening requirement.Meanwhile, ensureing, under the prerequisite conducted between output electrode layer 121 and output electrode layer 122, for the second thin-film transistor circuit 12 provides more stable sweep signal, thus to make the exhibit stabilization of display unit 1 better.
The foregoing is only execution mode of the present utility model; not thereby the scope of the claims of the present utility model is limited; every utilize the utility model specification and accompanying drawing content to do equivalent structure or equivalent flow process conversion; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.
Claims (10)
1. a thin film transistor base plate, it is characterized in that: comprise, the first film transistor circuit on substrate and described substrate, described the first film transistor circuit comprises input electrode layer, output electrode layer and control electrode layer, described control electrode layer and described output electrode layer form boosting first electric capacity, when described control electrode layer provides conducting voltage, conduct between described input electrode layer and output electrode layer.
2. thin film transistor base plate according to claim 1, is characterized in that, described output electrode layer and the described control electrode layer small part that is projected on the substrate overlaps.
3. thin film transistor base plate according to claim 1, it is characterized in that, the transistor of described the first film transistor circuit is N-type MOS transistor, described input electrode layer is drain electrode layer, described output electrode layer is source layer, described control electrode layer is grid layer, active layer is provided with between described drain electrode layer and source layer, described grid layer and described source layer form boosting first electric capacity, when described grid electrode layer provides conducting voltage, described source layer is conducted by described active layer and described drain electrode layer.
4. thin film transistor base plate according to claim 3, is characterized in that, described active layer and described grid layer form the second electric capacity, described second electric capacity and described first Capacitance parallel connection.
5. thin film transistor base plate according to claim 1, it is characterized in that, described thin film transistor base plate comprises the second thin-film transistor circuit being positioned at viewing area, described the first film transistor circuit is positioned at the non-display area outside described viewing area, and the output electrode layer of described the first film transistor circuit is connected to described second thin-film transistor circuit, provide sweep signal to described second thin-film transistor circuit.
6. a display unit, it is characterized in that, comprise thin film transistor base plate, described thin film transistor base plate comprises, the first film transistor circuit on substrate and described substrate, described the first film transistor circuit comprises input electrode layer, output electrode layer and control electrode layer, and described control electrode layer and described output electrode layer form boosting first electric capacity, when described control electrode layer provides conducting voltage, conduct between described input electrode layer and output electrode layer.
7. display unit according to claim 6, is characterized in that, described output electrode layer and the described control electrode layer small part that is projected on the substrate overlaps.
8. display unit according to claim 6, it is characterized in that, the transistor of described the first film transistor circuit is N-type MOS transistor, described input electrode layer is drain electrode layer, described output electrode layer is source layer, described control electrode layer is grid layer, active layer is provided with between described drain electrode layer and source layer, described grid layer and described source layer form boosting first electric capacity, when described grid electrode layer provides conducting voltage, described source layer is conducted by described active layer and described drain electrode layer.
9. display unit according to claim 8, is characterized in that, described active layer and described grid layer form the second electric capacity, described second electric capacity and described first Capacitance parallel connection.
10. display unit according to claim 6, it is characterized in that, described thin film transistor base plate comprises the second thin-film transistor circuit being positioned at viewing area, described the first film transistor circuit is positioned at the non-display area outside described viewing area, and the output electrode layer of described the first film transistor circuit is connected to described second thin-film transistor circuit, provide sweep signal to described second thin-film transistor circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520845447.9U CN205104490U (en) | 2015-10-28 | 2015-10-28 | Thin film transistor base plate and display device thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201520845447.9U CN205104490U (en) | 2015-10-28 | 2015-10-28 | Thin film transistor base plate and display device thereof |
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| CN205104490U true CN205104490U (en) | 2016-03-23 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105185793A (en) * | 2015-10-28 | 2015-12-23 | 武汉华星光电技术有限公司 | Thin film transistor substrate and display device thereof |
| CN111682027A (en) * | 2020-05-29 | 2020-09-18 | 上海中航光电子有限公司 | Array substrate, display module and display device |
-
2015
- 2015-10-28 CN CN201520845447.9U patent/CN205104490U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105185793A (en) * | 2015-10-28 | 2015-12-23 | 武汉华星光电技术有限公司 | Thin film transistor substrate and display device thereof |
| CN111682027A (en) * | 2020-05-29 | 2020-09-18 | 上海中航光电子有限公司 | Array substrate, display module and display device |
| CN111682027B (en) * | 2020-05-29 | 2022-12-20 | 上海中航光电子有限公司 | Array substrate, display module and display device |
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