CN106782301A - A kind of driving method of array base palte, display panel and display panel - Google Patents
A kind of driving method of array base palte, display panel and display panel Download PDFInfo
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- CN106782301A CN106782301A CN201611138445.1A CN201611138445A CN106782301A CN 106782301 A CN106782301 A CN 106782301A CN 201611138445 A CN201611138445 A CN 201611138445A CN 106782301 A CN106782301 A CN 106782301A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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Abstract
The invention discloses the driving method of a kind of array base palte, display panel and display panel, including pixel and image element circuit, the at least three kinds Organic Light Emitting Diodes of color are provided with pixel, because at least one image element circuit includes the first light emitting control module and the second light emitting control module, the first light emitting control module and the second light emitting control module of image element circuit connect two Organic Light Emitting Diodes of same color respectively.So control two Organic Light Emitting Diodes of same color respectively using the first light emitting control module and the second light emitting control module of an image element circuit, the quantity of image element circuit on array base palte can not only be reduced, the quantity of data wire can also be reduced, the Capacitance Coupled such that it is able to reduce data wire is acted on.Also, on the basis of PPI is certain, reduces image element circuit and data line number amount may also operate as widening the effect of data wire and increase Pixel Dimensions, and then the pressure drop on data wire can be reduced and the technology difficulty of array base palte is reduced.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a display panel and a driving method of the display panel.
Background
An Organic Light Emitting Diode (OLED) Display is one of the hot spots in the research field of flat panel displays, and compared with a Liquid Crystal Display, an OLED Display has the advantages of low energy consumption, low production cost, self-luminescence, wide viewing angle, fast response speed, and the like.
In the conventional OLED display, as shown in fig. 1, a plurality of pixels are arranged in a matrix, each pixel includes R, G, B three organic light emitting diodes, each organic light emitting diode is connected to a data line of a corresponding column and a gate line of a corresponding row through a pixel circuit, and the organic light emitting diodes emit light under the driving of the pixel circuit.
However, in the conventional OLED display, due to the large number of data lines, a capacitive coupling effect may occur between the data lines, and the capacitive coupling effect of the data lines may cause the luminance of the organic light emitting diode to be lower than the normal luminance. Therefore, how to reduce the capacitive coupling effect of the display is an urgent technical problem to be solved by those skilled in the art.
Disclosure of Invention
Embodiments of the present invention provide an array substrate, a display panel and a driving method of a display panel, in which organic light emitting diodes of the same color share one pixel circuit, and the number of data lines is reduced by reducing the number of pixel circuits, so that the capacitive coupling effect of the data lines of the display panel can be reduced.
An array substrate provided in an embodiment of the present invention includes:
the pixel structure comprises a plurality of pixels arranged along a row direction and a column direction, wherein each pixel is provided with at least three organic light emitting diodes with different colors; and
a pixel circuit;
the pixel circuit comprises a first light-emitting control module and a second light-emitting control module, wherein the first light-emitting control module and the second light-emitting control module of the same pixel circuit are respectively connected with two organic light-emitting diodes with the same color;
the two organic light emitting diodes with the same color connected with the same pixel circuit are respectively a first organic light emitting diode and a second organic light emitting diode.
Correspondingly, the embodiment of the invention also provides a display panel which comprises any one of the array substrates provided by the embodiment of the invention.
Accordingly, an embodiment of the present invention further provides a driving method of the display panel, where when each frame of picture is displayed, the pixel circuit drives the first organic light emitting diode and the second organic light emitting diode connected thereto to alternately emit light.
Correspondingly, the embodiment of the present invention further provides another driving method of the display panel, when displaying the odd frame picture, the pixel circuit drives the first organic light emitting diode connected thereto to emit light; when the even frame picture is displayed, the pixel circuit drives the second organic light emitting diode connected with the pixel circuit to emit light.
The invention has the following beneficial effects:
the array substrate comprises pixels and pixel circuits, wherein at least three organic light emitting diodes with different colors are arranged in the pixels, and at least one pixel circuit comprises a first light emitting control module and a second light emitting control module which are respectively connected with two organic light emitting diodes with the same color. Therefore, the first light-emitting control module and the second light-emitting control module of one pixel circuit are adopted to respectively control the two organic light-emitting diodes with the same color, so that the number of the pixel circuits on the array substrate can be reduced, the number of the data lines can be reduced, and the capacitive coupling effect of the data lines can be reduced. Moreover, on the basis that the number of pixels (PPI) on a unit area is certain, the reduction of the number of pixel circuits and data lines can also play a role in widening the width of the data lines and increasing the size of the pixels, thereby reducing the voltage drop on the data lines and reducing the process difficulty of the array substrate.
Drawings
Fig. 1 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
fig. 2a is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 2b is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 3a is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 3b is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a pixel circuit in an array substrate according to an embodiment of the invention;
fig. 5a is a schematic structural diagram of a pixel circuit in an array substrate according to an embodiment of the present invention;
fig. 5b is a schematic structural diagram of a pixel circuit in the array substrate according to an embodiment of the present invention;
fig. 6a is a schematic structural diagram of another pixel circuit in an array substrate according to an embodiment of the invention;
fig. 6b is a schematic structural diagram of another pixel circuit in the array substrate according to an embodiment of the invention;
fig. 7 is a schematic structural diagram of another pixel circuit in the array substrate according to an embodiment of the invention;
fig. 8 is a schematic structural diagram of another pixel circuit in the array substrate according to an embodiment of the invention;
FIG. 9 is a timing diagram illustrating an operation of the pixel circuit shown in FIG. 8;
FIG. 10 is a timing diagram illustrating another operation of the pixel circuit shown in FIG. 8;
fig. 11 is another operation timing diagram corresponding to the pixel circuit shown in fig. 8.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The shapes and sizes of the various elements in the drawings are not to scale and are merely intended to illustrate the invention.
Fig. 1 is a schematic structural diagram of an array substrate according to an embodiment of the present invention. An array substrate provided in an embodiment of the present invention is shown in fig. 1, and includes:
a plurality of pixels 1 (only two pixels arranged in the row direction are shown in fig. 1) arranged in the row direction and the column direction, each pixel 1 having at least three different color organic light emitting diodes (R, G and B in fig. 1) disposed therein; and a pixel circuit 2; at least one pixel circuit 2 includes a first light-emitting control module 21 and a second light-emitting control module 22, where the first light-emitting control module 21 and the second light-emitting control module 22 of the same pixel circuit 2 are respectively connected to two organic light-emitting diodes (R or G in fig. 1) with the same color; the two organic light emitting diodes of the same color connected to the same pixel circuit 2 are a first organic light emitting diode 11 and a second organic light emitting diode 12, respectively.
In the array substrate provided by the embodiment of the present invention, the array substrate includes a pixel 1 and a pixel circuit 2, at least three organic light emitting diodes with different colors are disposed in the pixel 1, at least one pixel circuit 2 includes a first light emitting control module 21 and a second light emitting control module 22, and the first light emitting control module 21 and the second light emitting control module 22 of the same pixel circuit 2 are respectively connected to two organic light emitting diodes with the same color. In this way, the first light-emitting control module 21 and the second light-emitting control module 22 of one pixel circuit 2 are used to control two organic light-emitting diodes with the same color, so that the number of the pixel circuits 2 on the array substrate can be reduced, the number of the data lines can be reduced, and the capacitive coupling effect of the data lines can be reduced. Moreover, on the basis that the number of pixels (PPI) on a unit area is certain, the reduction of the number of pixel circuits and data lines can also play a role in widening the width of the data lines and increasing the size of the pixels, thereby reducing the voltage drop on the data lines and reducing the process difficulty of the array substrate.
It should be noted that, in the drawings in the present specification, the organic light emitting diodes with R, G, B three colors disposed in the pixels are taken as an example for illustration, but the present invention is not limited to the specific colors of the organic light emitting diodes.
The array substrate provided in the embodiment of the present invention may be formed by connecting two organic light emitting diodes with the same color to each pixel circuit, or may be formed by connecting two organic light emitting diodes with the same color to only a part of the pixel circuits, which is not limited herein.
In some optional implementations, in the array substrate provided in the embodiment of the present invention, each pixel circuit is connected to two organic light emitting diodes with the same color.
In some optional implementations, in the array substrate provided in this embodiment of the present invention, the first organic light emitting diode and the second organic light emitting diode connected to the same pixel circuit emit light simultaneously. Compared with the prior display panel with the same pixel resolution, the number of the pixel circuits is reduced, and the number of the data lines is correspondingly reduced due to the reduction of the number of the pixel circuits.
In some alternative implementations, in the array substrate provided in this embodiment of the present invention, the first organic light emitting diode and the second organic light emitting diode connected to the same pixel circuit alternately emit light. The life of the organic light emitting diode corresponding to each color is doubled, thereby prolonging the service life of the array substrate. The first organic light emitting diode and the second organic light emitting diode connected to the same pixel circuit may alternately emit light within one frame, or alternately emit light between two adjacent frames, which is not limited herein.
In some optional implementation manners, in the array substrate provided in the embodiment of the present invention, as shown in fig. 2a and fig. 2b, fig. 2a is a schematic structural diagram of another array substrate provided in the embodiment of the present invention, and fig. 2b is a schematic structural diagram of another array substrate provided in the embodiment of the present invention. Wherein the first organic light emitting diode 11 and the second organic light emitting diode 12 connected to the same pixel circuit 2 belong to two adjacent pixels 1, respectively, which facilitates wiring on the array substrate.
Further, in the above array substrate provided by the embodiment of the present invention, as shown in fig. 2a, the first organic light emitting diode 11 and the second organic light emitting diode 12 connected to the same pixel circuit 2 are adjacently disposed in the row direction; alternatively, as shown in fig. 2b, the first organic light emitting diode 11 and the second organic light emitting diode 12 connected to the same pixel circuit 2 are disposed adjacent to each other in the column direction.
Taking the array substrate shown in fig. 2a as an example, assume that in one frame, one pixel 1 of two adjacent pixels 1 needs to display purple, and the other pixel 1 needs to display yellow. In the two pixels 1 adjacent in the column direction, the pixel circuit 2 connected to the two red organic light emitting diodes R controls the two red organic light emitting diodes R to emit light simultaneously, the pixel circuit 2 connected to the two blue organic light emitting diodes B controls only the blue organic light emitting diode B located in the first column of pixels 1 to emit light, and the pixel circuit 2 connected to the two green organic light emitting diodes G controls only the green organic light emitting diode G located in the second column of pixels 1 to emit light. At this time, only the red organic light emitting diode R and the blue organic light emitting diode B emit light in the first column of pixels 1, and the pixel 1 displays purple. Only the red and green organic light emitting diodes R and G in the second column of pixels 1 emit light, and the pixel 1 displays yellow. Thereby controlling two pixels 1 with three pixel circuits 2, the lead wires are reduced.
In some optional implementation manners, in the array substrate provided in the embodiment of the present invention, as shown in fig. 3a and fig. 3b, fig. 3a is a schematic structural diagram of another array substrate provided in the embodiment of the present invention, and fig. 3b is a schematic structural diagram of another array substrate provided in the embodiment of the present invention. Wherein the first organic light emitting diode 11 and the second organic light emitting diode 12 connected to the same pixel circuit 2 belong to the same pixel 1.
Further, in the above array substrate provided by the embodiment of the present invention, as shown in fig. 3a and 3B, the number of the organic light emitting diodes (e.g., R, G or B in fig. 3a and 3B) of each color in each pixel 1 is two, and the two organic light emitting diodes of the same color in the pixel 1 are adjacently disposed in the row direction or in the column direction.
In some optional implementation manners, in the array substrate provided in the embodiment of the present invention, as shown in fig. 4, fig. 4 is a schematic structural diagram of a pixel circuit in the array substrate provided in the embodiment of the present invention. Each pixel circuit 2 further includes a driving module 23, and the driving module 23 is configured to drive the first organic light emitting diode 11 or the second organic light emitting diode 12 to emit light; the first organic light emitting diode 11 is connected with the driving module 23 through the first light emitting control module 21, and the second organic light emitting diode 12 is connected with the driving module 23 through the second light emitting control module 22; the first light emitting control module 21 is configured to enable the first organic light emitting diode 11 and the driving module 23 to be conducted under the control of the first control signal Emit 1; the second light-emitting control module 22 is configured to enable the second organic light-emitting diode 12 and the driving module 23 to be conducted under the control of the second control signal Emit 2.
In some optional implementation manners, in the array substrate provided in the embodiment of the present invention, as shown in fig. 5a and fig. 5b, fig. 5a is a schematic specific structural diagram of a pixel circuit in the array substrate provided in the embodiment of the present invention, and fig. 5b is a schematic specific structural diagram of another pixel circuit in the array substrate provided in the embodiment of the present invention. In the pixel circuit 2, the first light emission control block 21 includes a first switching transistor M1; the gate of the first switching transistor M1 is configured to receive the first control signal Emit1, the first pole of the first switching transistor M1 is connected to the first organic light emitting diode 11, and the second pole of the first switching transistor M1 is connected to the driving module 23.
In some alternative implementations, as shown in fig. 5a and 5b, in the pixel circuit 2, the second light emission control module 22 includes a second switching transistor M2; the gate of the second switching transistor M2 is configured to receive the second control signal Emit2, the first pole of the second switching transistor M2 is connected to the second organic light emitting diode 12, and the second pole of the second switching transistor M2 is connected to the driving module 23.
In some alternative implementations, the first switching transistor M1 and the second switching transistor M2 are both P-type transistors or both N-type transistors. As shown in fig. 5a, in the pixel circuit 2, both the first switching transistor M1 and the second switching transistor M2 are P-type transistors; alternatively, as shown in fig. 5b, the first switching transistor M1 and the second switching transistor M2 are both N-type transistors. Thus, the first switching transistor M1 and the second switching transistor M2 can be fabricated by the same process.
In some optional implementation manners, in the array substrate provided in the embodiment of the present invention, as shown in fig. 6a and fig. 6b, fig. 6a is a schematic specific structural diagram of another pixel circuit in the array substrate provided in the embodiment of the present invention, and fig. 6b is a schematic specific structural diagram of another pixel circuit in the array substrate provided in the embodiment of the present invention. In the pixel circuit 2, the first control signal Emit1 and the second control signal Emit2 are the same control signal, and the first switching transistor M1 and the second switching transistor M2 are different types of transistors. As shown in fig. 6a, the first switching transistor M1 is an N-type transistor, and the second switching transistor M2 is a P-type transistor; alternatively, as shown in fig. 6b, the first switching transistor M1 is a P-type transistor, and the second switching transistor M2 is an N-type transistor. Thus, only one of the first and second switching transistors M1 and M2 can be turned on at the same time, and thus the first and second organic light emitting diodes 11 and 12 can alternately emit light.
In some alternative implementations, in the array substrate provided in the embodiments of the present invention, the driving module may be any structure capable of driving the organic light emitting diode to emit light, and is not limited herein. One example is illustrated below.
In some optional implementations, in the array substrate provided in the embodiment of the present invention, as shown in fig. 5a to 6b, in the pixel circuit 2, the driving module 23 includes: a third switching transistor M3, a fourth switching transistor M4, a fifth switching transistor M5, a sixth switching transistor M5, a driving transistor M0 and a capacitor C1; the gate of the third switching transistor M3 is configured to receive the first Scan signal Scan1, the first pole of the third switching transistor M3 is configured to receive the reference signal Vref, and the second pole of the third switching transistor M3 is respectively connected to the gate of the driving transistor M0, the first pole of the sixth switching transistor M6, and the first end of the capacitor C1; a gate of the fourth switching transistor M4 is connected to receive the third control signal Emit3, a first pole of the fourth switching transistor M4 is connected to the second terminal of the capacitor C1 and the first voltage source VDD, respectively, and a second pole of the fourth switching transistor M4 is connected to the first pole of the driving transistor M0 and the second pole of the fifth switching transistor M5, respectively; a gate of the fifth switching transistor M5 is configured to receive the second Scan signal Scan2, and a first pole of the fifth switching transistor M5 is configured to receive the digital signal Vdata; a gate of the sixth switching transistor M6 is used to receive the second Scan signal Scan2, and a second pole of the sixth switching transistor M6 is connected to the second pole of the driving transistor M0, the first light emission control module 21 and the second light emission control module 22, respectively.
Further, in the array substrate provided in the embodiment of the present invention, as shown in fig. 7, fig. 7 is a schematic diagram of a specific structure of another pixel circuit in the array substrate provided in the embodiment of the present invention, and in the pixel circuit, the driving module 23 further includes: a seventh switching transistor M7; the gate of the seventh switching transistor M7 is configured to receive the fourth control signal Emit4, the first pole of the seventh switching transistor M7 is connected to the first voltage source VDD, and the second pole of the seventh switching transistor M7 is connected to the first pole of the driving transistor M0.
In some alternative implementations, as shown in fig. 8, fig. 8 is a schematic structural diagram of another pixel circuit in the array substrate according to the embodiment of the present invention. Fig. 8 differs from the embodiment provided in fig. 7 in that the gate of the fourth switching transistor M4 receives the first control signal Emit1 and the gate of the seventh switching transistor M7 receives the second control signal Emit 2. The fourth switching transistor receives the same control signal as the first switching transistor M1, and the seventh switching transistor M7 receives the same control signal as the second switching transistor M2, thereby reducing the number of control signals.
The foregoing is merely an example of the specific structure of the driving module in the pixel circuit, and in the specific implementation, the specific structure of the driving module is not limited to the above structure provided in the embodiment of the present invention, and may be other structures known to those skilled in the art, which is not limited herein.
In a specific implementation manner, in the array substrate provided by the embodiment of the invention, in the pixel circuit, the third switching transistor, the fourth switching transistor, the fifth switching transistor, the sixth switching transistor and the seventh switching transistor are all N-type transistors or P-type transistors.
Preferably, in order to simplify the manufacturing process, in the array substrate provided in the embodiment of the present invention, all transistors in the pixel circuit are N-type transistors or P-type transistors.
The Transistor in the above embodiments of the present invention may be a Thin Film Transistor (TFT) or a Metal oxide semiconductor field effect Transistor (MOS), and is not limited herein. In a specific implementation, the first electrode of the transistors may be a source, and the second electrode may be a drain, or the first electrode may be a drain, and the second electrode may be a source.
The following will explain the operation principle of the pixel circuit in the array substrate provided by the embodiment of the invention by taking the pixel circuit shown in fig. 8 as an example. In the pixel circuit shown in fig. 8, all the transistors are P-type transistors, and each P-type transistor is turned off by a high-level signal and turned on by a low-level signal. In the following description, a high level signal is denoted by 1, and a low level signal is denoted by 0.
Taking the first organic light emitting diode and the second organic light emitting diode emitting light simultaneously as an example, an input timing diagram corresponding to one frame time is shown in fig. 9, and fig. 9 is an operation timing diagram corresponding to the pixel circuit shown in fig. 8. Specifically, three stages of T1, T2, and T3 in the input timing chart shown in fig. 9 are selected.
In the reset phase T1, Scan1 is 0, Scan2 is 1, Emit1 is 1, and Emit2 is 1.
Only the third switching transistor M3 is turned on and the other switching transistors are all turned off. The turned-on third switching transistor M3 provides the reference signal Vref to the gate of the driving transistor M0, the capacitor C1 starts to charge, and the voltage at the first terminal of the capacitor C1 is Vref. In this stage, the reference signal Vref needs to satisfy Vref>VGL-VthVGL is the potential of a low level signal, VthIs the threshold voltage of the driving transistor M0, otherwise the voltage of the gate of the driving transistor M0 is VGL-Vth。
In the compensation stage T2, Scan1 is 1, Scan2 is 0, Emit1 is 1, and Emit2 is 1.
The fifth switching transistor M5 and the sixth transistor M6 are turned on, and the other switching transistors are turned off. The driving transistor M0 is turned on, and the digital signal Vdata sequentially passes through the turned-on fifth switching transistor M5, the turned-on driving transistor M0 and the turned-on sixth switching transistor N6 to turn on the capacitor C1 to start discharging, when a voltage difference Vgs between a gate voltage of the driving transistor M0 and a first voltage thereof satisfies Vgs ═ VthAt this time, the driving transistor M0 is turned off, and the voltage of the first terminal of the capacitor C1 becomes Vdata + Vth。
In the light-emitting phase T3, Scan1 is 1, Scan2 is 1, Emit1 is 0, and Emit2 is 0.
The first switching transistor M1, the second switching transistor M2, the fourth switching transistor M4, and the seventh transistor M7 are turned on, and the other switching transistors are turned off. The voltage at the first end of the capacitor C1 is still Vdata + VthThe voltage VDD of the first voltage source VDD is supplied to the gate of the driving transistor M0 through the turned-on fourth and seventh switching transistors M4 and M7. The driving transistor M0 is operated in saturation, and the current I flowing through the driving transistor M0 satisfies the following formula according to the current characteristics in saturation: k (V)gs–Vth)2＝K[(Vdata+Vth)-Vdd-Vth]2＝K(Vdata-Vdd)2Where K is a structural parameter, this number is relatively stable in the same structure and can be calculated as a constant. It should be noted that the voltage difference Vds between the second pole and the first pole of the driving transistor M0 needs to satisfy Vds<Vgs-VthIn which Vgs-VthLess than or equal to 5 volts.
It can be seen that the currents flowing through the first and second organic light emitting diodes are not affected by the threshold voltage of the driving transistor, and are only related to the data signal and the first power voltage terminal, so as to completely solve the problem of the threshold voltage drift of the driving transistor caused by the process and long-time operation on the working current I of the light emitting diodeoledThe influence of (2) improves the panel display non-uniformity.
Taking an example that only the first oled emits light within a frame time, an input timing diagram corresponding to a frame time is shown in fig. 10, and fig. 10 is another operation timing diagram corresponding to the pixel circuit shown in fig. 8. Specifically, three stages of T1, T2, and T3 in the input timing chart shown in fig. 10 are selected.
In the reset phase T1, Scan1 is 0, Scan2 is 1, Emit1 is 1, and Emit2 is 1.
Only the third switching transistor M3 is turned on and the other switching transistors are all turned off. The turned-on third switching transistor M3 provides the reference signal Vref to the gate of the driving transistor M0, the capacitor C1 starts to charge, and the voltage at the first terminal of the capacitor C1 is Vref. In this stage, the reference signal Vref needs to satisfy Vref>VGL-VthVGL is the potential of a low level signal, VthIs the threshold voltage of the driving transistor M0, otherwise the voltage of the gate of the driving transistor M0 is VGL-Vth。
In the compensation stage T2, Scan1 is 1, Scan2 is 0, Emit1 is 1, and Emit2 is 1.
The fifth switching transistor M5 and the sixth transistor M6 are turned on, and the other switching transistors are turned off. The driving transistor M0 is turned on, and the digital signal Vdata is sequentially turned on through the turned-on fifth switching transistor M5, the driving transistor M0 and the sixth transistor N6 to turn on the digital signal VdataThe capacitor C1 starts to discharge when the voltage difference Vgs between the gate voltage of the driving transistor M0 and the first voltage thereof satisfies Vgs-VthAt this time, the driving transistor M0 is turned off, and the voltage of the first terminal of the capacitor C1 becomes Vdata + Vth。
In the light-emitting phase T3, Scan1 is 1, Scan2 is 1, Emit1 is 0, and Emit2 is 1.
The first switching transistor M1, the second switching transistor M2, and the fourth switching transistor M4 are turned on, and the other switching transistors are turned off. The voltage at the first end of the capacitor C1 is still Vdata + VthThe voltage VDD of the first voltage source VDD is supplied to the gate of the driving transistor M0 through the turned-on fourth switching transistor M4. The driving transistor M0 is operated in saturation, and the current I flowing through the driving transistor M0 satisfies the following formula according to the current characteristics in saturation: k (V)gs–Vth)2＝K[(Vdata+Vth)-Vdd-Vth]2＝K(Vdata-Vdd)2Where K is a structural parameter, this number is relatively stable in the same structure and can be calculated as a constant. It should be noted that the voltage difference Vds between the second pole and the first pole of the driving transistor M0 needs to satisfy Vds<Vgs-VthIn which Vgs-VthLess than or equal to 5 volts.
It can be seen that the current flowing through the first organic light emitting diode is not influenced by the threshold voltage of the driving transistor, and is only related to the data signal and the first power voltage terminal, thereby thoroughly solving the problem that the threshold voltage drift of the driving transistor caused by the process and long-time operation causes the working current I of the light emitting diodeoledThe influence of (2) improves the panel display non-uniformity.
Taking the example that the first organic light emitting diode and the second organic light emitting diode alternately emit light within a frame time, an input timing diagram corresponding to a frame time is shown in fig. 11, and fig. 11 is another operation timing diagram corresponding to the pixel circuit shown in fig. 8. Specifically, four stages of T1, T2, T3, and T4 in the input timing chart shown in fig. 11 are selected.
In the reset phase T1, Scan1 is 0, Scan2 is 1, Emit1 is 1, and Emit2 is 1.
Only the third switching transistor M3 is turned on and the other switching transistors are all turned off. The turned-on third switching transistor M3 provides the reference signal Vref to the gate of the driving transistor M0, the capacitor C1 starts to charge, and the voltage at the first terminal of the capacitor C1 is Vref. In this stage, the reference signal Vref needs to satisfy Vref>VGL-VthVGL is the potential of a low level signal, VthIs the threshold voltage of the driving transistor M0, otherwise the voltage of the gate of the driving transistor M0 is VGL-Vth。
In the compensation stage T2, Scan1 is 1, Scan2 is 0, Emit1 is 1, and Emit2 is 1.
The fifth switching transistor M5 and the sixth transistor M6 are turned on, and the other switching transistors are turned off. The driving transistor M0 is turned on, and the digital signal Vdata sequentially passes through the turned-on fifth switching transistor M5, the turned-on driving transistor M0 and the turned-on sixth switching transistor N6 to turn on the capacitor C1 to start discharging, when a voltage difference Vgs between a gate voltage of the driving transistor M0 and a first voltage thereof satisfies Vgs ═ VthAt this time, the driving transistor M0 is turned off, and the voltage of the first terminal of the capacitor C1 becomes Vdata + Vth。
In the first emission phase T3, Scan1 is 1, Scan2 is 1, Emit1 is 0, and Emit2 is 1.
The first switching transistor M1, the second switching transistor M2, and the fourth switching transistor M4 are turned on, and the other switching transistors are turned off. The voltage at the first end of the capacitor C1 is still Vdata + VthThe voltage VDD of the first voltage source VDD is supplied to the gate of the driving transistor M0 through the turned-on fourth switching transistor M4. The driving transistor M0 is operated in saturation, and the current I flowing through the driving transistor M0 satisfies the following formula according to the current characteristics in saturation: k (V)gs–Vth)2＝K[(Vdata+Vth)-Vdd-Vth]2＝K(Vdata-Vdd)2Where K is a structural parameter, this number is relatively stable in the same structure and can be calculated as a constant. It should be noted that the voltages of the second and first poles of the driving transistor M0The difference Vds needs to satisfy Vds<Vgs-VthIn which Vgs-VthLess than or equal to 5 volts.
In the second light-emitting phase T4, Scan1 is 1, Scan2 is 1, Emit1 is 1, and Emit2 is 2.
The first switching transistor M1, the second switching transistor M2, and the seventh switching transistor M7 are turned on, and the other switching transistors are turned off. The voltage at the first end of the capacitor C1 is still Vdata + VthThe voltage VDD of the first voltage source VDD is supplied to the gate of the driving transistor M0 through the turned-on seventh switching transistor M7. The driving transistor M0 is operated in saturation, and the current I flowing through the driving transistor M0 satisfies the following formula according to the current characteristics in saturation: k (V)gs–Vth)2＝K[(Vdata+Vth)-Vdd-Vth]2＝K(Vdata-Vdd)2Where K is a structural parameter, this number is relatively stable in the same structure and can be calculated as a constant. It should be noted that the voltage difference Vds between the second pole and the first pole of the driving transistor M0 needs to satisfy Vds<Vgs-VthIn which Vgs-VthLess than or equal to 5 volts.
It can be seen that the currents flowing through the first and second organic light emitting diodes are not affected by the threshold voltage of the driving transistor, and are only related to the data signal and the first power voltage terminal, so as to completely solve the problem of the threshold voltage drift of the driving transistor caused by the process and long-time operation on the working current I of the light emitting diodeoledThe influence of (2) improves the panel display non-uniformity.
Based on the same inventive concept, the embodiment of the invention further provides a display panel, which comprises any one of the array substrates provided by the embodiment of the invention. The organic light emitting display panel may be a display panel of a computer, a mobile phone, a television, a notebook, an all-in-one machine, etc., and other essential components of the display panel are all understood by those skilled in the art, and are not described herein in detail, nor should be construed as limitations to the present invention.
Based on the same inventive concept, an embodiment of the present invention further provides a driving method of the display panel, where when each frame of picture is displayed, the pixel circuit drives the first organic light emitting diode and the second organic light emitting diode connected thereto to alternately emit light. The life span of the organic light emitting diode corresponding to each color is doubled, thereby improving the life span of the display panel.
Based on the same inventive concept, the embodiment of the present invention further provides another driving method of the display panel, when displaying the odd frame picture, the pixel circuit drives the first organic light emitting diode connected thereto to emit light; when the even frame picture is displayed, the pixel circuit drives the second organic light emitting diode connected with the pixel circuit to emit light. The life span of the organic light emitting diode corresponding to each color is doubled, thereby improving the life span of the display panel.
In the array substrate, the display panel and the driving method of the display panel provided by the embodiment of the invention, the array substrate includes the pixel and the pixel circuit, the pixel is provided with the organic light emitting diodes with at least three different colors, because at least one pixel circuit includes the first light emitting control module and the second light emitting control module, the first light emitting control module and the second light emitting control module of the same pixel circuit are respectively connected with the organic light emitting diodes with two same colors. Therefore, the first light-emitting control module and the second light-emitting control module of one pixel circuit are adopted to respectively control the two organic light-emitting diodes with the same color, so that the number of the pixel circuits on the array substrate can be reduced, the number of the data lines can be reduced, and the capacitive coupling effect of the data lines can be reduced. Moreover, on the basis of a certain PPI, the reduction of the number of the pixel circuits and the data lines can also play a role in widening the width of the data lines and increasing the size of the pixels, so that the voltage drop on the data lines can be reduced, and the process difficulty of the array substrate can be reduced.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (18)
1. An array substrate, comprising:
the pixel structure comprises a plurality of pixels arranged along a row direction and a column direction, wherein each pixel is provided with at least three organic light emitting diodes with different colors; and
a pixel circuit;
the pixel circuit comprises a first light-emitting control module and a second light-emitting control module, wherein the first light-emitting control module and the second light-emitting control module of the same pixel circuit are respectively connected with two organic light-emitting diodes with the same color;
the two organic light emitting diodes with the same color connected with the same pixel circuit are respectively a first organic light emitting diode and a second organic light emitting diode.
2. The array substrate of claim 1, wherein the first organic light emitting diode and the second organic light emitting diode connected to the same pixel circuit belong to two adjacent pixels, respectively.
3. The array substrate of claim 2, wherein the first and second organic light emitting diodes connected to the same pixel circuit are adjacently disposed in the row direction; or,
the first organic light emitting diode and the second organic light emitting diode connected to the same pixel circuit are adjacently disposed in the column direction.
4. The array substrate of claim 1, wherein the first organic light emitting diode and the second organic light emitting diode connected to the same pixel circuit belong to the same pixel.
5. The array substrate of claim 4, wherein the number of the organic light emitting diodes of each color in each of the pixels is two, and the two organic light emitting diodes of the same color in the pixel are adjacently disposed in the row direction or in the column direction.
6. The array substrate of claim 1, wherein the first organic light emitting diode and the second organic light emitting diode connected to the same pixel circuit emit light simultaneously or alternately.
7. The array substrate of any one of claims 1-6, wherein each of the pixel circuits further comprises a driving module for driving the first organic light emitting diode or the second organic light emitting diode to emit light; wherein,
the first organic light emitting diode is connected with the driving module through the first light emitting control module, and the second organic light emitting diode is connected with the driving module through the second light emitting control module;
the first light emitting control module is used for conducting the first organic light emitting diode with the driving module under the control of a first control signal;
the second light-emitting control module is used for enabling the second organic light-emitting diode to be conducted with the driving module under the control of a second control signal.
8. The array substrate of claim 7, wherein in the pixel circuit, the first light emission control module comprises a first switching transistor; wherein,
the grid electrode of the first switch transistor is used for receiving the first control signal, the first pole of the first switch transistor is connected with the first organic light emitting diode, and the second pole of the first switch transistor is connected with the driving module.
9. The array substrate of claim 8, wherein in the pixel circuit, the second light emission control module comprises a second switching transistor; wherein,
the grid electrode of the second switch transistor is used for receiving the second control signal, the first pole of the second switch transistor is connected with the second organic light emitting diode, and the second pole of the second switch transistor is connected with the driving module.
10. The array substrate of claim 9, wherein in the pixel circuit, the first control signal and the second control signal are the same control signal;
the first switch transistor is an N-type transistor, and the second switch transistor is a P-type transistor;
or, the first switch transistor is a P-type transistor, and the second switch transistor is an N-type transistor.
11. The array substrate of claim 9, wherein the first switching transistor and the second switching transistor in the pixel circuit are both N-type transistors or P-type transistors.
12. The array substrate of claim 7, wherein in the pixel circuit, the driving module comprises: the driving circuit comprises a third switching transistor, a fourth switching transistor, a fifth switching transistor, a sixth switching transistor, a driving transistor and a capacitor; wherein,
a gate of the third switching transistor is configured to receive a first scan signal, a first pole of the third switching transistor is configured to receive a reference signal, and a second pole of the third switching transistor is respectively connected to the gate of the driving transistor, the first pole of the sixth switching transistor, and the first end of the capacitor;
a gate of the fourth switching transistor is connected to receive a third control signal, a first electrode of the fourth switching transistor is connected to the second end of the capacitor and the first voltage source, and a second electrode of the fourth switching transistor is connected to the first electrode of the driving transistor and the second electrode of the fifth switching transistor;
a gate of the fifth switching transistor is used for receiving a second scanning signal, and a first pole of the fifth switching transistor is used for receiving a digital signal;
and the grid electrode of the sixth switching transistor is used for receiving the second scanning signal, and the second pole of the sixth switching transistor is respectively connected with the second pole of the driving transistor, the first light-emitting control module and the second light-emitting control module.
13. The array substrate of claim 12, wherein in the pixel circuit, the driving module further comprises: a seventh switching transistor; wherein,
the gate of the seventh switching transistor is configured to receive a fourth control signal, the first pole of the seventh switching transistor is connected to the first voltage source, and the second pole of the seventh switching transistor is connected to the first pole of the driving transistor.
14. The array substrate of claim 13, wherein the third control signal and the first control signal are the same control signal, and the fourth control signal and the second control signal are the same control signal.
15. The array substrate of claim 13, wherein the third, fourth, fifth, sixth, and seventh switching transistors in the pixel circuit are all N-type transistors or P-type transistors.
16. A display panel comprising the array substrate according to any one of claims 1 to 15.
17. The method according to claim 16, wherein the pixel circuit drives the first organic light emitting diode and the second organic light emitting diode connected thereto to alternately emit light when each frame is displayed.
18. The driving method of the display panel according to claim 16, wherein the pixel circuit drives the first organic light emitting diode connected thereto to emit light when displaying an odd-numbered frame picture; when the even frame picture is displayed, the pixel circuit drives the second organic light emitting diode connected with the pixel circuit to emit light.
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