CN1067778C - Analog multiplier using oversampling segma delta modulator - Google Patents
Analog multiplier using oversampling segma delta modulator Download PDFInfo
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- CN1067778C CN1067778C CN96102375A CN96102375A CN1067778C CN 1067778 C CN1067778 C CN 1067778C CN 96102375 A CN96102375 A CN 96102375A CN 96102375 A CN96102375 A CN 96102375A CN 1067778 C CN1067778 C CN 1067778C
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- 238000005516 engineering process Methods 0.000 description 14
- 239000004065 semiconductor Substances 0.000 description 8
- 230000000875 corresponding effect Effects 0.000 description 7
- 230000005669 field effect Effects 0.000 description 6
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- 238000011161 development Methods 0.000 description 2
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- 230000008030 elimination Effects 0.000 description 2
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- PICXIOQBANWBIZ-UHFFFAOYSA-N zinc;1-oxidopyridine-2-thione Chemical class [Zn+2].[O-]N1C=CC=CC1=S.[O-]N1C=CC=CC1=S PICXIOQBANWBIZ-UHFFFAOYSA-N 0.000 description 2
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Abstract
The present invention relates to an analog multiplier which uses over-sampling sigma delta modulation, particularly to a multiplier of over-sampling sigma delta A/D conversion, which is provided with an over-sampling sigma delta modulator for outputting a one-bit digital signal. The input end of a one-bit analog multiplier is connected with the one-bit digital signal output end of the over-sampling sigma delta modulator, and the input end of a low-pass filter is connected with the output end of the one-bit analog multiplier; the output end of the low-pass filter is the product result signal output end of the analog multiplier which uses over-sampling sigma delta modulation. An analog circuit and a digital circuit are flexibly combined, and a technique of the over-sampling sigma delta modulation is skillfully utilized. The present invention has the advantages of simple circuit, effective enhancement of system integration degree, power consumption reduction and production cost reduction.
Description
The present invention relates to a kind of analog-to-digital multiplier of sampling Σ Δ of crossing.
In many application, integrated analog multiplier is a requisite unit.Realize that the model of high-precision analog multiplier and the circuit engineering that is generally adopted again are the Kilbert multipliers.The Kilbert multiplier has used the inherent accurately transfer linear feature of triode to realize multiplication function, and one of its significant drawbacks is to need triode, thereby its application is limited in the occasion of the integrated circuit production technology of triode.Although the continuous development of metal-oxide-semiconductor field effect transistor technology with and on integrated circuit production technology market the production technology of triode head and shoulders above, but realize that with metal-oxide-semiconductor field effect transistor integrated circuit production technology high performance analog multiplier remains a very difficult thing at present, and often need mould-number, D-A converter in order to realize the multiplication function in the numeric field.Under the situation that high-precision applications requires, this implementation method is complex process not only, and need take a large amount of semiconductor areas and power consumption.
J.C.Candy and G.C.Temes (" Oversampling methodsfor A/D and D/Aconversion " in Oversampling Dalta-Sigma Data Converters:Theory, Designand Simulation, New York, IEEE Perss, 1992) to the theory and the operation of appearing sampling ∑ Delta modulator.
Purpose of the present invention aims to provide a kind of simulation, the flexible combination of digital circuit, uses the modulation of sampling Σ Δ, just can realize high performance analog multiplier in the occasion that metal-oxide-semiconductor field effect transistor integrated circuit production technology is only arranged with very simple circuit.
The present invention is provided with the Delta modulator of sampling ∑ excessively of exporting the one-bit digital signal according to input simulating signal, reference voltage and a sampling frequency will being taken advantage of; Be provided with an analog multiplier, an input end of an analog multiplier is taken over the one-bit digital signal output part of sampling sigma Delta modulator, external another input simulating signal that will be taken advantage of of another input end of an analog multiplier; Be provided with a low-pass filter, the output terminal of an analog multiplier of input termination of low-pass filter, the output terminal of low-pass filter are the result of product signal output part that used the analog multiplier of the Σ Δ modulation of taking a sample.
Because the application of Kilbert multiplier is limited in the application scenario of the integrated circuit production technology of triode, although the continuous development of metal-oxide-semiconductor field effect transistor technology, its use on integrated circuit production technology market is triode production technology head and shoulders above also, but realize that with metal-oxide-semiconductor field effect transistor integrated circuit production technology high performance analog multiplier remains a very difficult thing at present, often need A/D, D/A converter in order to realize the multiplication function in the numeric field.Under the situation that high-precision applications requires, this implementation method is complex process not only, takies a large amount of semiconductor silicon areas, and needs a large amount of power consumptions.And the present invention provides a good solution for the problems referred to above, it is simulation, the flexible combination of digital circuit, utilized sampling Σ Δ modulation technique dexterously, one of two analog input signals that need be taken advantage of change into high-precision one-bit digital signal earlier, then, it is multiplied each other by a very simple multiplier and another input simulating signal.The circuit engineering of use described in this invention, the high-precision analog multiplier can directly have only on the metal-oxide-semiconductor field effect transistor integrated circuit production line, with very simple circuit realization comparatively speaking.This technology can improve the integrated level of system effectively, reduces power consumption and production cost, compares with other analogue multiplication integrated circuit techniques, and this is the outstanding advantage of this circuit engineering.
Secondly, the also available discrete-time system of the both available continuous time system of the present invention realizes, and an analog multiplier can be realized with multiple circuit, comprising the quite simple circuit of usefulness, and keeps very high degree of accuracy.The output of an other analog multiplier is through a simulation low-pass filter, the high frequency quantizing noise elimination of introducing in the sigma Delta modulator of taking a sample will be crossed, therefore except very little some quantizing noises and electronic noise, in this multiplication process, the signal content in the low-frequency range will intactly be kept.Simultaneously, the present invention will have its Practical significance, for example use existing C MOS Analogical Circuit Technique, it can be made on the CMOS special IC, as family expenses ammeter system, greatly reduce cost.
Fig. 1 is a block scheme of the present invention.
Fig. 2 is that a discrete system single order is crossed sampling ∑ Delta modulator block scheme.
Fig. 3 crosses sampling sigma Delta modulator block scheme for a discrete system single order of realizing with switched-capacitor circuit.
Fig. 4 is a switched-capacitor circuit schematic diagram that can be used to realize a multiplier and first order low frequency filter.
Fig. 5 is a family expenses ammeter block scheme.
Fig. 6 is the analog multiplier block scheme that is used for the family expenses ammeter, crosses the sampling sigma Delta modulator with discrete-time system realization, use single order.
Fig. 7 is for realizing a single-ended switched-capacitor circuit schematic diagram of system shown in Figure 6.
As shown in Figure 1, simulating signal V
vAnd V
1Be two input signals that will be taken advantage of, their frequency span is far smaller than sampling frequency f
aInput simulating signal V
vAt first pass through sampling sigma Delta modulator (1) and converted one-bit digital signal D to
1(D
1=1 ,-1), this one-bit digital signal D
1Again by one one analog multiplier (2) and another analog input signal V
1Multiply each other, the output of an analog multiplier (2) is through simulation low-pass filter (3), and it exports V
OutPromptly be that the multiplier result of product is by reference voltage V
RofVoltage output after the ruleization.
Fig. 2 provides one embodiment of the present of invention, and in Fig. 2, the discrete system single order is crossed the sampling sigma Delta modulator and is made up of sample-and-hold circuit (4), totalizer (5), integrator (6), a quantizer (7), a DAC circuit (8) and delay circuit (9).Input simulating signal V
vAccess the input end of sample holding circuit (4), change into discrete-time signal, f by sample-and-hold circuit
aBe sampled signal.Negative-feedback signal output termination totalizer (5) input end of sample-and-hold circuit (a 4) discrete-time signal output terminal and a clock cycle delay circuit (9), obtain error voltage e (t) output, through integrator (6), deliver to a quantizer (7) and compare again.When e (t)＞0 (input signal is greater than feedback signal), output " 1 " sign indicating number; When e (t)＜0, output "-" sign indicating number.The output one tunnel of a quantizer (7) is as the output signal end of crossing the sigma Delta modulator of taking a sample; A DAC circuit (8) is delivered on another road, forms the D/A converted output signal, it than last output delay a clock period, so represent quantization level on the previous sampling spot.In fact, this system is a feedback system, and wherein, its function of quantizer is that simulating signal is changed into one-bit digital signal (D
1), be+1 or-1.DAC of this position output Digital Signals, a DAC is output as+V
RofOr-V
Rof(V
RofBe reference voltage), it feeds back after the delay of a clock period in the input of ∑ Delta modulator, promptly delivers to totalizer (5), subtracts each other with sampling value again, through integration and relatively judgement, exports a coded signal.Carry out successively, just can finish the modulation of Σ Δ.In the practicality, delay circuit (9) can adopt the d type flip flop circuit.Can prove, as long as input signal amplitude is less than V
Rof, this sigma Delta modulator is stable.Though quantizer is introduced a large amount of quantizing noises, but, because the characteristic of degeneration factor and the integrator that before quantizer, uses, can the analysis showed that theoretically, the energy of the quantizing noise of a quantizer introducing, the overwhelming majority concentrates on high band, and the one-bit digital signal of system output has been represented the input simulating signal exactly, its precision can up to or more than 16 digital signal.
Foregoing circuit can be realized by switched-capacitor circuit shown in Figure 3.As shown in Figure 3, clock signal 1 and 2 is the signal of two non-overlapping copies, is produced by clock-signal generator.The input termination simulating signal V of switch
v, the output termination input sampling capacitor C of switch
1(being the sample-and-hold circuit of Fig. 2), during work, each sample period is divided into two clocks (clock 1 or 2) and moves respectively.Integrator is by operational amplifier A
1With feedback capacity C
AForm operational amplifier A
1Input end play the function of totalizer shown in Figure 2 simultaneously.A quantizer among Fig. 2 is realized with a comparer (10) in Fig. 3, and one digit number analog conversion circuit (i.e. DAC) is by capacitor C
2Wait with corresponding switch and to realize.Here, one-bit digital signal D
1Control capacitance C
2If preceding switch is D
1Be+1, then with the outer clock signal of bracket; If D
1Be-1, then use the clock signal in the bracket.
In Fig. 1, another simulating signal V
1By the one-bit digital signal D of a multiplier with the output of sampling sigma Delta modulator
1Multiply each other.Multiplier here can be realized with multiple circuit, both can be continuous time system, also can be discrete-time system.The output of a multiplier will be crossed the high frequency quantizing noise elimination of introducing in the sampling sigma Delta modulator through a simulation low-pass filter.Except very little some quantizing noises and electronic noise, in this multiplication process, the signal content in the low-frequency range will intactly be kept.
Here, notice simulating signal V
1With one-bit digital signal D
1The multiplier that multiplies each other can be realized and keeps very high degree of accuracy with quite simple circuit.Fig. 4 has shown a fully differential switched-capacitor circuit, is used to realize this multiplier and as input signal V
1Sampling-holding circuit.Among the figure, the fully differential operational amplifier A
1And capacitor C
3～C
6Constitute the first order of low-pass filter; Simultaneously, operational amplifier A
1It also is capacitor C
1And C
2Two virtual ground potential points are provided.Differential output signal V
OutpAnd V
OutnBe the output of this system, if in the practical application as long as an output over the ground, then in this two can directly be omitted.
Analog input signal V
1With one-bit digital signal D
1Multiply each other is to pass through capacitor C
1And C
2And corresponding switch is realized.The procedure declaration that multiplies each other is as follows: when clock signal 1 is in noble potential, and capacitor C
1Charge to V
1, and capacitor C
2Then be discharged to zero potential; When clock signal 2 is in noble potential, if the supplied with digital signal D of 1-bit
1Be noble potential, be stored in capacitor C
1On electric charge will be transferred to capacitor C
3And C
5On, be stored in capacitor C simultaneously
2On electric charge then be transferred to capacitor C
4And C
6On.Transfer to capacitor C
3And C
5On the quantity of electric charge be-C
1* V
i, and transfer to capacitor C
4And C
6On the quantity of electric charge be+C
2* V
iIf 1-bit digital signal D
1Be electronegative potential, situation is then opposite, just transfers to capacitor C
3And C
5On the quantity of electric charge be+C
2* V
1And transfer to capacitor C
4And C
6On electric capacity then be-C
1* V
iLike this, by 1-bit digital signal D
1Determined input simulating signal V
iBe multiply by effectively+1 or-1.
One of potential application of analog multiplier shown in Figure 1 is a family expenses ammeter system.Be in in the ammeter, the measurement of power obtains by line voltage distribution and line current are multiplied each other.Fig. 5 has shown the basic block scheme of a family expenses ammeter.Here, input ac voltage V
vCorresponding to line voltage distribution, and another input ac voltage V
iBy the voltage drop on the known resistance corresponding to line current.Flow into user's instantaneous power and V
i* V
vBe directly proportional.The output of analog multiplier (10) is carried out the voltage/frequency conversion at voltage/frequency change-over circuit (12) behind low-pass filter (11), output pulse string is counted by counter (13).At present, the method that realizes this system discrete component system normally.It is analog multiplier that total system is made in a gordian technique on the special-purpose CMOS integrated circuit, if use analog multiplier described in the invention, use existing C MOS Analogical Circuit Technique, just this system can be made on the CMOS special IC, thereby greatly reduce cost.
Be in in the example application of ammeter, with the corresponding input voltage V of line voltage distribution
vTo comparatively stable, the variation of power mainly is that the variation by line current changes.If with input voltage V
vAs the input of crossing the sigma Delta modulator of taking a sample, then just can be very little with respect to the power of measuring from the quantizing noise of crossing the sigma Delta modulator introducing of taking a sample, the dynamic range of power measurement just can not be crossed the quantizing noise that the sigma Delta modulator of taking a sample introduces and do not limited, only can by in the circuit intrinsic electronic noise and the direct current biasing of circuit limit.And these restrictions are that all electronic circuits are intrinsic, can reduce its influence by selecting suitable circuit design.
Fig. 6 has shown that is used for the analog multiplier family expenses ammeter, that realize with discrete-time system.This system has used single order shown in Figure 2 to cross the sampling sigma Delta modulator.V
vAnd V
1Be two input signals that correspond respectively to line voltage distribution and line current, input signal V
1With D
1Signal is from a multiplier (14) input, and its product is through low-pass filter (15) output, V
OutBe the output of analog multiplier.
System shown in Figure 6 can realize with switched-capacitor circuit at an easy rate that Fig. 7 provides such Circuits System.For simplicity, do not use fully differential switched-capacitor circuit shown in Figure 4 among the figure, and use single-ended switched-capacitor circuit.In Fig. 7, operational amplifier 1, comparer f and capacitor C
1, C
2, C
3And corresponding switch etc. has been formed with the same single order shown in Figure 3 and has been crossed the sampling sigma Delta modulator.Operational amplifier A
2, capacitor C
4, C
5, C
6, C
7Form a multiplier and low-pass filter with corresponding switch etc.A multiplier is by capacitor C
4, C
5Form with corresponding switch, multiplier of its course of work and above-mentioned fully differential is similar, capacitor C
6, C
7And operational amplifier A
2Form low-pass filter, operational amplifier A
2Be capacitor C simultaneously
4And C
5A virtual ground potential point is provided.The electric capacity of electric capacity shown in the figure should be decided according to specifications parameter, supply voltage, the given integrated circuit production technology of ammeter, to reach optimum performance and least cost.Their representative value is: C
1=C
2=C
3=C
4=C
5=C
6=0.5pF, C
7=20pF.Here, the direct current biasing error of noticing operational amplifier can be reduced greatly by using the correlated double sampling technology.
Claims (1)
1. used the analog multiplier of the Σ Δ modulation of taking a sample, and it is characterized in that being provided with
That (1) exports the one-bit digital signal according to will be taken advantage of one input simulating signal, reference voltage and sampling frequency crosses sampling ∑ Delta modulator;
(2) analog multipliers, an input end of an analog multiplier are taken over the one-bit digital signal output part of sampling ∑ Delta modulator, external another input simulating signal that will be taken advantage of of another input end of an analog multiplier;
(3) low-pass filters, the output terminal of an analog multiplier of input termination of low-pass filter, the output terminal of low-pass filter are the result of product signal output part that used the analog multiplier of the ∑ Δ modulation of taking a sample.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN96102375A CN1067778C (en) | 1996-07-31 | 1996-07-31 | Analog multiplier using oversampling segma delta modulator |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN96102375A CN1067778C (en) | 1996-07-31 | 1996-07-31 | Analog multiplier using oversampling segma delta modulator |
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| CN1067778C true CN1067778C (en) | 2001-06-27 |
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| CN101923458B (en) * | 2010-07-30 | 2013-09-18 | 苏州科山微电子科技有限公司 | Decimal divider capable of randomly selecting division rate range |
| CN102158229A (en) * | 2011-03-30 | 2011-08-17 | 上海北京大学微电子研究院 | Offset voltage and charge injection elimination technology for ADC (analog-to-digital converter) |
| CN107544770B (en) * | 2017-09-15 | 2020-06-26 | 中国科学技术大学 | A charge domain analog multiplier-adder circuit with digital-analog mixed input |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5345236A (en) * | 1992-12-21 | 1994-09-06 | Harris Corporation | Improved sigma-delta type analog-to-digital converter and method |
| EP0704980A2 (en) * | 1994-09-30 | 1996-04-03 | Yamaha Corporation | Analog-digital converter using Delta Sigma modulation |
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1996
- 1996-07-31 CN CN96102375A patent/CN1067778C/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5345236A (en) * | 1992-12-21 | 1994-09-06 | Harris Corporation | Improved sigma-delta type analog-to-digital converter and method |
| EP0704980A2 (en) * | 1994-09-30 | 1996-04-03 | Yamaha Corporation | Analog-digital converter using Delta Sigma modulation |
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