CN106777620A - A kind of neutral net space reflection modeling method for power transistor - Google Patents
A kind of neutral net space reflection modeling method for power transistor Download PDFInfo
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Abstract
The invention belongs to microwave circuits and devices modeling field, there is provided a kind of neutral net space reflection modeling method for power transistor.The method separately processes the direct current signal and AC signal in the input/output signal of power crystal tube model, and the DC characteristic of power crystal tube model is adjusted with output mapping network, and the AC characteristic of power crystal tube model is adjusted with input mapping network.The method inherits the advantage of existing neutral net space mapping method, reduce parameter and model performance is interfered, it is to avoid adjusting and optimizing parameter repeatedly, shortens modeling period.
Description
Technical field
Built in microwave the present invention relates to microwave circuits and devices modeling field, more particularly to neutral net Method with Space Mapping Technique
The application in mould field.
Background technology
In the last few years, to produce, precision was higher and the faster electronic product of speed, new technology, new material, new construction
Electronic device is continued to bring out.With the growth of circuit structure complexity, the reduction and the shortening in design time cycle of design error,
Designer often carries out circuit simulation and checking by CAD, causes designer to be increasingly dependent on precision
High, fireballing device model.Semiconductor device model is the main factor for influenceing circuit design precision, and circuit scale is got over
Greatly, index and frequency range are higher, also higher to device model requirement.The device model in microwave radio field can not only describe microwave
The behavioral trait of device, also to accurately reflect device with physics it is different with geometric parameter and trigger characteristic changing.Although having deposited
Modeling technique comparative maturity, it is adaptable to most existing products, however it is necessary that being built to circuit or system containing new device
During mould, existing modeling method is tended not to while reaching that model accuracy is high and the fast requirement of simulation velocity.
Device modeling method research has become the important developing direction in microwave designing field.At present, microwave radio circuit
Modeling method mainly include three kinds：Equivalent-circuit model, physical model and neural network model.Correlative study is proved existing
Modeling method there is certain application limitation.
Limitation 1：Equivalent-circuit model is the model built according to the characteristic electron electronic component of transistor, and the model can
To build one group of nonlinear equation of associated terminal voltage and current, but need constantly to adjust Model Parameter in modeling process
Value, parameter directly influences each other to model performance, therefore needs to take a substantial amount of time and the energy suitable parameter value of acquisition.With
Device applying frequency is raised, and existing equivalent-circuit model distortion phenomenon often occurs in high frequency simulated environment.
Limitation 2：Physical model is to carry out Electromagnetic Simulation based on device physicses information, is capable of the mould of accurate outlines device performance
Type, but this method needs more very unobtainable parameter information, builds, and electromagnetism very big with prototype part identical constructive difficulty
Calculating needs powerful computer resource, when physics during modelling and geometric parameter are adjusted repeatedly, this problem
It is especially prominent.
Limitation 3：Neural network model is the data by automatic training process learning station/circuit, the nerve for training
Network model can carry out the emulation and design of circuit/system instead of initial devices.Neural network model after training not only runs
Speed is fast, high precision, additionally it is possible to accurately reflect the non-linear relation of device input and output.Existing Artificial Neural Network Structures
Be the DC characteristic and AC characteristic with neutral net control device simultaneously, this neural network structure can be caused complicated, it is necessary to
Substantial amounts of weight parameter, increased model training difficulty.
It is therefore an object of the present invention to pass through to propose a kind of neutral net space reflection modeling suitable for power transistor
Method, reduces the quantity of data needed for training, reduces the complexity of neural network topology structure.
The content of the invention
The purpose of the present invention is the above-mentioned deficiency for overcoming prior art, proposes a kind of neutral net for power transistor
Space reflection modeling method.The method is by the direct current signal and AC signal in the input/output signal of power crystal tube model
Separately treatment, the DC characteristic of power crystal tube model is adjusted with output mapping network, and it is brilliant to adjust power with input mapping network
The AC characteristic of body tube model.
A kind of neutral net space reflection modeling method for power transistor, comprises the following steps：
Step 1：By power transistor mode input Signal separator, the defeated of power crystal tube grid and drain electrode end will be loaded into
Enter voltage signal and be designated as [vgf, vdf]T, direct current signal [v is obtained by signal separation modulegf.dc, vdf.dc]TAnd AC signal
[vgf.ac, vdf.ac]T；
Step 2：Model output signal is merged, the flip-flop before merging in current signal is designated as [igf.dc, idf.dc
]T, alternating component is designated as [igc.ac, idc.ac]T, model grid and drain electrode end output current signal are obtained by signal pooled model
[igf, idf]T；
Step 3：Unitization by mapping network is exported in model, the parameter in adjustment output mapping network makes output signal
[igf.dc, idf.dc]TIt is equal with input current signal, so as to ensure that model becomes model DC performance because introducing mapping network
Difference, i.e.,：
[igf.dc, idf.dc]T=[igc.dc, idc.dc]T (1)
Step 4：The DC characteristic of power crystal tube model, the DC characteristic of power transistor are adjusted with output mapping network
Only controlled by DC offset voltage, therefore can be ignored for adjusting the input mapping network of AC signal.Used in the step
The DC data of measurement or emulation obtains model accurate straight model training, the parameter value in adjustment output mapping network
Properties of flow；
Step 5：Unitization by mapping network is input into model, the parameter in adjustment input mapping network maps input
Network output signal [vgc.dc, vdc.dc]TIt is equal with input voltage signal, so as to ensure that model does not make model because introducing mapping network
Exchange degradation, i.e.,：
[vgc.dc, vdc.dc]T=[vgf.dc, vdf.dc]T (2)
Step 6：The AC characteristic of power crystal tube model is adjusted with input mapping network, in this step with measurement or imitative
When really exchanging data training pattern, the parameter value of fixed output mapping network makes in input mapping network parameter adjustment not shadow
The DC characteristic of model is rung, and improves the AC characteristic of model；
Step 7：Input mapping network in model and output mapping network parameter are finely tuned, model essence is further improved
Degree, makes the DC characteristic of model and AC characteristic identical with measurement or simulated power transistor performance.
Input mapping network and output mapping network in power crystal tube model proposed by the present invention is using three layers of sense
Know that device neural network structure is realized, its expression formula is
Wherein y is the output variable of neutral net, and x is the input variable of neutral net, and i represents that i-th of neutral net is hidden
Containing neuron, j and k represents j-th input neuron and k-th output neuron respectively, and n and m represents that neutral net is defeated respectively
Enter the total number of variable and output variable.Excitation function uses sigmoid functions, and formula is σ (γ)=1/ (1+e-γ)。
In step 4 of the present invention, the output mapping network formula after training is
(igf.dc, idf.dc)=fANN(vgf.dc, vdf.dc, igc.dc, idc.dc, w1) (4)
Wherein fANNRepresent neutral net mapping relations, w1Represent neutral net inside weight.
In step 6 of the present invention, the output mapping network formula after training is
(vgc.ac, vdc.ac)=hANN(vgf.ac, vdf.ac, w2) (5)
Wherein hANNRepresent neutral net mapping relations, w2Represent neutral net inside weight.
Neutral net space reflection modeling method proposed by the present invention does not need power transistor internal structural information not only,
And neural network structure is simple, the output of Optimal Parameters independent control model different qualities, model DC characteristic and AC characteristic
Between be independent of each other, reduce iterations, shorten modeling period.
Brief description of the drawings
Fig. 1 is structured flowchart of the present invention；
Fig. 2 is to power transistor modeling procedure figure according to the embodiment of the present invention.
Fig. 3 is the sample data and model output characteristic curve of the embodiment of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to implementation of the invention
Example is described in detail.
As shown in Fig. 2 in a kind of neutral net space reflection modeling method for power transistor of the invention, first having to
Obtain the sample data for model training.Direct current input sample data are input voltages, are designated as [vgf, vdf]T；Direct current output sample
Notebook data is output current, is designated as [idf].Exchange input sample data are input voltage and frequency, are designated as [vgf, vdf, freq
]T；Exchange output sample data is S parameter, is designated as [S11, S12, S21, S22]T.Sample data can by actual measurement device or
Person simulation software is obtained.
Neural network structure as shown in Figure 1 is built, output mapping network structure is set.Output mapping network uses 3 layers
Perceptron structure, input signal is [vgf.dc, vdf.dc, igc.dc, idc.dc]T, output signal is with [igf.dc, idf.dc]T.To ensure
Loading output mapping network does not reduce the DC characteristic of roughcast type, output mapping network is carried out unitization.Adjustment output mapping
Weighted value in network, makes [igf.dc, idf.dc] w=[igc.dc, idc.dc]T, wherein [igc.dc, idc.dc]TTravel through whole working field.
Because the input mapping network in the present invention is used for the adjustment to AC signal, input mapping network does not influence the direct current of model special
Property, therefore input mapping network parameter value wouldn't be discussed, input mapping network can use 3 layers of perceptron knot of any output of 2 input 2
Structure is realized.
With direct current sample data to the model training in Fig. 1, the weighted value in adjustment output mapping network makes the defeated of model
Go out electric current idfError between sample data constantly reduces.If test error is unsatisfactory for required precision, continue with training number
According to training or adjustment output mapping network structure, change the number of hidden layer neuron, re -training.If test error meets
Required precision, then carry out model AC characteristic adjustment.
Neural network structure as shown in Figure 1 is built, input mapping network structure is reset.Input mapping network is used
3 layers of perceptron structure, input signal is [vgf.dc, vdf.dc]T, output signal is with [vgc.dc, vdc.dc]T.To ensure loading input
Mapping network does not reduce the AC characteristic of roughcast type, input mapping network is carried out unitization.In adjustment output mapping network
Weighted value, makes [vgc.dc, vdc.dc]T=[vgf.dc, vdf.dc]T, wherein [vgf.dc, vdf.dc]TTravel through whole working field.Now, to keep away
Exempt from power transistor operating point change during training, reduce the DC characteristic of model, the weighted value exported in mapping network need to be consolidated
It is fixed.
Model in Fig. 1 is put into S parameter simulated environment, and it is trained with exchange sample data, adjustment input is reflected
The weighted value penetrated in network, makes the exchange of model export [S11, S12, S21, S22]TError between sample data constantly reduces.
If test error is unsatisfactory for required precision, continuation is trained or adjustment input mapping network structure with training data, changed hidden
Number containing layer neuron, re -training.If test error meets required precision, model is verified, if model is straight
Properties of flow and AC characteristic precision meet requirement simultaneously, then deconditioning, otherwise to input mapping network and output mapping network
In parameter value be finely adjusted, until meet require.
Fig. 3 is to set up model output characteristic curve using modeling method of the present invention to compare figure with sample data, it can be seen that
The curve of output of model is consistent with sample data.
Claims (4)
1. a kind of neutral net space reflection modeling method for power transistor, comprises the following steps：
Step 1：By power transistor mode input Signal separator, the input electricity of power crystal tube grid and drain electrode end will be loaded into
Pressure signal is designated as [vgf, vdf]T, direct current signal [v is obtained by signal separation modulegf.dc, vdf.dc]TWith AC signal [vgf.ac,
vdf.ac]T；
Step 2：Model output signal is merged, the flip-flop before merging in current signal is designated as [igf.dc, idf.dc]T, hand over
Stream composition is designated as [igc.ac, idc.ac]T, model grid and drain electrode end output current signal [i are obtained by signal pooled modelgf,
idf]T；
Step 3：Unitization by mapping network is exported in model, the parameter in adjustment output mapping network makes output signal
[igf.dc, idf.dc]TIt is equal with input current signal, so as to ensure that model becomes model DC performance because introducing mapping network
Difference, i.e.,：
[igf.dc, idf.dc]T=[igc.dc, idc.dc]T (1)
Step 4：The DC characteristic of power crystal tube model is adjusted with output mapping network, the DC characteristic of power transistor is only received
To the control of DC offset voltage, therefore can ignore for adjusting the input mapping network of AC signal, with measurement in the step
Or the DC data of emulation, to model training, the parameter value in adjustment output mapping network makes model obtain accurate direct current special
Property；
Step 5：Unitization by mapping network is input into model, the parameter in adjustment input mapping network makes input mapping network
Output signal [vgc.dc, vdc.dc]TIt is equal with input voltage signal, so as to ensure that model exchanges model because introducing mapping network
Degradation, i.e.,：
[vgc.dc, vdc.dc]T=[vgf.dc, vdf.dc]T (2)
Step 6：The AC characteristic of power crystal tube model is adjusted with input mapping network, uses what is measured or emulate in this step
During exchange data training pattern, the parameter value of fixed output mapping network, parameter adjustment does not influence mould in making input mapping network
The DC characteristic of type, and improve the AC characteristic of model；
Step 7：Input mapping network in model and output mapping network parameter are finely tuned, model accuracy is further improved,
Make the DC characteristic of model and AC characteristic identical with measurement or simulated power transistor performance.
2. a kind of neutral net space reflection modeling method for power transistor according to claim 1, its feature
It is that the input mapping network in model and output mapping network are realized using three layer perceptron neural network structure, its table
It is up to formula
Wherein y is the output variable of neutral net, and x is the input variable of neutral net, and i represents i-th implicit god of neutral net
Through unit, j and k represents j-th input neuron and k-th output neuron respectively, and n and m represents that neutral net input becomes respectively
The total number of amount and output variable；Excitation function uses sigmoid functions, and formula is σ (γ)=1/ (1+e-γ)。
3. a kind of neutral net space reflection modeling method for power transistor according to claim 1, its feature
It is that in step 4, the output mapping network formula after training is
(igf.dc, idf.dc)=fANN(vgf.dc, vdf.dc, igc.dc, idc.dc, w1) (4)
Wherein fANNRepresent neutral net mapping relations, w1Represent neutral net inside weight.
4. a kind of neutral net space reflection modeling method for power transistor according to claim 1, its feature
It is that in step 6, the input mapping network formula after training is
(vgc.ac, vdc.ac)=hANN(vgf.ac, vdf.ac, w2) (5)
Wherein hANNRepresent neutral net mapping relations, w2Represent neutral net inside weight.
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Cited By (7)
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| CN107194127A (en) * | 2017-06-30 | 2017-09-22 | 苏州芯智瑞微电子有限公司 | A kind of transistor modeling method based on burst pulse weak-signal measurement |
| CN107748809A (en) * | 2017-09-20 | 2018-03-02 | 苏州芯智瑞微电子有限公司 | A kind of semiconductor devices modeling method based on nerual network technique |
| CN109241622A (en) * | 2018-09-06 | 2019-01-18 | 天津工业大学 | A kind of neural network modeling approach based on small signal knowledge type packaged transistor |
| CN109791627A (en) * | 2018-06-19 | 2019-05-21 | 香港应用科技研究院有限公司 | Using input pretreatment and switch target for training the semiconductor devices of deep neural network to model |
| WO2019241937A1 (en) * | 2018-06-19 | 2019-12-26 | Hong Kong Applied Science and Technology Research Institute Company Limited | Semiconductor device modeling using input pre-processing and transformed targets for training a deep neural network |
| CN111695230A (en) * | 2019-12-31 | 2020-09-22 | 天津工业大学 | Neural network space mapping multi-physics modeling method for microwave passive device |
| CN111695296A (en) * | 2020-06-03 | 2020-09-22 | 天津工业大学 | Novel neural network space mapping modeling method suitable for HBT (heterojunction bipolar transistor) |
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Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107194127A (en) * | 2017-06-30 | 2017-09-22 | 苏州芯智瑞微电子有限公司 | A kind of transistor modeling method based on burst pulse weak-signal measurement |
| CN107748809A (en) * | 2017-09-20 | 2018-03-02 | 苏州芯智瑞微电子有限公司 | A kind of semiconductor devices modeling method based on nerual network technique |
| CN107748809B (en) * | 2017-09-20 | 2021-01-26 | 苏州芯智瑞微电子有限公司 | Semiconductor device modeling method based on neural network technology |
| CN109791627A (en) * | 2018-06-19 | 2019-05-21 | 香港应用科技研究院有限公司 | Using input pretreatment and switch target for training the semiconductor devices of deep neural network to model |
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| US11176447B2 (en) | 2018-06-19 | 2021-11-16 | Hong Kong Applied Science and Technology Research Institute Company Limited | Semiconductor device modeling using input pre-processing and transformed targets for training a deep neural network |
| CN109791627B (en) * | 2018-06-19 | 2022-10-21 | 香港应用科技研究院有限公司 | Semiconductor device modeling for training deep neural networks using input preprocessing and conversion targets |
| CN109241622A (en) * | 2018-09-06 | 2019-01-18 | 天津工业大学 | A kind of neural network modeling approach based on small signal knowledge type packaged transistor |
| CN111695230A (en) * | 2019-12-31 | 2020-09-22 | 天津工业大学 | Neural network space mapping multi-physics modeling method for microwave passive device |
| CN111695230B (en) * | 2019-12-31 | 2023-05-02 | 天津工业大学 | Neural network space mapping multi-physical modeling method for microwave passive device |
| CN111695296A (en) * | 2020-06-03 | 2020-09-22 | 天津工业大学 | Novel neural network space mapping modeling method suitable for HBT (heterojunction bipolar transistor) |
| CN111695296B (en) * | 2020-06-03 | 2023-04-18 | 天津工业大学 | Novel neural network space mapping modeling method suitable for HBT (heterojunction bipolar transistor) |
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