CN106710518A - LED display and display control circuit thereof - Google Patents
LED display and display control circuit thereof Download PDFInfo
- Publication number
- CN106710518A CN106710518A CN201611112170.4A CN201611112170A CN106710518A CN 106710518 A CN106710518 A CN 106710518A CN 201611112170 A CN201611112170 A CN 201611112170A CN 106710518 A CN106710518 A CN 106710518A
- Authority
- CN
- China
- Prior art keywords
- row
- input
- signal
- phase inverter
- scan control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims abstract description 92
- 238000006243 chemical reaction Methods 0.000 claims description 25
- 230000002459 sustained effect Effects 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 16
- 230000000630 rising effect Effects 0.000 claims description 14
- 230000005611 electricity Effects 0.000 claims description 10
- 230000002045 lasting effect Effects 0.000 claims description 2
- 230000003071 parasitic effect Effects 0.000 description 18
- 238000010586 diagram Methods 0.000 description 9
- 239000003990 capacitor Substances 0.000 description 8
- 102100029469 WD repeat and HMG-box DNA-binding protein 1 Human genes 0.000 description 6
- 101710097421 WD repeat and HMG-box DNA-binding protein 1 Proteins 0.000 description 6
- 210000001367 artery Anatomy 0.000 description 3
- 230000008030 elimination Effects 0.000 description 3
- 238000003379 elimination reaction Methods 0.000 description 3
- 230000002035 prolonged effect Effects 0.000 description 3
- 210000003462 vein Anatomy 0.000 description 3
- 239000000203 mixture Substances 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 241000406668 Loxodonta cyclotis Species 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
The invention belongs to the technical field of LED display, and provides an LED display and a display control circuit thereof. According to the LED display control circuit composed of multiple row scanning control chips, multiple column scanning control chips, an LED display array and multiple blanking signal generation modules, the row scanning control chips generate multiple row scanning control signals according to multiple driving signals to gate row channels corresponding to the row scanning control signals in the LED display array, and the blanking signal generation modules generate blanking signals according to the row scanning control signals to blank row channels corresponding to the blanking signals in the LED display array, wherein the row scanning control signals have narrow pulses. Therefore, the problem that the existing LED display is blanked incompletely due to timing sequence is solved.
Description
Technical field
The invention belongs to technical field of LED display, more particularly to a kind of LED display and its display control circuit.
Background technology
Have that brightness is high, operating voltage is low due to LED display, small power consumption, maximization, long lifespan, impact resistance and performance
Stabilization the advantages of, LED display is used widely, for example apply stadiums, business application, bank, card Securities, postal service,
Harbour, market, station, postal service, telecommunication, office, monitoring, school, dining room, hotel, amusement, etc. different outdoor locations advertisement a surname
Pass etc..
In general, LED display is entered by multiple 8 road row scanning control chips and multiple 16 row passage current constant control chips
Row LED display controls, and because the parasitic capacitance on passage be can not ignore, and LED display ghost phenomena is easily caused, because
This, blanking function is increased in each row scanning control chip, to eliminate the ghost phenomena of LED display, but because sequential
Problem, narrow pulse signal is easily produced in the row scan control signal of row scanning control chip output, and the narrow pulse signal is easy
Cause LED display that the incomplete problem of blanking occurs.
In sum, existing LED display is present causes LED display to produce blanking incomplete because of sequence problem
Problem.
The content of the invention
It is an object of the invention to provide a kind of LED display and its display control circuit, it is intended to existing LED display
There are problems that causing LED display to produce blanking incomplete because of sequence problem.
The present invention is achieved in that a kind of LED display control circuits, including multiple row scanning control chips, Duo Gelie
Scanning control chip and LED array of display, each described row scanning control chip have multiple inputs and multiple output ends,
Multiple inputs are used to receive multiple drive signals, and multiple output ends are led to multiple rows of the LED array of display
Road connects one to one, for exporting row scan control signal to the LED array of display, each described column scan control chip
For exporting column scan control signal to the LED array of display, the LED display control circuits also include multiple blanking signals
Generation module；
The input of multiple blanking signal generation modules and multiple output ends of each row scanning control chip
Connect one to one, the output end of multiple blanking signal generation modules and multiple row of channels one of the LED array of display
One correspondence connection；
The row scanning control chip generates multiple row scan control signals according to multiple drive signals, and will be described
Row scan control signal is exported to the LED array of display, is believed with the row scan control with gating in the LED array of display
Number corresponding row of channels；Wherein, the row scan control signal has burst pulse；The row scanning control chip will be described simultaneously
Row scan control signal is exported to the blanking signal generation module, and the blanking signal generation module is scanned according to the row to be controlled
Signal generation horizontal blanking signal processed, disappears with to row of channels corresponding with the horizontal blanking signal in the LED array of display
Hidden treatment；
Wherein, in the rising edge time of the burst pulse, the horizontal blanking signal is changed into high level from low level, and described
High level is sustained for longer than the pulse width of the burst pulse；Or at the trailing edge moment of the burst pulse, the row
Blanking signal is changed into low level from high level, and the low level is sustained for longer than the pulse width of the burst pulse；Or
In the rising edge time of the burst pulse, the horizontal blanking signal is changed into low level to person from high level, and the low level continues
Time more than the burst pulse pulse width；Or at the trailing edge moment of the burst pulse, the horizontal blanking signal by
Low level is changed into high level, and the high level is sustained for longer than the pulse width of the burst pulse.
A further object of the present invention also resides in a kind of LED display of offer, and the LED display is aobvious including above-mentioned LED
Display screen controls circuit.
In the present invention, include that multiple row scanning control chips, multiple column scan control chips, LED show by use
The LED display control circuits of array and multiple blanking signal generation modules so that row scanning control chip drives according to multiple
Signal generation multiple row scan control signal, and row scan control signal is exported to LED array of display, shown with gating LED
Row of channels corresponding with row scan control signal in array；Wherein, row scan control signal has burst pulse；The control of row scanning simultaneously
Coremaking piece exports to blanking signal generation module row scan control signal, and blanking signal generation module is believed according to row scan control
Number generation horizontal blanking signal, carry out elimination of hidden with to row of channels corresponding with horizontal blanking signal in LED array of display；Wherein,
In the rising edge time of burst pulse, horizontal blanking signal is changed into high level from low level, and high level is sustained for longer than narrow arteries and veins
The pulse width of punching；Or at the trailing edge moment of burst pulse, horizontal blanking signal is changed into low level from high level, and low level is held
Pulse width of the continuous time more than burst pulse；Or in the rising edge time of the burst pulse, the horizontal blanking signal is by height
Level is changed into low level, and the low level is sustained for longer than the pulse width of the burst pulse；Or in the narrow arteries and veins
The trailing edge moment of punching, the horizontal blanking signal is changed into high level from low level, and the high level is sustained for longer than institute
The pulse width of burst pulse is stated, so that when row scan control signal produces burst pulse, blanking signal generation module can be with
Produce horizontal blanking signal carries out horizontal blanking treatment to the ghost produced by the narrow pulse signal so that be chosen in LED array of display
Logical row of channels will not produce ghost phenomena, aobvious in the presence of LED is caused because of sequence problem so as to solve existing LED display
Display screen produces the incomplete problem of blanking.
Brief description of the drawings
Fig. 1 is each control signal schematic diagram of existing LED display；
Fig. 2 is existing LED display control circuit diagram；
Fig. 3 is that existing LED display the sequential principle schematic of ghost phenomena occurs；
Fig. 4 is the modular structure schematic diagram of the LED display control circuits that one embodiment of the invention is provided；
Fig. 5 is the module knot of blanking signal generation module in the LED display control circuits that one embodiment of the invention is provided
Structure schematic diagram；
Fig. 6 is the electrical block diagram of delay unit in blanking signal generation module shown in Fig. 5；
Fig. 7 is another electrical block diagram of delay unit in blanking signal generation module shown in Fig. 5；
Fig. 8 is the another electrical block diagram of delay unit in blanking signal generation module shown in Fig. 5；
Fig. 9 is the sequential principle schematic of the LED display control circuits that one embodiment of the invention is provided；
Figure 10 is the module of blanking signal generation module in the LED display control circuits that another embodiment of the present invention is provided
Structural representation；
Figure 11 is the electrical block diagram of blanking signal generation module in LED display control circuits shown in Figure 10；
Figure 12 is the sequential principle schematic of the LED display control circuits that another embodiment of the present invention is provided；
Figure 13 is the sequential principle schematic of the LED display control circuits that further embodiment of this invention is provided.
Specific embodiment
In order to make the purpose , technical scheme and advantage of the present invention be clearer, it is right below in conjunction with drawings and Examples
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
Generally, the main cause of the LED display generation incomplete problem of blanking is caused because of sequence problem is：Row scanning
The chip selection signal of control chip lags behind the row scan control signal of row scanning control chip output, and then causes row scan control
There is narrow pulse signal in signal, if the width of the narrow pulse signal is less than the pulsewidth of blanking signal, blanking effect will not be produced
It is raw, and this narrow pulse signal so that parasitic capacitance is high level, and then can cause LED to the parasitic capacitance charging on passage
There is ghost phenomena in display screen.
Further, as shown in figure 1, for 8 road row scanning control chips, its have multiple input control signals S0, S1,
S2, ENH and ENL.Wherein, input control signal ENH and ENL is that controlled output is enabled or shielded, i.e. chip selection signal CEB is
Produced according to input control signal ENH and ENL, when chip selection signal CEB is high level, then 8 road row scanning control chips
Output is shielded, and when chip selection signal CEB is low level, then 8 road rows sweep the output enable of control chip；Input control signal
S0, S1, S2 are the input control signal of 8 road row scanning control chips, for sequentially opening 8 passages, i.e. 8 road row scan controls
Signal P1-P8 is exported according to input control signal S0, S1, S2, and blanking signal B1-B8 is 8 road row scan controls letters
Number P1-P8 via the shadow pulse generator generation that disappears, therefore, only when input control signal S0, S1, S2, ENH and ENL are same
When reach chip port when, the blanking function of chip just can be with normal work.But as PCB layout, front-end control chip are defeated
The factor such as go out to cause input control signal S0, S1, postpone different between S2, ENH and ENL, and then cause 8 road row scan controls
The chip selection signal CEB of chip lags behind the output signal of 8 road row scanning control chips, so as to cause LED display blanking not complete
Entirely, i.e. the ghost phenomena of LED display is still present.
There is ghost below according to the LED display shown in the LED display control circuits schematic diagram and Fig. 3 shown in Fig. 2 to show
The sequential principle schematic of elephant, to LED display because the principle that ghost occurs in sequence problem elaborates：
First, it is notable that the LED display control circuits shown in Fig. 2, the LED display and shown in Fig. 3 occurs
The sequential principle schematic of ghost phenomena is illustrated by taking 4 road signals in 8 road row scanning control chips as an example.
As shown in Fig. 2 P1, P2, P3 and P4 are row scan control signal, low level is enabled；B1, B2, B3 and B4 are
Row of channels blanking signal, high level is enabled；N1, N2, N3 and N4 are row channel control signals, and high level is enabled；C1、C2、C3
And C4 is row of channels parasitic capacitance.
Further, Fig. 2 and Fig. 3 is please also refer to, as shown in Figures 2 and 3, due to the row scanning of P1, P2, P3 and P4
Control signal is enabled only in low level, and the row channel control signals of N1, N2, N3 and N4 are enabled only in high level,
And only when chip selection signal CEB is low level, the row scan control signal of P1, P2, P3 and P4 is just effective, therefore, normally
In the case of, within the period of time 1, the LED of the row of the 1st row the 4th of the LED array of display in LED display control circuit is luminous,
The LED of the row of the 2nd row the 1st lights, the LED of the row of the 3rd row the 2nd are luminous and the row of the 4th row the 3rd LED light；In the period of time 2
Interior, the LED of the row of 4 row 4 in LED array of display in LED display control circuit does not light；Within the period of time 3,
1st row LED of the LED array of display in LED display control circuit does not light, the LED of the row of the 2nd row the 2nd is luminous, the 3rd row
The LED of the 3rd row lights and the LED of the row of the 4th row the 4th lights.
However, when chip selection signal CEB occurs more late than row scan control signal P1 in sequential, then being tied in chip selection signal CEB
Shu Qian, row scan control signal P1 can produce a burst pulse P11, therefore, within the period of time 1, row scan control signal
P1 charges to the channel capacitor C1 of the 1st row in LED array of display, so that channel capacitor C1 is changed into high level, and then in row passage
Cause that the LED of the row of the 1st row the 4th in LED array of display lights in the presence of control signal, the scan control signal P1 that is expert at is by low
When level is changed into high level, the channel capacitor C1 electric discharges of the 1st row in blanking signal B1 control LED array of display so that passage electricity
Hold C1 and low level is changed into from high level；Within the period of time 2, due to the presence of the burst pulse P11 of row scan control signal P1,
Channel capacitor C1 is charged to high level again；Within the period of time 3, when the scan control signal P1 that is expert at is low level, lead to
Road electric capacity C1 is persistently electrically charged, although and be expert at scan control signal P1 for high level when, its no longer to channel capacitor C1 charge,
And the reason for channel capacitor C1 is because of blanking signal B1 starts electric discharge, but due to the burst pulse of row scan control signal P1
The presence of P11 so that channel capacitor C1 keeps certain high level, and then causes the row of the 1st row the 2nd and the 2nd of LED array of display
LED during row the 3rd is arranged lights, and ghost occurs so as to cause LED display.
It is worth noting that, when row scan control signal P1 can produce a burst pulse P11, P11 is only right for the burst pulse
The luminous situation of the 1st row in LED array of display produces influence, and the luminous situation of other rows is unaffected, therefore, it is right herein
The luminous situation of other rows is repeated no more；Additionally, it is above-mentioned be only with row scan control signal P1 produce narrow pulse signal P11 when be
Example, occurs the incomplete problem of blanking to existing LED display and has been described in detail, and works as row scan control signal P1-
Any one row scan control signal in P8 produces narrow pulse signal, or row scan control signal P1-P8 any twos, three
When individual, four or whole row scan control signal produce narrow pulse signal, LED display occur the incomplete principle of blanking with
It is identical that row scan control signal P1 produces narrow pulse signal P11 to cause LED display the incomplete principle of blanking occur, therefore this
Place repeats no more.
Realization of the invention is described in detail below in conjunction with specific accompanying drawing：
Fig. 4 shows the modular structure of the LED display control circuits that one embodiment of the invention is provided, for the ease of saying
It is bright, the part related to the embodiment of the present invention is illustrate only, details are as follows：
As shown in figure 4, the LED display control circuits 10 that the embodiment of the present invention is provided include multiple row scanning control chips
100 (one is only shown in figure), multiple column scan control chip 101 (one is only shown in figure) and LED array of display 102.
Wherein, each row scanning control chip 100 has multiple inputs and multiple output ends, and multiple inputs are used to receive multiple drives
Dynamic signal, multiple output ends connect one to one with the row of channels of LED array of display 102, for exporting row scan control signal
To LED array of display 102, to gate corresponding row of channels in LED array of display 102, each column scan control chip 101 is used for
Output column scan control signal to LED array of display 102, to gate corresponding row passage in LED array of display 102.
Further, the LED display control circuits 10 that the embodiment of the present invention is provided also include that multiple blanking signals are produced
Module 103.
Wherein, the input of multiple blanking signal generation modules 103 is exported with the multiple of each row scanning control chip 100
End connects one to one, the output end of multiple blanking signal generation modules 103 and multiple row of channels one of LED array of display 102
One correspondence connection.
Specifically, row scanning control chip 100 generates multiple row scan control signals according to multiple drive signals, and will row
Scan control signal is exported to LED array of display 102, corresponding with row scan control signal in LED array of display 102 to gate
Row of channels；Wherein, row scan control signal has burst pulse；Row scanning control chip 100 is defeated by row scan control signal simultaneously
Go out to blanking signal generation module 103, blanking signal generation module 103 generates horizontal blanking signal according to row scan control signal,
Elimination of hidden is carried out with to row of channels corresponding with horizontal blanking signal in LED array of display 102；Wherein, in the rising of burst pulse
Along the moment, horizontal blanking signal is changed into high level from low level, and high level is sustained for longer than the pulse width of burst pulse；Or
At the trailing edge moment of burst pulse, horizontal blanking signal is changed into low level to person from high level, and low level be sustained for longer than it is narrow
The pulse width of pulse；Or in the rising edge time of the burst pulse, the horizontal blanking signal is changed into low level from high level,
And the low level is sustained for longer than the pulse width of the burst pulse；Or at the trailing edge moment of the burst pulse,
The horizontal blanking signal is changed into high level from low level, and the high level be sustained for longer than the burst pulse pulse it is wide
Degree.
It should be noted that in embodiments of the present invention, in the rising edge time of burst pulse, horizontal blanking signal is by low level
It is changed into high level, and high level is sustained for longer than the pulse width of burst pulse and refers specifically to：When row scan control signal
In the rising edge of narrow pulse signal when arriving, mutually in the same time, horizontal blanking signal produces one section of pulse width to be more than burst pulse
The high level of width, i.e., and then horizontal blanking signal produces one section of effectively high level after burst pulse；Under burst pulse
Along the moment, horizontal blanking signal is changed into low level to drop from high level, and low level is sustained for longer than the pulse width of burst pulse
Refer specifically to：When the trailing edge of the narrow pulse signal in row scan control signal arrives, in phase in the same time, horizontal blanking signal
Produce one section of pulse width more than the low level of narrow pulse width, i.e., and then horizontal blanking signal produces one section after burst pulse
Effectively low level.
And in the rising edge time of burst pulse, horizontal blanking signal is changed into low level from high level, and low level it is lasting when
Between referred to more than the pulse width of burst pulse：When the rising edge of the narrow pulse signal in row scan control signal arrives,
Mutually in the same time, horizontal blanking signal produces one section of pulse width to be more than the low level of narrow pulse width, i.e., after burst pulse immediately
Horizontal blanking signal and produce one section of effectively low level；At the trailing edge moment of burst pulse, horizontal blanking signal is changed into from low level
High level, and high level is sustained for longer than the pulse width of burst pulse and refers to：When the narrow arteries and veins in row scan control signal
When the trailing edge for rushing signal arrives, in phase in the same time, horizontal blanking signal produces one section of pulse width more than the height of narrow pulse width
Level, i.e., and then horizontal blanking signal produces one section of effectively high level after burst pulse.
Additionally, in embodiments of the present invention, row scanning control chip 100 is made up of three or eight decoders, at once scan control
Chip 100 has three signal input parts and eight signal output parts, and three signal input parts are for receiving front-end circuit (in figure
It is not shown) input signal S0, S1 of output and S2, eight output ends are used to export eight road row scan control signals, in this hair
In bright embodiment, row scan control signal is only illustrated by taking P1-P4 as an example.
Each column scan control chip 101 exports multiple column scan control signals (four, i.e. N1-N4 are illustrate only in figure)
To LED array of display 102, so that LED array of display 20 gates corresponding row passage according to column scan control signal, it is preferred that
Column scan control chip 101 in the embodiment of the present invention is 16 passage current constant control chips, and only shows that 4 passages carry out phase in figure
Speak on somebody's behalf bright；LED array of display 102 is by multiple switch element (in figure by taking 8 switch element M1-M8 as an example), the hair of multiple lines and multiple rows
Light diode array (being arranged in the case of 4 rows 4 in figure) and multiple row of channels parasitic capacitances (are with 4 channel capacitor C1-C4 in figure
Example).
It should be noted that in embodiments of the present invention, first switch element M1, the 3rd switch element M3, the 5th switch
Element M5 and the 7th switch element M7 are PMOS, and second switch element M2, the 4th switch element M4, the 6th switch are first
Part M6 and the 8th switch element M8 are NMOS tube；Certainly it will be appreciated by persons skilled in the art that in other embodiment
In, first switch element M1, the 3rd switch element M3, the 5th switch element M5 and the 7th switch element M7 can also be
NMOS tube, and second switch element M2, the 4th switch element M4, the 6th switch element M6 and the 8th switch element M8 are
PMOS；Additionally, the switch element M8 of first switch element M1 to the 8th are NMOS tube；Or first switch element M1 to the 8th
Switch element M8 is PMOS.
It is worth noting that, when first switch element M1, the 3rd switch element M3, the 5th switch element M5 and the 7th are opened
Close element M7 and be PMOS, and second switch element M2, the 4th switch element M4, the 6th switch element M6 and the 8th switch
When element M8 is NMOS tube, row scan control signal Low level effective, and horizontal blanking signal high level is effective；Work as first switch
Element M1, the 3rd switch element M3, the 5th switch element M5 and the 7th switch element M7 can also be NMOS tube, and second
When switch element M2, the 4th switch element M4, the 6th switch element M6 and the 8th switch element M8 are PMOS, row scanning
Control signal high level is effective, and horizontal blanking signal Low level effective；When the switch element M8 of first switch element M1 to the 8th are equal
During for NMOS tube, row scan control signal is effective with the equal high level of horizontal blanking signal, when first switch element M1 to the 8th is switched
When element M8 is PMOS, row scan control signal and the equal Low level effective of horizontal blanking signal.
In the present invention, by setting blanking signal generation module 103 in LED display control circuits 10 so that blanking
Signal generator module 103 produces horizontal blanking signal according to row scan control signal, and aobvious to LED according to the horizontal blanking signal for producing
Show that the corresponding row of channels in array 102 carries out elimination of hidden, so as to eliminate the ghost occurred in LED array of display 102, solve
There is the incomplete problem of blanking in LED display.
Further, as a preferred embodiment of the invention, as shown in figure 5, blanking signal generation module 103 includes：
Multiple delay unit 103a, rp unit 103b and the first blanking signal generation unit 103c.
Wherein, the output end and rp unit of multiple delay unit 103a series connection, and last delay unit 103a
The input connection of 103b, the output end of rp unit 103b connects with the first input end of the first blanking signal generation unit 103c
Connect, second input of the first blanking signal generation unit 103c connects to be formed altogether and disappears with first input of delay unit 103a
The input of hidden signal generator module 103, the output end of the first blanking signal generation unit 103c is blanking signal generation module
103 output end.
Specifically, multiple delay unit 103a carries out multiple time delay to line scans control signal, and by after time delay
Row scan control signal is exported to rp unit 103b；Wherein, the width of each time delay of row scan control signal is less than burst pulse
Width；Rp unit 103b is exported to the generation of the first blanking signal after anti-phase treatment is carried out to the row scanning control chip after time delay
Unit 103c；First blanking signal generation unit 103c is according to the row scan control signal after the time delay after treatment and row scanning control
Signal generation horizontal blanking signal processed.
Further, as a preferred embodiment of the invention, as shown in fig. 6, delay unit 103a includes that first is anti-phase
Device U1, the second phase inverter U2, first resistor R1 and the first electric capacity C11.
Wherein, the input of the first phase inverter U1 is the input of delay unit 103a, the output end of the first phase inverter U1
First end with first resistor R1 is connected, and second end of first resistor R1 is anti-phase with the first end of the first electric capacity C11 and second
The input connection of device U2, the second end ground connection of the first electric capacity C11, the output end of the second phase inverter U2 is delay unit 103a's
Output end.
In embodiments of the present invention, by the first phase inverter U1, the second phase inverter U2, first resistor R1 and the first electric capacity
C11 constitutes delay unit 103a, and delay unit 103a is by the first phase inverter U1 and the second phase inverter U2 to row scan control
Signal carries out anti-phase treatment twice, enters the purpose of line delay to row scan control signal to reach.
Further, as a preferred embodiment of the invention, as shown in fig. 7, delay unit 103a includes that the 3rd is anti-phase
Device U3, the 4th phase inverter U4, the 5th phase inverter U5, hex inverter U6, the second electric capacity C12 and the first bias current sources I1.
Wherein, the input of the 3rd phase inverter U3 is the input of delay unit 103a, the output end of the 3rd phase inverter U3
First input end with the 4th phase inverter U4 is connected, and second input of the 4th phase inverter U4 is defeated with the first bias current sources I1's
Go out end connection, the input of the first bias current sources I1 receives input voltage VDD, the output end of the 4th phase inverter U4 and the second electricity
The input connection of the first end and the 5th phase inverter U5 of appearance C12, the earth terminal of the 4th phase inverter U4 and the second electric capacity C12's
Second end is connected to ground altogether, and the output end of the 5th phase inverter U5 is connected with the input of hex inverter U6, hex inverter U6's
Output end is the output end of delay unit 103a.
In embodiments of the present invention, by the 3rd phase inverter U3, the 4th phase inverter U4, the 5th phase inverter U5, hex inverter
U6, the second electric capacity C12 and the first bias current sources I1 compositions delay unit 103a, delay unit 103a are anti-phase by the 3rd
Device U3, the 4th phase inverter U4, the 5th phase inverter U5 and hex inverter U6 to the four anti-phase treatment of row scan control signal, with
Reach the purpose for entering line delay to row scan control signal.
Further, as a preferred embodiment of the invention, as shown in figure 8, delay unit 103a includes that the 7th is anti-phase
Device U7, the 8th phase inverter U8, the 9th phase inverter U9, the tenth phase inverter U10, the 3rd electric capacity C13 and the second bias current sources I2.
Wherein, the first input end of the 7th phase inverter U7 is the input of delay unit 103a, the of the 7th phase inverter U7
Two inputs receive input voltage VDD, and the output end of the 7th phase inverter U7 is anti-phase with the first end of the 3rd electric capacity C13 and the 8th
The input connection of device U8, the earth terminal of the 7th phase inverter U7 is connected with the input of the second bias current sources I2, the second biasing
Current source I2's is connected to ground altogether with second end of the 3rd electric capacity C13, and the output end of the 8th phase inverter U8 is with the 9th phase inverter U9's
Input is connected, and the output end of the 9th phase inverter U9 is connected with the input of the tenth phase inverter U10, and the tenth phase inverter U10's is defeated
It is the output end of delay unit 103a to go out end.
In embodiments of the present invention, by the 7th phase inverter U7, the 8th phase inverter U8, the 9th phase inverter U9, the tenth phase inverter
U10, the 3rd electric capacity C13 and the second bias current sources I2 compositions delay unit 103a, delay unit 103a are anti-by the 7th
Phase device U7, the 8th phase inverter U8, the 9th phase inverter U9 and the tenth phase inverter U10 are to four anti-phase places of row scan control signal
Reason, the purpose of line delay is entered to reach to row scan control signal.
Further, as a preferred embodiment of the invention, as shown in figure 5, rp unit 103b includes that the 11st is anti-
The input of phase device U11, the 11st phase inverter U11 is the input of rp unit 103b, the output end of the 11st reverser U11
It is the output end of rp unit 103b.
Further, as a preferred embodiment of the invention, as shown in figure 5, the first blanking signal generation unit 103c
Including with door AND1, and the first input end that the first input end of door AND1 is the first blanking signal generation unit 103c, with door
Second input of AND1 is second input of the first blanking signal generation unit 103c, is first with the output end of door AND1
The output end of blanking signal generation unit 103c.
Further, Fig. 9 shows the sequential principle of the LED display control circuits 10 that one embodiment of the invention is provided
Figure, for convenience of description, illustrate only the part related to the embodiment of the present invention, and details are as follows：
As shown in figure 11, blanking signal generation module 103 is receiving the row scanning control of the output of row scanning control chip 100
After signal processed, the multiple delay unit 103a in blanking signal generation module 103 are repeatedly prolonged to the row scan control signal
When, to obtain the row scan control signal after multiple time delay, for example, it is assumed that blanking signal generation module 103 includes that four are prolonged
Shi Danyuan 103a, when first delay unit 103a receives the row scan control signal P1 of the output of row scanning control chip 100
Afterwards, first delay unit 103a carries out delay process to obtain the row scan control after time delay to row scan control signal P1
Signal P1D1, and the row scan control signal P1D1 after the time delay is exported to second delay unit 103a, second time delay
Unit 103a carries out delay process again to the row scan control signal P1D1 after the time delay and is controlled with obtaining the row scanning after time delay
Signal P1D2 processed, and the row scan control signal P1D2 after the time delay is exported to the 3rd delay unit 103a, the 3rd is prolonged
Shi Danyuan 103a carry out delay process to obtain the letter of the row scan control after time delay to the row scan control signal P1D2 after time delay
Number P1D3, and the row scan control signal P1D3 after the time delay is exported to the 4th delay unit 103a, the 4th time delay list
First 103a carries out delay process to obtain the row scan control signal after time delay to the row scan control signal P1D3 after time delay
P1D4, and the row scan control signal P1D4 after the time delay is exported to the 11st phase inverter U11 carry out it is anti-phase, it is anti-phase to obtain
Signal P1D4B after treatment.
Row scan control signal P1D4 after the 11st phase inverter U11 is to time delay carries out delay process to obtain signal
After P1D4B, the 11st phase inverter U11 by signal P1D4B export to door AND1, with door AND1 to signal P1D4B and row
Scan control signal P1 is carried out and logical process, to produce horizontal blanking signal B1, horizontal blanking signal B1 be expert at scan control letter
The trailing edge moment of the burst pulse P11 of number P1 will produce one section of high level B11, and the duration of high level B11 to be more than
The pulse width of the burst pulse P11 of row scan control signal P1.
It should be noted that multiple delay unit 103a to row scan control signal P1 when multiple time delay is carried out, it is necessary to
So that the width of time delay is less than the pulse width of the burst pulse P11 of row scan control signal P1 every time；Additionally, Fig. 9 is with row
As a example by scan control signal P1, to the blanking signal generation module in LED display control circuits 10 provided in an embodiment of the present invention
103 principle is illustrated, when row scanning control chip 100 other output ends export row scan control signal have it is narrow
During pulse, blanking signal generation module 103 produces the principle of horizontal blanking signal same as mentioned above according to it, not another herein
One is described.
Further, in embodiments of the present invention, the operation principle of blanking signal generation module 103 is only with row scan control
Signal P1 Low level effectives, and illustrated as a example by horizontal blanking signal B1 high level is effective, and work as scan control signal P1 electricity high
It is flat effective, and during horizontal blanking signal B1 Low level effectives, row scan control signal P1 and the equal Low level effectives of horizontal blanking signal B1,
Or when row scan control signal P1 and effective equal high level of horizontal blanking signal B1, the work of blanking signal generation module 103 is former
Reason is similar to the above method, is no longer repeated herein.
In embodiments of the present invention, multiple time delay, and the width of time delay every time are carried out by by row scan control signal P1
Degree is respectively less than the pulse width of the burst pulse P11 of row scan control signal P1, will so cause that blanking signal generation module 103 exists
The horizontal blanking signal B1 is produced to make according to row scan control signal P1, horizontal blanking signal B1 is expert at the burst pulse of scan control signal P1
There is one section of high level B11 after P11, and then cause that high level B11 can disappear to the ghost produced by burst pulse P11
Remove, so as to solve existing LED display, in the presence of causing LED display to produce because of sequence problem, blanking is incomplete to ask
Topic.
Further, as a preferred embodiment of the invention, as shown in Figure 10, blanking signal generation module 103 includes：
Multiple signal processing unit 103d and the second blanking signal generation unit 103e.
Wherein, multiple signal processing unit 103d series connection, and the output end of last signal processing unit 103d with
The first input end connection of the second blanking signal generation unit 103e, first input and second of signal processing unit 103d
Second input of blanking signal generation unit 103e connects the input to form blanking signal generation module 103, the second blanking altogether
The output end of signal generation unit 103e is the output end of blanking signal generation module 103.
Specifically, multiple signal processing unit 103d carries out multiple conversions treatment to row scan control signal, and will conversion
Row scan control signal after treatment is exported to the second blanking signal generation unit 103e, the second blanking signal generation unit 103e
Horizontal blanking signal is generated according to the row scan control signal after conversion process and row scan control signal.
Further, as a preferred embodiment of the invention, as shown in figure 11, signal processing unit 103d includes time delay
Subelement 103f and signal conversion subunit 103g.
Wherein, the input of time delay subelement 103f connects to form letter altogether with the first input end of signal conversion subunit 103g
The input of number processing unit 103d, the output end of time delay subelement 103f and second input of signal conversion subunit 103g
Connection, the output end of signal conversion subunit 103g is the output end of signal processing unit 103d.
Specifically, time delay subelement 103f enters line delay to row scan control signal, and by the row scan control after time delay
Signal is sent to signal conversion subunit 103g, and signal conversion subunit 103g is according to the row scan control signal after time delay to row
Scan control signal carries out conversion process；Wherein, the width of row scan control signal time delay is less than narrow pulse width.
Further, as a preferred embodiment of the invention, as shown in figure 11, the physical circuit of time delay subelement 103f
Structure is identical with the circuit structure of the delay unit 103a shown in Fig. 6 to Fig. 8, specifically refers in Fig. 6 to Fig. 8 for time delay
The associated description of unit 103a, here is omitted.
Further, as a preferred embodiment of the invention, as shown in figure 11, signal conversion subunit 103g is and door
AND2.Wherein, it is the first input end of signal conversion subunit 103g, with door AND2 second with the first input end of door AND2
Input is second input of signal conversion subunit 103g, is signal conversion subunit 103g's with the output end of door AND2
Output end.
Further, as a preferred embodiment of the invention, as shown in figure 11, the second blanking signal generation unit 103e
Be include the 12nd phase inverter U12 and with door AND3, the input of the 12nd phase inverter U12 is single for the second blanking signal is produced
The first input end of first 102e, the output end of the 12nd phase inverter U12 and is connected with the first input end of door AND3, should and door
Second input of AND3 is second input of the second blanking signal generation unit 103e, should be the with the output end of door AND3
The output end of two blanking signal generation unit 103e.
Further, Figure 12 shows that the sequential of the LED display control circuits 10 that another embodiment of the present invention is provided is former
Reason figure, for convenience of description, illustrate only the part related to the embodiment of the present invention, and details are as follows：
First, the present embodiment only includes two signal processing unit 103d with the blanking signal generation module 103 in Figure 12
As a example by, each signal processing unit 103d includes an a time delay subelement 103f and signal conversion subunit 103g.
As shown in figure 12, first time delay subelement 103f receives going for the output of row scanning control chip 100 and scans control
After signal P1 processed, delay process is carried out to row scan control signal P1 to obtain the row scan control signal P1B1 after time delay,
And by the row scan control signal P1B1 after the time delay export to first with door AND2, first with door AND2 to time delay after
Row scan control signal P1B1 and row scan control signal P1 is carried out and logical process, with the signal P1A1 after being processed；
After first obtains the signal P1A1 after the treatment with AND2, first with door AND2 by the signal P1A1 after processing send to
Second time delay subelement 103f and second and door AND2, second time delay subelement 103f enter line delay to signal P1A1
The signal P1B2 after time delay is obtained afterwards, and the row scan control signal P1B2 after the time delay is exported to second and door AND2,
Second is carried out and logical process with door AND2 to the row scan control signal P1B2 after time delay and signal P1A1, to be processed
Signal P1A2, the 12nd phase inverter U12 afterwards signal P1A2 is carried out after anti-phase treatment output signal P1A2B to door
AND3, is carried out and logical process, according to signal P1A2B and row scan control signal P1 with door AND3 to produce horizontal blanking signal
Be expert at trailing edge moment of burst pulse P11 of scan control signal P1 of B1, horizontal blanking signal B1 will produce one section of high level
B11, and high level B11 duration more than row scan control signal P1 burst pulse P11 pulse width.
It should be noted that multiple time delay subelement 103f to row scan control signal P1 when multiple time delay is carried out, must
The pulse width of the burst pulse P11 of the width less than row scan control signal P1 of each time delay must be caused；Additionally, Figure 12 be with
As a example by row scan control signal P1, mould is produced to the blanking signal in LED display control circuits 10 provided in an embodiment of the present invention
The principle of block 103 is illustrated, when the row scan control signal that other output ends of row scanning control chip 100 are exported has
During burst pulse, blanking signal generation module 103 produces the principle of horizontal blanking signal same as mentioned above according to it, herein no longer
It is described one by one.
Further, in embodiments of the present invention, the operation principle of blanking signal generation module 103 is only with row scan control
Signal P1 Low level effectives, and illustrated as a example by horizontal blanking signal B1 high level is effective, and work as scan control signal P1 electricity high
It is flat effective, and horizontal blanking signal B1 Low level effectives, row scan control signal P1 and the equal Low level effectives of horizontal blanking signal B1 or
When person row scan control signal P1 is effective with the equal high level of horizontal blanking signal B1, the operation principle of blanking signal generation module 103
It is same as mentioned above, no longer repeated herein.
In embodiments of the present invention, multiple time delay, and the width of time delay every time are carried out by by row scan control signal P1
Degree is respectively less than the pulse width of the burst pulse P11 of row scan control signal P1, will so cause that blanking signal generation module 103 exists
The horizontal blanking signal B1 is produced to make according to row scan control signal P1, horizontal blanking signal B1 is expert at the burst pulse of scan control signal P1
There is one section of high level B11 after P11, and then cause that high level B11 can disappear to the ghost produced by burst pulse P11
Remove, so as to solve existing LED display, in the presence of causing LED display to produce because of sequence problem, blanking is incomplete to ask
Topic.
Below with the sequential principle of the LED display control circuits 10 shown in the LED display control circuits 10 shown in 4 and Figure 13
As a example by figure, the operation principle to the display control circuit 10 shown in the embodiment of the present invention is illustrated, and details are as follows：
Specifically, Fig. 4 and Figure 13 is please also refer to, wherein, only believed with row scan control signal P1-P4, blanking in Figure 13
As a example by number B1-B4 and column scan control signal N1-N4.
As shown in Fig. 4 and Figure 13, within the period of time 1, when chip selection signal CEB is low level, row scan control signal
P11 is low level, and the first horizontal blanking signal B1, when being low level, row scan control signal P11 outputs are enabled, at once scanning control
Signal P11 control first switch elements M1 processed is opened, and the first horizontal blanking signal B1 control second switch elements M2 is closed, Jin Erxuan
First row of channels of logical LED array of display 102, the first switch element M1 that now external voltage (not shown) passes through opening
Charged to the first row of channels parasitic capacitance C1, and because column scan control signal N4 now is high level, therefore LED shows battle array
4th row passage of row 102 is strobed, and then causes that the light emitting diode of the row of the 1st row the 4th of LED array of display 102 is lighted.Need
It is noted that within the period of the time 1, the light emitting diode of the row of the 2nd row the 1st in LED array of display 102, the 3rd row the
The light emitting diode of 2 row and the light emitting diode of the row of the 4th row the 3rd are lighted, and light emitting diode, the 3rd of the row of the 2nd row the 1st
The principle and the 1st of LED array of display 102 that the light emitting diode of the row of row the 2nd and the light emitting diode of the row of the 4th row the 3rd are lighted
The principle that the light emitting diode of the row of row the 4th is lighted is identical, and here is omitted.
When row scan control signal P11 is changed into high level from low level, and the first horizontal blanking signal B1 is changed into from low level
After high level, row scan control signal P11 control first switch elements M1 is closed, the first horizontal blanking signal B1 control second switches
Element M2 is opened, and then causes that the first row of channels parasitic capacitance C1 is discharged by the second switch element M2 for opening, so that
So that the first row of channels parasitic capacitance C1 is changed into low level by high level.
Because row scan control signal P1 has burst pulse P11, and now the first horizontal blanking signal B1 is low level, because
This, the burst pulse P11 of row scan control signal P1 charges to electric capacity C1, and then causes that electric capacity C2 switchs to high level by low level,
And as shown in Figure 13, after the burst pulse P11 of the scan control signal P1 that is expert at, the first horizontal blanking signal B1 has one section of high level
B11, high level B11 cause that second switch element M2 is opened, and then cause the first row of channels parasitic capacitance C1 by opening
Second switch element M2 is discharged, so that the first row of channels parasitic capacitance C1 by high level by being changed into low electricity again
It is flat.
Within the period of time 2, because chip selection signal CEB now is high level, and work as chip selection signal CEB for high level
When, row scan control signal P1-P4 is shielded, and the low and high level of scan control signal P1-P4 will not gate LED and show at once
Corresponding row of channels in array 102, and row control signal N1-N4 now is low level, therefore, LED array of display 102
In each light emitting diode do not light；Furthermore it is noted that within the period of time 2, due to the first horizontal blanking letter
The height that high level B1 1 in number B1 produces the first row of channels parasitic capacitance C1 because of the burst pulse P11 of row scan control signal P1
Level has been dragged down, therefore, the first row of channels parasitic capacitance C1 maintains low level state.
Within the period of time 3, when chip selection signal CEB is changed into low level again, row scan control signal P1 is by high level
It is changed into low level, and the first horizontal blanking signal B1, when being continuously low level, row scan control signal P1 outputs are enabled, and are scanned at once
Control signal P1 control first switch elements M1 is opened, and the first horizontal blanking signal B1 control second switch elements M2 is closed, and then
So that the first row of channels of LED array of display 102 is strobed, now external voltage (not shown) is opened by open first
Close element M1 to be charged to the first row of channels parasitic capacitance C1, the first row of channels parasitic capacitance C1 is by the low level state that maintains before
High level state is converted to, but because column scan control signal N1-N4 now is low level, therefore LED array of display
Lighted without light emitting diode in 102 the first row of channels.
When row scan control signal P11 is changed into high level from low level, and the first horizontal blanking signal B1 is changed into from low level
After high level, row scan control signal P11 control first switch elements M1 is closed, the first horizontal blanking signal B1 control second switches
Element M2 is opened, and then causes that the first row of channels parasitic capacitance C1 is discharged by the second switch element M2 for opening, so that
So that the first row of channels parasitic capacitance C1 is changed into low level by high level.
Because row scan control signal P1 has burst pulse P11, and now the first horizontal blanking signal B1 is low level, because
This, the burst pulse P11 of row scan control signal P1 charges to electric capacity C1, and then causes that electric capacity C2 switchs to high level by low level,
And as shown in Figure 13, after the burst pulse P11 of the scan control signal P1 that is expert at, the first horizontal blanking signal B1 has one section of high level
B11, high level B11 cause that second switch element M2 is opened, and then cause the first row of channels parasitic capacitance C1 by opening
Second switch element M2 is discharged, so that the first row of channels parasitic capacitance C1 by high level by being changed into low electricity again
It is flat, and then cause to be lighted without light emitting diode in the first row of channels of LED array of display 102, so as to eliminate LED array of display
The ghost occurred in 102, solves LED display and the incomplete problem of blanking occurs.
It should be noted that within the period of the time 3, the light-emitting diodes of the row of the 2nd row the 2nd in LED array of display 102
The light emitting diode of pipe, the light emitting diode of the row of the 3rd row the 3rd and the row of the 4th row the 4th is lighted, and the row of the 2nd row the 2nd is luminous
The light emitting diode that diode, the 3rd row the 2nd are arranged and the foregoing LED of the principle that the light emitting diode of the row of the 4th row the 2nd is lighted show
Show that the principle that the light emitting diode of the row of the 1st row the 4th of array 102 is lighted is identical, here is omitted.
Additionally, above-mentioned just for when burst pulse occurs in row scan control signal P1, blanking signal generation module 103
According to the first horizontal blanking signal B1 to the ghost of corresponding row of channels in LED array of display 102 caused by row scan control signal P1
Carry out as a example by Processing for removing, the operation principle to LED display control circuits 10 provided in an embodiment of the present invention is described in detail,
And when burst pulse occurs in any in row scan control signal P1-P4, the LED display controls electricity that the embodiment of the present invention is provided
Road 10 disappear shadow treatment principle it is same as mentioned above, here is omitted.
Further, the embodiment of the present invention also provides a kind of LED display, and the LED display includes LED display controls electricity
Road 10, by the LED display that the embodiment of the present invention is provided is to be based on the LED display control circuits that Fig. 4 to Figure 13 is provided
10 realize, the principle of the LED display provided accordingly, with respect to the embodiment of the present invention refers to right in above-mentioned Fig. 4 to Figure 13
The specific descriptions of display control circuit 10, here is omitted.
In embodiments of the present invention, by using include multiple row scanning control chips, multiple column scan control chip,
The LED display control circuits of LED array of display and multiple blanking signal generation modules so that row scanning control chip is according to more
The individual multiple row scan control signals of drive signal generation, and row scan control signal is exported to LED array of display, to gate
Row of channels corresponding with row scan control signal in LED array of display；Wherein, row scan control signal has burst pulse；Simultaneously
Row scanning control chip exports to blanking signal generation module row scan control signal, and blanking signal generation module is swept according to row
Control signal generation horizontal blanking signal is retouched, is entered at horizontal blanking with to row of channels corresponding with horizontal blanking signal in LED array of display
Reason；Wherein, in the rising edge time of burst pulse, horizontal blanking signal is changed into high level, and high level duration from low level
More than the pulse width of burst pulse, or at the trailing edge moment of burst pulse, horizontal blanking signal is changed into low level from high level, and
Low level is sustained for longer than the pulse width of burst pulse；Or in the rising edge time of burst pulse, horizontal blanking signal is by height
Level is changed into low level, and low level is sustained for longer than the pulse width of burst pulse；Or in the trailing edge of burst pulse
Carve, horizontal blanking signal is changed into high level from low level, and high level is sustained for longer than the pulse width of burst pulse, so that
When proper row scan control signal produces burst pulse, blanking signal generation module can produce horizontal blanking signal to believe the burst pulse
Ghost produced by number carries out horizontal blanking treatment so that the row of channels being strobed in LED array of display will not produce ghost phenomena,
There are problems that causing LED display to produce blanking incomplete because of sequence problem so as to solve existing LED display.
Presently preferred embodiments of the present invention is the foregoing is only, is not intended to limit the invention, it is all in essence of the invention
Any modification, equivalent and improvement made within god and principle etc., should be included within the scope of the present invention.
Claims (10)
1. a kind of LED display control circuits, including multiple row scanning control chips, multiple column scan control chips and LED are aobvious
Show array, each described row scanning control chip has multiple inputs and multiple output ends, multiple inputs are used to connect
Multiple drive signals are received, multiple output ends connect one to one with multiple row of channels of the LED array of display, for defeated
To the LED array of display, each described column scan control chip is used to export column scan control letter trip scan control signal
Number to the LED array of display, it is characterised in that the LED display control circuits also include multiple blanking signal generation modules；
The input of multiple blanking signal generation modules is with multiple output ends of each row scanning control chip one by one
Correspondence connection, a pair of the output end of multiple blanking signal generation modules and multiple row of channels one of the LED array of display
Should connect；
The row scanning control chip sweeps the row according to multiple multiple row scan control signals of drive signal generation
Control signal is retouched to export to the LED array of display, with gate in the LED array of display with the row scan control signal pair
The row of channels answered；Wherein, the row scan control signal has burst pulse；The row scanning control chip sweeps the row simultaneously
Retouch control signal to export to the blanking signal generation module, the blanking signal generation module is believed according to the row scan control
Number generation horizontal blanking signal, enter at horizontal blanking with to row of channels corresponding with the horizontal blanking signal in the LED array of display
Reason；
Wherein, in the rising edge time of the burst pulse, the horizontal blanking signal is changed into high level, and the electricity high from low level
The flat pulse width for being sustained for longer than the burst pulse；Or at the trailing edge moment of the burst pulse, the horizontal blanking
Signal is changed into low level from high level, and the low level is sustained for longer than the pulse width of the burst pulse；Or
The rising edge time of the burst pulse, the horizontal blanking signal is changed into low level from high level, and the low level it is lasting when
Between more than the burst pulse pulse width；Or at the trailing edge moment of the burst pulse, the horizontal blanking signal is by low electricity
It is flat to be changed into high level, and the high level is sustained for longer than the pulse width of the burst pulse.
2. LED display control circuits according to claim 1, it is characterised in that the blanking signal generation module includes：
Multiple delay units, rp unit and the first blanking signal generation unit；
Multiple delay units series connection, and the output end of last delay unit and the rp unit input
End connection, the output end of the rp unit is connected with the first input end of the first blanking signal generation unit, and described the
Second input of one blanking signal generation unit and first input of the delay unit connect to form the blanking letter altogether
The input of number generation module, the output end of the first blanking signal generation unit is the defeated of the blanking signal generation module
Go out end；
Multiple delay units carry out multiple time delay to the line scans control signal, and the row scanning after time delay is controlled
Signal output processed is to the rp unit；Wherein, the width of each time delay of row scan control signal is less than the burst pulse
Width；The rp unit is exported to first blanking after anti-phase treatment is carried out to the row scanning control chip after the time delay
Signal generation unit；Row scan control signal after the time delay after first blanking signal generation unit treatment with
The row scan control signal generates the horizontal blanking signal.
3. LDE display control circuits according to claim 1, it is characterised in that the blanking signal generation module includes：
Multiple signal processing units and the second blanking signal generation unit；
Multiple signal processing units are connected, and the output end of last signal processing unit disappears with described second
The input connection of hidden signal generation unit, first input of the signal processing unit is produced with second blanking signal
Second input of raw unit connects the input to form the blanking signal generation module altogether, and second blanking signal produces single
The output end of unit is the output end of the blanking signal generation module；
Multiple signal processing units carry out multiple conversions treatment to the row scan control signal, and by after conversion process
The row scan control signal is exported to the second blanking signal generation unit, the second blanking signal generation unit
The row scan control signal after the conversion process generates the horizontal blanking signal with the row scan control signal.
4. LED display control circuits according to claim 3, it is characterised in that the signal processing unit includes time delay
Subelement and signal conversion subunit；
The input of the time delay subelement connects to be formed at the signal altogether with the first input end of the signal conversion subunit
The input of unit is managed, the output end of the time delay subelement is connected with the second input of the signal conversion subunit, institute
The output end for stating signal conversion subunit is the output end of the signal processing unit；
The time delay subelement enters line delay to the row scan control signal, and by time delay after the row scan control signal
Send to the signal conversion subunit, the signal conversion subunit according to time delay after the row scan control signal to institute
Stating row scan control signal carries out conversion process；Wherein, the width of the row scan control signal time delay is less than the burst pulse
Width.
5. LED display control circuits according to claim 2, it is characterised in that the delay unit includes：
First phase inverter, the second phase inverter, first resistor and the first electric capacity；
The input of first phase inverter is the input of the delay unit, the output end of first phase inverter with it is described
The first end connection of first resistor, the first end of the second end of the first resistor and first electric capacity and described second anti-
The input connection of phase device, the second end ground connection of first electric capacity, the output end of second phase inverter is the time delay list
The output end of unit.
6. LED display control circuits according to claim 2, it is characterised in that the delay unit includes：
3rd phase inverter, the 4th phase inverter, the 5th phase inverter, hex inverter, the second electric capacity and the first bias current sources；
The input of the 3rd phase inverter is the input of the delay unit, the output end of the 3rd phase inverter with it is described
The first input end connection of the 4th phase inverter, the second input of the 4th phase inverter is defeated with first bias current sources
Go out end connection, the input of first bias current sources receives input voltage, the output end of the 4th phase inverter with it is described
The input connection of the first end of the second electric capacity and the 5th phase inverter, the earth terminal of the 4th phase inverter and described the
Second end of two electric capacity is connected to ground altogether, and the output end of the 5th phase inverter is connected with the input of the hex inverter, institute
The output end for stating hex inverter is the output end of the delay unit.
7. LED display control circuits according to claim 2, it is characterised in that the delay unit includes：
7th phase inverter, the 8th phase inverter, the 9th phase inverter, the tenth phase inverter, the 3rd electric capacity and the second bias current sources；
The first input end of the 7th phase inverter is the input of the delay unit, the second input of the 7th phase inverter
End receives input voltage, the output end of the 7th phase inverter and the first end and the 8th phase inverter of the 3rd electric capacity
Input connection, the earth terminal of the 7th phase inverter is connected with the input of second bias current sources, described second
Bias current sources with the second end of the 3rd electric capacity are connected to ground altogether, and the output end of the 8th phase inverter is anti-with the described 9th
The input connection of phase device, the output end of the 9th phase inverter is connected with the input of the tenth phase inverter, and the described tenth
The output end of phase inverter is the output end of the delay unit.
8. LED display control circuits according to claim 2, it is characterised in that the rp unit includes that the 11st is anti-
Phase device, the input of the 11st phase inverter is the input of the rp unit, the output end of the 11st reverser
It is the output end of the rp unit.
9. LED display control circuits according to claim 2, it is characterised in that the first blanking signal generation unit
Including with door, described is the first input end of the first blanking signal generation unit, described and door with door first input end
The second input be the first blanking signal generation unit the second input, the output end with door is described first
The output end of blanking signal generation unit.
10. a kind of LED display, it is characterised in that the LED display is included as described in any one of claim 1 to 9
LED display control circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611112170.4A CN106710518B (en) | 2016-12-06 | 2016-12-06 | A kind of LED display and its display control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611112170.4A CN106710518B (en) | 2016-12-06 | 2016-12-06 | A kind of LED display and its display control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106710518A true CN106710518A (en) | 2017-05-24 |
| CN106710518B CN106710518B (en) | 2019-03-08 |
Family
ID=58935906
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611112170.4A Active CN106710518B (en) | 2016-12-06 | 2016-12-06 | A kind of LED display and its display control circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106710518B (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109192130A (en) * | 2018-07-05 | 2019-01-11 | 厦门强力巨彩光电科技有限公司 | LED display control circuit, driving chip and LED display |
| CN109300427A (en) * | 2018-10-25 | 2019-02-01 | 深圳市明微电子股份有限公司 | The row of display control chip sweeps control method and storage medium |
| CN109545126A (en) * | 2017-09-22 | 2019-03-29 | 深圳市富满电子集团股份有限公司 | Has the LED display controller that ghost eliminates function |
| US11170698B2 (en) * | 2017-11-29 | 2021-11-09 | Planar Systems, Inc. | Active discharge circuitry for display matrix |
| CN115171598A (en) * | 2022-07-27 | 2022-10-11 | 富满微电子集团股份有限公司 | Blanking circuit and chip |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008129230A (en) * | 2006-11-20 | 2008-06-05 | Epson Imaging Devices Corp | Electro-optic device and electric apparatus |
| CN102592542A (en) * | 2012-02-27 | 2012-07-18 | 深圳市明微电子股份有限公司 | Blanking control circuit for LED (light-emitting diode) display screens and LED drive chip |
| CN103489408A (en) * | 2013-10-23 | 2014-01-01 | 苏州天微工业技术有限公司 | Display screen drive control circuit and display screen |
| CN103971642A (en) * | 2014-05-20 | 2014-08-06 | 深圳市绿源半导体技术有限公司 | Led display screen driving method and led power supply control circuit |
| CN205508357U (en) * | 2016-04-12 | 2016-08-24 | 天津昊天伟业电子科技有限公司 | Controllable LED panel display control system of blanking time delay |
-
2016
- 2016-12-06 CN CN201611112170.4A patent/CN106710518B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008129230A (en) * | 2006-11-20 | 2008-06-05 | Epson Imaging Devices Corp | Electro-optic device and electric apparatus |
| CN102592542A (en) * | 2012-02-27 | 2012-07-18 | 深圳市明微电子股份有限公司 | Blanking control circuit for LED (light-emitting diode) display screens and LED drive chip |
| CN103489408A (en) * | 2013-10-23 | 2014-01-01 | 苏州天微工业技术有限公司 | Display screen drive control circuit and display screen |
| CN103971642A (en) * | 2014-05-20 | 2014-08-06 | 深圳市绿源半导体技术有限公司 | Led display screen driving method and led power supply control circuit |
| CN205508357U (en) * | 2016-04-12 | 2016-08-24 | 天津昊天伟业电子科技有限公司 | Controllable LED panel display control system of blanking time delay |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109545126A (en) * | 2017-09-22 | 2019-03-29 | 深圳市富满电子集团股份有限公司 | Has the LED display controller that ghost eliminates function |
| CN109545126B (en) * | 2017-09-22 | 2024-01-12 | 富满微电子集团股份有限公司 | LED display screen controller with ghost eliminating function |
| US11170698B2 (en) * | 2017-11-29 | 2021-11-09 | Planar Systems, Inc. | Active discharge circuitry for display matrix |
| CN109192130A (en) * | 2018-07-05 | 2019-01-11 | 厦门强力巨彩光电科技有限公司 | LED display control circuit, driving chip and LED display |
| CN109300427A (en) * | 2018-10-25 | 2019-02-01 | 深圳市明微电子股份有限公司 | The row of display control chip sweeps control method and storage medium |
| CN109300427B (en) * | 2018-10-25 | 2021-10-26 | 深圳市明微电子股份有限公司 | Line scanning control method of display control chip and storage medium |
| CN115171598A (en) * | 2022-07-27 | 2022-10-11 | 富满微电子集团股份有限公司 | Blanking circuit and chip |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106710518B (en) | 2019-03-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106710518B (en) | A kind of LED display and its display control circuit | |
| CN106531064B (en) | A kind of LED display and its display control circuit | |
| CN110189702A (en) | A kind of organic light emitting display panel and its driving method | |
| CN107742502B (en) | A kind of display panel, display methods and display device | |
| TW511067B (en) | Organic EL display device and method for driving the same | |
| US7521630B2 (en) | Parallel and virtual parallel interconnection of solar cells in solar panels | |
| CN105575333B (en) | OLED display and source electrode driver | |
| CN110148384A (en) | A kind of driving method of array substrate, display panel and pixel-driving circuit | |
| CN110246462A (en) | A kind of pixel circuit and its driving method, display device and its driving method | |
| CN103915058B (en) | Shift register | |
| CN104252841B (en) | LED display control method and control card, LED display screen system | |
| CN106251806A (en) | LED display and driving method thereof | |
| CN109559676A (en) | LED display driver circuit and LED display | |
| US2825889A (en) | Switching network | |
| CN106328043B (en) | The ghost of LED scan screens eliminates circuit and LED scan screens | |
| CN100442340C (en) | Organic EL display device | |
| CN109884612B (en) | Pulse time compression method of multichannel single photon avalanche diode detector | |
| CN109712566A (en) | For driving the driving control system and display device of pixel-driving circuit | |
| CN109801594A (en) | A kind of display panel and display device | |
| CN102779480A (en) | Display screen drive circuit and light-emitting diode display device | |
| CN109493811A (en) | A kind of display device and its driving method | |
| CN106683610B (en) | A kind of LED display and its display control unit and blanking circuit | |
| CN108898992A (en) | Shift register and gate drive apparatus | |
| CN108806583A (en) | Shift register cell, driving method, shift register and display device | |
| CN104599628A (en) | Light-emitting element array advertising board, and column switching circuit and control method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: 518000 1701, building 1, Shenzhen new generation industrial park, 136 Zhongkang Road, Meidu community, Meilin street, Futian District, Shenzhen City, Guangdong Province Patentee after: Fuman microelectronics Group Co.,Ltd. Address before: Unit b7-b8, 9 / F, Yanxiang science and technology building, 31 Gaoxin Zhongsi Road, Nanshan District, Shenzhen, Guangdong 518000 Patentee before: FINE MADE MICROELECTRONICS GROUP CO.,LTD. |
|
| CP03 | Change of name, title or address |
Address after: 518000, Building 101, Fuman Microelectronics Group Co., Ltd., Intersection of Renmin East Road and Shouhe Road, Jinsha Community, Kengzi Street, Pingshan District, Shenzhen City, Guangdong Province Patentee after: Fuman microelectronics Group Co.,Ltd. Country or region after: China Address before: 518000 1701, building 1, Shenzhen new generation industrial park, 136 Zhongkang Road, Meidu community, Meilin street, Futian District, Shenzhen City, Guangdong Province Patentee before: Fuman microelectronics Group Co.,Ltd. Country or region before: China |