CN106708747A - Memory switching method and device - Google Patents
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- CN106708747A CN106708747A CN201510791122.1A CN201510791122A CN106708747A CN 106708747 A CN106708747 A CN 106708747A CN 201510791122 A CN201510791122 A CN 201510791122A CN 106708747 A CN106708747 A CN 106708747A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
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Abstract
The invention provides a memory switching method and device. The method comprises the following steps that: configuring a Cache RAM (Random Access Memory) into a TCM (Tightly Coupled Memory) RAM; judging a memory to be accessed by a received request, and when the memory to be accessed by the received request is the Cache RAM, generating a request for accessing the Cache RAM; when the memory to be accessed by the received request is the TCM RAM, generating a request for accessing the TCM RAM; and sending the generated access request to the corresponding RAM. The invention also provides a memory switching device.
Description
Technical Field
The present invention relates to data storage technologies, and in particular, to a Memory switching method and apparatus for dynamically switching between a Cache Memory (Cache) and a Tightly Coupled Memory (TCM).
Background
In the processor architecture, the storage system is hierarchical, and the memory closer to the core has smaller scale and faster read-write speed. Most of the existing processor systems have L1 TCM in addition to L1 Cache, L2 Cache; the L1 TCM has a fast speed and a definite access time, but is generally small in scale and cannot fully meet practical requirements. When a program with a high requirement on access speed works or data cannot be released in the L1 TCM, a common practice is to define the program or the corresponding data as attributes of cacheable and store the attributes into the Cache. However, this has the disadvantage that after the Cache has been delayed by the query, the access time is relatively short if there is a hit, and still long if there is no hit.
Disclosure of Invention
In view of this, embodiments of the present invention are directed to a method and an apparatus for switching a memory, which can effectively shorten an access time of the memory and improve an access performance.
In order to achieve the purpose, the technical scheme of the invention is realized as follows:
the embodiment of the invention provides a memory switching method, which comprises the following steps:
configuring a Cache RAM into a TCM RAM;
judging a memory to be accessed by the received request, and generating a request for accessing the Cache RAM when the memory to be accessed by the received request is the Cache RAM; when the type of a memory to be accessed by the received request is TCM RAM, generating a request for accessing the TCM RAM;
and sending the generated access request to the corresponding RAM.
In the foregoing solution, configuring the Cache RAM into the TCM RAM includes:
configuring part of Cache RAM into TCM RAM; or,
and configuring all Cache RAMs as TCM RAMs.
In the foregoing solution, configuring the Cache RAM into the TCM RAM includes:
changing the allocation algorithm of the Cache RAM, and not inquiring and allocating the Cache RAM to be configured into the TCM RAM;
and establishing one-to-one mapping between the TCM address space and the TCM RAM by using the Cache RAM which is not queried and distributed, and configuring the Cache RAM into the TCM RAM.
In the above scheme, the method further comprises: and transferring the data in the Cache RAM to be configured into the TCM RAM to the memory.
In the above scheme, the method further comprises: and restoring the TCM RAM into a Cache RAM, and transferring data in the TCM RAM to a memory.
The embodiment of the invention also provides a memory switching device, which comprises: a configuration module and a control module, wherein,
the configuration module is used for configuring the Cache RAM into the TCM RAM;
the control module is used for judging a memory to be accessed by the received request, and generating a request for accessing the Cache RAM when the memory to be accessed by the received request is the Cache RAM; when the type of a memory to be accessed by the received request is TCM RAM, generating a request for accessing the TCM RAM; and sending the generated access request to the corresponding RAM.
In the foregoing solution, the configuration module is specifically configured to: configuring part of Cache RAM into TCMRAM; alternatively, all Cache RAM is configured as TCM RAM.
In the foregoing solution, the configuration module is specifically configured to:
changing the allocation algorithm of the Cache RAM, and not inquiring and allocating the Cache RAM to be configured into the TCM RAM;
and establishing one-to-one mapping between the TCM address space and the TCM RAM by using the Cache RAM which is not queried and distributed, and configuring the Cache RAM into the TCM RAM.
In the foregoing solution, the configuration module is further configured to: and transferring the data in the cacheRAM to be configured into the TCM RAM to the memory.
In the foregoing solution, the configuration module is further configured to: and restoring the TCM RAM into a Cache RAM, and transferring data in the TCM RAM to a memory.
The memory switching method and the device provided by the embodiment of the invention configure the Cache RAM into the TCMRAM; judging a memory to be accessed by the received request, and generating a request for accessing the Cache RAM when the memory to be accessed by the received request is the Cache RAM; when the type of the memory to be accessed by the received request is TCM RAM, a request for accessing the TCM RAM is generated, and then the generated access request is sent to the corresponding RAM. Therefore, the existing Cache RAM can be dynamically used as the TCM, and the dynamic switching between the TCM and the Cache can be realized under the condition of not increasing the RAM cost; the access to the Cache RAM and the TCM RAM can be realized simultaneously, the data access speed is obviously improved, and the data consistency is ensured.
Drawings
FIG. 1 is a flow chart illustrating a memory switching method according to an embodiment of the invention;
FIG. 2 is a flow chart of a second memory switching method according to an embodiment of the present invention;
FIG. 3 is a diagram illustrating a memory switching device according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a control module according to an embodiment of the present invention.
Detailed Description
In the embodiment of the invention, a Cache RAM is firstly configured into a TCM RAM; judging a memory to be accessed by the received request, and generating a request for accessing the Cache RAM when the memory to be accessed by the received request is the Cache RAM; when the type of the memory to be accessed by the received request is TCMRAM, a request for accessing TCM RAM is generated, and then the generated access request is sent to the corresponding RAM.
The following describes the implementation of the technical solution of the present invention in further detail with reference to the accompanying drawings and specific embodiments. Fig. 1 is a schematic flow chart of a memory switching method according to an embodiment of the invention, and as shown in fig. 1, the memory switching method of the embodiment includes the following steps:
step 101: configuring a Cache RAM into a TCM RAM;
configuring the Cache RAM into TCM RAM comprises: configuring part of Cache RAM into TCM RAM; or configuring all Cache RAMs into TCM RAMs; in practical application, a part or all of the Cache RAM can be selectively configured as TCM RAM according to actual requirements, for example, when the system has a high requirement on the data reading and writing speed and the related data volume is large, all of the Cache RAM can be configured as TCM RAM; when the system has general requirements on the data reading and writing speed and the related data amount is small, a part of Cache RAM can be configured into TCM RAM, and the address range of the Cache RAM to be configured into TCM RAM is determined according to actual requirements.
Specifically, the allocation algorithm of the Cache RAM is changed through changing the lockdown by way configuration of the Cache RAM, and the Cache RAM to be configured into the TCM RAM is not queried and allocated; and establishing one-to-one mapping between the TCM address space and the TCM RAM by using the Cache RAM which is not queried and distributed, and configuring the Cache RAM into the TCM RAM.
In the embodiment of the present invention, before configuring the Cache RAM as the TCM RAM, the method further includes: and transferring the data in the Cache RAM to be configured into the TCM RAM to the memory.
Step 102: judging a memory to be accessed by the received request, and executing the step 103 when the memory to be accessed by the received request is a Cache RAM; when the type of the memory to be accessed by the received request is TCM RAM, executing step 104;
step 103: generating a request for accessing the Cache RAM;
step 104: generating a request to access the TCM RAM;
in the embodiment of the invention, as the TCM address space and the TCM RAM are mapped one by one, namely accessing the TCM RAM is equivalent to 100% hit, a request for accessing the TCM RAM can be directly generated; if yes, a request for accessing the Cache RAM is generated to access the corresponding RAM; if there is no hit, access to the next level of storage structure is required.
Step 105: and sending the generated access request to the corresponding RAM.
In the embodiment of the invention, after the requests for accessing the Cache RAM and the TCM RAM are generated, the requests are respectively arbitrated to obtain the arbitrated requests and sent to the corresponding RAMs. In the embodiment of the invention, the TCM RAM and the Cache RAM can be accessed simultaneously, and the access control processes of the TCM RAM and the Cache RAM are mutually independent, so that the parallelism is improved. Under the condition of simultaneously accessing the TCM RAM and the Cache RAM, the TCM RAM and the Cache RAM may simultaneously return data, so that the data needs to be simultaneously processed, read operation and/or write operation of the data is completed, and data and response are returned.
In the embodiment of the present invention, the method further includes: and restoring the TCM RAM into a Cache RAM, and transferring data in the TCM RAM to a memory.
According to the embodiment of the invention, when a system needs a TCM RAM, a Cache RAM is configured into the TCM RAM; when the system does not need the TCM RAM any more, the TCM RAM can be restored to the Cache RAM; when the Cache RAM is configured as the TCM RAM, data in the Cache RAM can be transferred (flush) to the memory; when the TCM RAM is restored to the Cache RAM, data in the TCM RAM can be transferred to the memory, so that the consistency of the data is maintained.
Fig. 2 is a schematic flow chart of a second memory switching method according to an embodiment of the present invention, as shown in fig. 2, the memory switching method of the embodiment includes the following steps:
step 201: closing the Cache RAM;
step 202: transferring (flush) data of the TCM RAM to be configured into the TCM RAM to a memory;
step 203: configuring the Cache RAM into a TCM RAM;
in this step, all or part of the Cache RAM can be selectively configured as TCM RAM according to actual requirements;
step 204: opening a Cache RAM;
in this step, if the Cache is opened for the first time, the initialization of the Cache needs to be completed;
step 205: initializing a TCM RAM;
in this step, the TCM may be filled by transferring data from the memory through DMA; other initialization schemes may be used and are not limited in scope.
Step 206: receiving a request for accessing the TCM RAM and the Cache RAM, and accessing the corresponding TCM RAM and the Cache RAM according to the request;
specifically, according to the received request, an access request for accessing the TCM RAM and the Cache RAM is generated, and the corresponding TCM RAM and the corresponding Cache RAM are accessed.
Step 207: when the TCM is not required to be used, transferring data in the TCM to a memory;
in this step, if the data in the TCM needs to be saved, the data in the TCM can be moved to the memory through the DMA.
Step 208: and restoring the TCM RAM into a Cache RAM.
Step 209: and accessing the Cache RAM.
If the Cache RAM is to be configured as TCM RAM again, the process goes to step 201.
According to the embodiment of the invention, the existing Cache RAM is dynamically used as the TCM RAM, the RAM does not need to be newly added, the dynamic switching between the TCM RAM and the Cache RAM is realized under the condition that the RAM cost is not increased, the Cache RAM part and the TCM RAM part are accessed simultaneously, and the data access speed can be obviously improved. Because the address of the TCM RAM part is a part of the whole address space, the memory switching method provided by the embodiment of the invention can also ensure the consistency of data.
The embodiment of the present invention further provides a schematic structural diagram of a memory switching device, where the memory switching device is a Cache controller, fig. 3 is a schematic structural diagram of a memory switching device according to an embodiment of the present invention, and as shown in fig. 3, the memory switching device includes: a configuration module 31, a control module 32, wherein,
the configuration module 31 is configured to configure the Cache RAM into a TCM RAM;
in an embodiment of the present invention, the configuration module is specifically configured to: configuring part of Cache RAM into TCMRAM; alternatively, all Cache RAM is configured as TCM RAM. In practical application, part or all of the Cache RAM can be selectively configured as TCM RAM according to actual requirements, for example, when the system has a high requirement on the data reading and writing speed and the related data volume is large, all of the Cache RAM can be configured as TCM RAM; when the system has general requirements on the data reading and writing speed and the related data amount is small, a part of Cache RAM can be configured into TCM RAM, and the address range of the Cache RAM to be configured into TCM RAM is determined according to actual requirements.
Specifically, the configuration module 31 changes the allocation algorithm of the Cache RAM through the changed lockdown by way configuration of the Cache RAM, and does not query and allocate the Cache RAM to be configured as the TCM RAM; and establishing one-to-one mapping between the TCM address space and the TCM RAM by using the Cache RAM which is not queried and distributed, and configuring the Cache RAM into the TCM RAM.
In the embodiment of the present invention, before configuring the Cache RAM into the TCM RAM, the configuration module 31 is further configured to transfer data in the Cache RAM to be configured into the TCM RAM to the memory.
The control module 32 is configured to determine a memory to be accessed by the received request, and when the memory to be accessed by the received request is a Cache RAM, generate a request for accessing the Cache RAM; when the type of a memory to be accessed by the received request is TCM RAM, generating a request for accessing the TCM RAM; and sending the generated access request to the corresponding RAM.
Fig. 4 is a schematic structural diagram of a control module according to an embodiment of the present invention, as shown in fig. 4, the control module 32 includes a request receiving sub-module 321, a first request generating sub-module 322, a second request generating sub-module 323, a first arbitrating sub-module 324, a second arbitrating sub-module 325, and a response sub-module 326, wherein,
the request receiving submodule 321 is configured to receive a request, determine a memory to be accessed by the received request, notify the first request generating submodule 322 when the memory to be accessed by the received request is a Cache RAM, and notify the second request generating submodule 323 when the type of the memory to be accessed by the received request is a TCM RAM;
the first request generation sub-module 322 is configured to generate a request for accessing the Cache RAM when the received request is to access the Cache RAM; and sends the request for accessing the Cache RAM to the first arbitration sub-module 324;
the second request generation submodule 323 is configured to generate a request for accessing the TCM RAM when the type of the memory to be accessed by the received request is the TCM RAM; and sends the request to access TCM RAM to a second arbitration sub-module 325;
in the embodiment of the invention, as the TCM address space and the TCM RAM are mapped one by one, namely accessing the TCM RAM is equivalent to 100% hit, a request for accessing the TCM RAM can be directly generated; if yes, a request for accessing the Cache RAM is generated to access the corresponding RAM; if there is no hit, access to the next level of storage structure is required.
The first arbitration sub-module 324 is configured to perform arbitration processing on the received request for accessing the Cache RAM, and send the request subjected to arbitration processing to the Cache RAM;
the second arbitration sub-module 325 is configured to perform arbitration processing on the received request for accessing the TCM RAM, and send the arbitrated request to the TCM RAM;
the response submodule 326 is used for processing data returned by the TCM RAM and the Cache RAM, completing read operation and/or write operation of the data, and returning the data and response;
in the embodiment of the invention, after the requests for accessing the Cache RAM and the TCM RAM are generated, the requests are respectively arbitrated to obtain the arbitrated requests and sent to the corresponding RAMs. In the embodiment of the invention, the TCM RAM and the Cache RAM can be accessed simultaneously, and the access control processes of the TCM RAM and the Cache RAM are mutually independent, so that the parallelism is improved. Under the condition of simultaneously accessing the TCM RAM and the Cache RAM, the TCM RAM and the Cache RAM may simultaneously return data, so that the data needs to be simultaneously processed, read operation and/or write operation of the data is completed, and data and response are returned.
The configuration module 31 is further configured to: and restoring the TCM RAM into a Cache RAM, and transferring data in the TCM RAM to a memory.
In the embodiment of the present invention, the configuration module 31 configures the Cache RAM into the TCM RAM when the system needs the TCM RAM according to actual requirements; when the system does not need the TCM RAM any more, the TCM RAM can be restored to the Cache RAM; when the Cache RAM is configured as the TCM RAM, data in the Cache RAM can be transferred (flush) to the memory; when the TCM RAM is restored to the Cache RAM, data in the TCM RAM can be transferred to the memory, so that the consistency of the data is maintained.
The implementation functions of the processing modules in the memory switching device shown in fig. 3 and can be understood with reference to the related description of the memory switching method. Those skilled in the art will appreciate that the functions of the processing modules in the memory switching device shown in fig. 3 can be implemented by a program running on a processor, and can also be implemented by specific logic circuits, such as: may be implemented by a Central Processing Unit (CPU), Microprocessor (MPU), Digital Signal Processor (DSP), or Field Programmable Gate Array (FPGA).
In the embodiments provided in the present invention, it should be understood that the disclosed method and apparatus can be implemented in other ways. The above-described device embodiments are merely illustrative, for example, the division of the modules is only one logical functional division, and other division manners may be implemented in practice, such as: multiple modules or components may be combined, or may be integrated into another system, or some features may be omitted, or not implemented. In addition, the communication connections between the components shown or discussed may be through interfaces, indirect couplings or communication connections of devices or modules, and may be electrical, mechanical or other.
The modules described as separate parts may or may not be physically separate, and parts displayed as modules may or may not be physical modules, that is, may be located in one place, or may be distributed on a plurality of network modules; some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, all functional modules in the embodiments of the present invention may be integrated into one processing module, or each module may be separately used as one module, or two or more modules may be integrated into one module; the integrated module can be realized in a hardware form, and can also be realized in a form of hardware and a software functional module.
Those of ordinary skill in the art will understand that: all or part of the steps for realizing the method embodiments can be completed by hardware related to program instructions, the program can be stored in a computer readable storage medium, and the program executes the steps comprising the method embodiments when executed; and the aforementioned storage medium includes: various media that can store program codes, such as a removable Memory device, a Read-Only Memory (ROM), a magnetic disk, or an optical disk.
Alternatively, the integrated module according to the embodiment of the present invention may be stored in a computer-readable storage medium if it is implemented in the form of a software functional module and sold or used as a separate product. Based on such understanding, the technical solutions of the embodiments of the present invention may be essentially implemented or a part contributing to the prior art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the methods described in the embodiments of the present invention. And the aforementioned storage medium includes: a removable storage device, a ROM, a magnetic or optical disk, or other various media that can store program code.
The memory switching method and apparatus described in the embodiments of the present invention are only examples of the above embodiments, but are not limited thereto, and those skilled in the art should understand that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.
Claims (10)
1. A memory switching method, the method comprising:
configuring a Cache RAM (random access memory) into a tightly coupled memory TCM RAM;
judging a memory to be accessed by the received request, and generating a request for accessing the Cache RAM when the memory to be accessed by the received request is the Cache RAM; when the type of a memory to be accessed by the received request is TCM RAM, generating a request for accessing the TCM RAM;
and sending the generated access request to the corresponding RAM.
2. The method of claim 1, wherein the configuring the Cache RAM as a TCMRAM comprises:
configuring part of Cache RAM into TCM RAM; or,
and configuring all Cache RAMs as TCM RAMs.
3. The method according to claim 1 or 2, wherein the configuring the Cache RAM as TCM RAM comprises:
changing the allocation algorithm of the Cache RAM, and not inquiring and allocating the Cache RAM to be configured into the TCM RAM;
and establishing one-to-one mapping between the TCM address space and the TCM RAM by using the Cache RAM which is not queried and distributed, and configuring the Cache RAM into the TCM RAM.
4. The method of claim 3, further comprising: and transferring the data in the Cache RAM to be configured into the TCM RAM to the memory.
5. The method of claim 1, further comprising: and recovering the TCMRAM into a Cache RAM, and transferring data in the TCM RAM to a memory.
6. A memory switching apparatus, the apparatus comprising: a configuration module and a control module, wherein,
the configuration module is used for configuring the Cache RAM into a tightly coupled memory TCM RAM;
the control module is used for judging a memory to be accessed by the received request, and generating a request for accessing the Cache RAM when the memory to be accessed by the received request is the Cache RAM; when the type of a memory to be accessed by the received request is TCM RAM, generating a request for accessing the TCM RAM; and sending the generated access request to the corresponding RAM.
7. The apparatus of claim 6, wherein the configuration module is specifically configured to: configuring part of Cache RAM into TCM RAM; alternatively, all Cache RAM is configured as TCM RAM.
8. The apparatus according to claim 6 or 7, wherein the configuration module is specifically configured to:
changing the allocation algorithm of the Cache RAM, and not inquiring and allocating the Cache RAM to be configured into the TCM RAM;
and establishing one-to-one mapping between the TCM address space and the TCM RAM by using the Cache RAM which is not queried and distributed, and configuring the Cache RAM into the TCM RAM.
9. The apparatus of claim 1, wherein the configuration module is further configured to: and transferring the data in the Cache RAM to be configured into the TCM RAM to the memory.
10. The apparatus of claim 6, wherein the configuration module is further configured to: and restoring the TCM RAM into a Cache RAM, and transferring data in the TCM RAM to a memory.
Priority Applications (2)
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|---|---|---|---|
| CN201510791122.1A CN106708747A (en) | 2015-11-17 | 2015-11-17 | Memory switching method and device |
| PCT/CN2016/098115 WO2017084415A1 (en) | 2015-11-17 | 2016-09-05 | Memory switching method, device, and computer storage medium |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510791122.1A CN106708747A (en) | 2015-11-17 | 2015-11-17 | Memory switching method and device |
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| CN106708747A true CN106708747A (en) | 2017-05-24 |
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| CN201510791122.1A Withdrawn CN106708747A (en) | 2015-11-17 | 2015-11-17 | Memory switching method and device |
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| WO (1) | WO2017084415A1 (en) |
Cited By (1)
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| CN114758687A (en) * | 2022-06-15 | 2022-07-15 | 南京低功耗芯片技术研究院有限公司 | Self-adaptive Cache access circuit and implementation method thereof |
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| CN102298567A (en) * | 2010-06-28 | 2011-12-28 | 安凯(广州)微电子技术有限公司 | Mobile processor architecture integrating central operation and graphic acceleration |
| CN102073596A (en) * | 2011-01-14 | 2011-05-25 | 东南大学 | Method for managing reconfigurable on-chip unified memory aiming at instructions |
| CN103246542A (en) * | 2012-02-01 | 2013-08-14 | 中兴通讯股份有限公司 | Intelligent cache and intelligent terminal |
| CN104636268A (en) * | 2013-11-08 | 2015-05-20 | 上海芯豪微电子有限公司 | Reconfigurable caching organization structure |
| CN104951043A (en) * | 2014-03-26 | 2015-09-30 | 联发科技股份有限公司 | Wearable controller and associated control method |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114758687A (en) * | 2022-06-15 | 2022-07-15 | 南京低功耗芯片技术研究院有限公司 | Self-adaptive Cache access circuit and implementation method thereof |
| CN114758687B (en) * | 2022-06-15 | 2022-09-02 | 南京低功耗芯片技术研究院有限公司 | Self-adaptive Cache access circuit and implementation method thereof |
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| WO2017084415A1 (en) | 2017-05-26 |
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