CN106685561B - A kind of the bit synchronous mapping treatment method and device of band filtering - Google Patents

Abstract

The invention discloses a bit synchronous mapping processing method with filtering, comprising: obtaining the system clock number Pserver value according to the frame boundary value, sequentially storing the Pserver value corresponding to the previous k frames into the mean value filter to obtain the mean value Pserver_average; judging the current Whether the obtained mean value Pserver_average exceeds the tolerance range of the standard denominator value, and if so, replace the currently obtained mean value Pserver_average with the standard denominator value, use the described mean value Pserver_average as the denominator, and use the number of detected ODUk frame gaps as the numerator , according to the integral/differential rule to map the output ODUk frame gap. The invention also discloses a bit synchronous mapping processing device with filtering.

Description

Method and device for bit synchronous mapping processing with filtering

technical field

The invention relates to the field of optical transport network (OTN, Optical Transport Network) transmission chip communication, in particular to a bit-synchronous mapping (BMP, Bit-Synchronous Mapping) processing method and device with filtering.

Background technique

For chips that map OTN into frames, BMP is an important mapping method. The mapping method of BMP can follow the service rate of the client side. However, when BMP follows the service rate of the client side, it may cause the jitter of the service rate of the client side. Therefore, how to better overcome the jitter of the service rate of the client side, It has always been a difficult problem to be solved to be able to output service layer signals that meet the frequency offset requirements specified in the protocol.

At present, the method of completely following the service rate of the client side can be used to overcome the jitter of the service rate of the client side. This method can meet the requirements for the business that has been encapsulated by the General Framing Procedure (GFP, Generic Framing Procedure); The GFP-encapsulated business performed poorly. Another approach is to use a fixed step size to fit and follow. However, this method follows at a slower speed and also introduces low-frequency jitter.

For some services, such as Synchronous Digital Hierarchy (SDH, Synchronous Digital Hierarchy), Fiber Channel (FC, Fiber Channel), Infinite Bandwidth (IB, Infini-Band), Common Public Radio Interface (CPRI, Common Public Radio Interface), etc. directly through BMP When the method is mapped to an Optical Channel Data Unit (ODU, Optical Channel Data Unit), the jitter of the client-side service rate is a challenge to the mapping module. Therefore, using a specific method to reduce the jitter of the client-side service rate is important for improving the performance of the mapping chip and It is of great significance to the clock recovery of the chip.

Contents of the invention

In view of this, the embodiment of the present invention expects to provide a bit synchronous mapping processing method and device with filtering, which can make the ODUk frame rate accurately follow the client-side service within a certain range, reduce the jitter of the client-side service rate, and ensure output The rate of the ODUk frame complies with the protocol.

In order to achieve the above object, the technical solution of the embodiment of the present invention is achieved in this way:

An embodiment of the present invention provides a bit synchronous mapping processing method with filtering. The method includes: obtaining the value of the number of system clocks Pserver according to the frame boundary value, and storing the Pserver values corresponding to the previous k frames into the mean value filter in order to obtain the mean value Pserver_average;

Determine whether the currently obtained mean value Pserver_average exceeds the tolerance range of the standard denominator value, and if so, replace the currently obtained mean value Pserver_average with the standard denominator value, use the described mean value Pserver_average as the denominator, and detect the number of ODUk frame gaps obtained As a numerator, output ODUk frame gaps are mapped according to the integral/differential law.

In the above scheme, the acquisition of the Pserver value according to the frame boundary value includes: using the number of customer service gaps corresponding to the payload of an ODUk frame as the frame boundary value, counting the number of corresponding system clocks according to the frame boundary value, Get the Pserver value.

In the above solution, the standard denominator value is the standard natural vibration denominator obtained when the output frequency deviation is 0 ppm.

In the above solution, a frequency offset detection circuit is used to judge whether the currently obtained average value Pserver_average exceeds the tolerance range of the standard denominator value.

The embodiment of the present invention also provides a bit synchronous mapping processing device with filtering, the device includes:

The obtaining module is used to obtain the system clock number Pserver value according to the frame boundary value, and the Pserver value corresponding to the previous k frames is stored in the mean value filter in order to obtain the mean value Pserver_average;

Discrimination module, is used for discriminating whether the mean value Pserver_average that obtains currently exceeds the tolerance range of standard denominator value;

A replacement module, used to replace the currently obtained mean value Pserver_average with the standard denominator value when the judgment module judges that it exceeds the tolerance range of the standard denominator value;

The mapping output module is configured to use the mean value Pserver_average as a denominator and the number of detected ODUk frame gaps as a numerator, and map and output the ODUk frame gaps according to the integral/differential rule.

In the above scheme, the acquisition module obtains the Pserver value according to the frame boundary value, including: using the number of customer service gaps corresponding to an ODUk frame payload as the frame boundary value, and counting the corresponding system clock according to the frame boundary value number to get the Pserver value.

In the above solution, the standard denominator value is the standard natural vibration denominator obtained when the output frequency deviation is 0 ppm.

In the above solution, a frequency offset detection circuit is used to judge whether the currently obtained average value Pserver_average exceeds the tolerance range of the standard denominator value.

The bit synchronous mapping processing method and device with filtering provided by the embodiments of the present invention obtain the value of the number of system clocks Pserver according to the frame boundary value, and store the Pserver values corresponding to the previous k frames into the average value filter in order to obtain the average value Pserver_average; Whether the currently obtained mean value Pserver_average exceeds the tolerance range of the standard denominator value, and if so, replace the currently obtained mean value Pserver_average with the standard denominator value, use the described mean value Pserver_average as the denominator, and use the detected number of ODUk frame gaps as The numerator maps the output ODUk frame gaps according to the integral/differential (sigma/delta) law. In this way, not only can the output ODUk frame gap follow the client-side service within the range that meets the frequency offset requirements, but also eliminate the jitter of the client-side service rate to the greatest extent, so as to ensure that the output ODUk frame rate does not exceed the protocol specified frequency offset requirements.

Description of drawings

Fig. 1 is a schematic diagram of the implementation flow of the bit synchronous mapping processing method with filtering in the embodiment of the present invention;

FIG. 2 is a schematic diagram of the implementation flow of a k-order mean filter according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of the composition and structure of a bit synchronous mapping processing device with filtering according to an embodiment of the present invention.

Detailed ways

In order to understand the characteristics and technical contents of the embodiments of the present invention in more detail, the implementation of the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. The attached drawings are only for reference and description, and are not intended to limit the present invention.

As shown in Figure 1, the implementation process of the bit synchronous mapping processing method with filtering in the embodiment of the present invention includes the following steps:

Step 101: Obtain the value of the number of system clocks Pserver according to the frame boundary value, and store the Pserver values corresponding to the previous k frames into the average value filter in order to obtain the average value Pserver_average;

Wherein, the acquisition of the system clock number Pserver value according to the frame boundary value specifically includes: taking the number of customer service gaps corresponding to an ODUk frame payload as the frame boundary value, and counting the corresponding system clocks according to the frame boundary value number to get the Pserver value.

Here, k in the ODUk represents the level of the ODU, and the value of k can be 0, 1, 2, 2e, 3, 4. Currently, ODU1, ODU2, and ODU3 have been defined in the protocol.

Step 102: judging whether the currently obtained mean value Pserver_average exceeds the tolerance range of the standard denominator value, if exceeded, then perform step 103, otherwise, perform step 104;

Here, a frequency offset detection circuit is used to determine whether the currently obtained mean value Pserver_average exceeds the tolerance range of a standard denominator value; the standard denominator value is a standard natural vibration denominator obtained when the output frequency offset is 0 ppm.

Step 103: Replace the currently obtained mean value Pserver_average with the standard denominator value.

Step 104: Using the mean value Pserver_average as a denominator and the number of detected ODUk frame gaps as a numerator, map and output the ODUk frame gaps according to the integral/differential rule.

In step 101 in FIG. 1, the Pserver values corresponding to the previous k frames are sequentially stored in the mean value filter. The mean value filter can be completed by using a k-order mean value filter. In the embodiment of the present invention, the k-order mean value filter is used to realize the filtering process. As shown in Figure 2, the specific implementation process is as follows:

Store the Pserver values corresponding to the previous k frames: Pserver0, Pserver1...Pserver(k-1) into the mean value filter in turn, and output the mean value Pserver_average in turn, and save the remainder Pserver_remain of the mean value at the same time; , the value range of k can be any natural number.

Here, when a new frame Pserver(k) is generated, since the mean filter has a capacity of k frames, Pserver0 will be removed from the mean filter, moved into Pserver(k), and the previous Pserver_remain value added Continue to calculate the mean, and then update the output mean Pserver_average and remainder Pserver_remain.

Since the obtained average value Pserver_average is affected by the first k Pserver values, it is equivalent to smoothing the jitter of the first k Pserver values, and each average value Pserver_average will be updated, so that the continuity of the Pserver value is guaranteed, and the remainder Pserver_remain The existence of ensures that the calculation of the Pserver value will not be lost in quantity.

In practical applications, when encountering some special circumstances, such as: line faults, alarms, etc., resulting in a large frequency deviation of the customer service rate, the rate of the ODUk frame gap mapped and output by step 104 in Figure 1 may exceed the protocol specification In this case, the ODUk frame notch cannot be directly output, and must be judged by a frequency offset detection circuit to output an ODUk frame notch that meets the frequency offset requirements of the protocol.

The following is a further detailed introduction to the technical solution of how to pass through the frequency offset detection circuit provided by the embodiment of the present invention to determine the obtained mean value Pserver_average:

First, take the number of gaps in the ODUk frame (for example, the bit width of the ODUk frame is 32bit, and the number of gaps in the corresponding ODUk frame is 3824) as the numerator, and when the output frequency offset is 0ppm, use the formula: 0ppm Natural vibration denominator = system clock * bit width * 3824/ODUk frame rate, calculate a standard natural vibration denominator;

Here, the gap in the ODUk frame reflects and affects the rate of the ODUk frame to a certain extent. The larger the gap in the ODUk frame, the lower the rate of the ODUk frame, and vice versa.

Secondly, compare each obtained mean value Pserver_average with the standard natural vibration denominator. When the currently obtained mean value Pserver_average exceeds the tolerance range of the standard denominator value, it is considered that the ODUk frame gap generated by the currently obtained mean value Pserver_average will exceed If the frequency offset conforms to the agreement, replace the currently obtained average value Pserver_average with the standard denominator value, and output the ODUk frame gap without frequency offset.

Here, the frequency offset that conforms to the agreement may be a frequency offset of 100ppm; however, in the detection of this overfrequency offset, how to determine the tolerance range of the standard denominator value is particularly critical. The tolerance range of the standard denominator value determines the accuracy of frequency offset detection. Since the standard denominator value calculated according to the above formula is not necessarily an integer, it is necessary to enlarge the numerator and denominator at the same time in proportion, and at the same time, the frame boundary is also enlarged by the same multiple.

Wherein, the tolerance range of the standard denominator value is set by the user, and depends on the frequency offset corresponding to each additional or missing system clock, the average value Pserver_average calculated by the mean value filter, the standard denominator value, and the value in compliance with the protocol. Frequency deviation 100ppm.

For example, if the frequency offset corresponding to one more or one less system clock is 2.8ppm, then when the average value Pserver_average calculated by the averaging filter is greater than the standard denominator value or exceeds 35 system clocks, it is considered to exceed the frequency specified in the agreement. Partial 100ppm. At this time, the frequency offset corresponding to 35 system clocks is 2.8*35=98ppm, and the frequency offset corresponding to 36 system clocks is 2.8*36=100.8ppm, because 100.8ppm exceeds 100ppm, but 98ppm does not exceed 100ppm, Therefore, the tolerance range for the standard denominator value in this case is 35 system clocks.

How to improve the accuracy of frequency offset detection in the present invention will be further described in detail below with a specific embodiment.

In the embodiment of the present invention, assuming that the system clock is 360M, the bit width corresponding to the ODUk frame gap of the client-side service output is 32bit, and the BMP mapping method is used to map to ODU0, and the rate of ODU0 is 1.24416G. According to the above parameters, calculate The standard denominator value at this time=3824*360*32/(1000*1.24416)=35407.407, that is, corresponding to the 360M clock, each frame of ODU0 corresponds to about 35407 system clocks.

According to the sigma/delta rule, 3824 is used as the numerator and 35407 is used as the denominator, and the ODUk frame gap is output following the client-side service. At this time, the frequency offset corresponding to one more or one less system clock is 28.24ppm. Obviously, this kind of following is too "rough"; at this time, the numerator and denominator are enlarged by 10 times at the same time, and the frame boundary is also enlarged by 10 times, and the value of Pserver corresponding to the input of the filter is correspondingly increased (by increasing the value of Pserver(k) The number k is used to increase the value of Pserver), in this way, the frequency deviation corresponding to one more or one less system clock is 2.8ppm. The method improves the detection accuracy of the frequency offset by enlarging the numerator and the denominator (period of sampling the denominator).

Here, how to specifically calculate the client-side service output ODUk frame gap according to the sigma/delta rule belongs to the prior art, and will not be repeated here.

After the above processing, the output ODUk frame gap follows the client-side service within the range that meets the frequency offset requirements, and eliminates the jitter of the client-side service to the greatest extent. When the customer's service layer signal exceeds the frequency deviation, it can also output ODUk signals that meet the frequency deviation requirements. Compared with the existing BMP circuit, the jitter can be removed better by increasing the value of the filter k, and at the same time, the high-precision frequency deviation detection ensures the frequency deviation requirement of the output.

In order to realize the above method, the embodiment of the present invention also provides a bit synchronous mapping processing device with filtering, as shown in Figure 3, the device includes an acquisition module 31, a discrimination module 32, a replacement module 33, and a mapping output module 34; wherein ,

The obtaining module 31 is used to obtain the system clock number Pserver value according to the frame boundary value, and the Pserver value corresponding to the previous k frames is stored in the mean value filter in order to obtain the mean value Pserver_average;

Discrimination module 32, is used for discriminating whether the mean value Pserver_average that obtains currently exceeds the tolerance range of standard denominator value;

A replacement module 33, configured to replace the currently obtained mean value Pserver_average with the standard denominator value when the judgment module 32 judges that it exceeds the tolerance range of the standard denominator value;

The mapping output module 34 is configured to use the mean value Pserver_average as a denominator and the number of detected ODUk frame gaps as a numerator, and map and output the ODUk frame gaps according to the integral/differential rule.

Here, obtaining the Pserver value according to the frame boundary value in the acquisition module 31 includes: taking the number of customer service gaps corresponding to an ODUk frame payload as the frame boundary value, and counting the number of corresponding system clocks according to the frame boundary value number to get the Pserver value.

Here, a frequency offset detection circuit is used to judge whether the currently obtained mean value Pserver_average exceeds the tolerance range of the standard denominator value.

Wherein, the standard denominator value is a standard natural vibration denominator obtained when the output frequency deviation is 0 ppm.

In practical applications, the acquisition module 31, the discrimination module 32, the replacement module 33, and the mapping output module 34 can be composed of a central processing unit (CPU, Central Processing Unit), a microprocessor (MPU, Micro Processor Unit), Digital Signal Processor (DSP, Digital Signal Processor), or Field Programmable Gate Array (FPGA, Field Programmable Gate Array).

The present invention obtains the Pserver value according to the frame boundary value, stores the Pserver values corresponding to the previous k frames into the mean value filter in turn, and obtains the mean value Pserver_average; judges whether the currently obtained mean value Pserver_average exceeds the tolerance range of the standard denominator value, and if so, uses the The standard denominator value replaces the currently obtained mean value Pserver_average, using the mean value Pserver_average as the denominator, using the number of detected ODUk frame gaps as the numerator, and mapping and outputting the ODUk frame gaps according to the sigma/delta rule. In this way, not only can the output ODUk frame notch follow the client-side service within the range that meets the frequency offset requirements, but also eliminate the jitter of the client service rate to the greatest extent, so as to ensure that the output ODUk frame rate does not exceed the frequency specified by the protocol. partial request.

The above description is only a preferred embodiment of the present invention, and is not used to limit the protection scope of the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention shall be included in the within the protection scope of the present invention.

Claims (6)

1. A bit synchronous mapping processing method with filtering, is characterized in that, described method comprises: Obtain the value of the number of system clocks Pserver according to the frame boundary value, and store the Pserver values corresponding to the previous k frames in the mean value filter in order to obtain the mean value Pserver_average, where k is a natural number; Determine whether the currently obtained mean value Pserver_average exceeds the tolerance range of the standard denominator value, and if so, replace the currently obtained mean value Pserver_average with the standard denominator value, use the described mean value Pserver_average as the denominator, and detect the number of ODUk frame gaps obtained As a numerator, map the output ODUk frame gap according to the integral-differential rule; Wherein, the frame boundary value refers to the number of customer service gaps corresponding to an ODUk frame payload; The standard denominator value is the standard self-oscillating denominator obtained when the output frequency deviation is 0 ppm, and the self-oscillating denominator=system clock×the bit width of the ODUk frame×the number of gaps in the ODUk frame÷the rate of the ODUk frame. 2. The method according to claim 1, wherein said obtaining the Pserver value according to the frame boundary value comprises: counting the number of corresponding system clocks according to the frame boundary value to obtain the Pserver value. 3. The method according to claim 1, characterized in that a frequency offset detection circuit is used to judge whether the currently obtained mean value Pserver_average exceeds the tolerance range of the standard denominator value. 4. A bit synchronous mapping processing device with filtering, it is characterized in that, described device comprises: The obtaining module is used to obtain the system clock number Pserver value according to the frame boundary value, and the Pserver value corresponding to the previous k frames is stored in the mean value filter in sequence to obtain the mean value Pserver_average, and k is a natural number; Discrimination module, is used for discriminating whether the mean value Pserver_average that obtains currently exceeds the tolerance range of standard denominator value; A replacement module, used to replace the currently obtained mean value Pserver_average with the standard denominator value when the judgment module judges that it exceeds the tolerance range of the standard denominator value; The mapping output module is used to use the mean value Pserver_average as a denominator, and the number of detected ODUk frame gaps as a numerator, and map and output ODUk frame gaps according to the integral-differential rule; Wherein, the frame boundary value refers to the number of customer service gaps corresponding to an ODUk frame payload; The standard denominator value is the standard self-oscillating denominator obtained when the output frequency deviation is 0 ppm, and the self-oscillating denominator=system clock×the bit width of the ODUk frame×the number of gaps in the ODUk frame÷the rate of the ODUk frame. 5. The device according to claim 4, wherein the acquisition module acquires the Pserver value according to the frame boundary value, comprising: counting the number of corresponding system clocks according to the frame boundary value to obtain the Pserver value. 6 . The device according to claim 4 , wherein a frequency offset detection circuit is used to judge whether the currently obtained mean value Pserver_average exceeds the tolerance range of the standard denominator value.