CN106683171A - GPU multi-thread texture mapping SystemC modeling structure - Google Patents
GPU multi-thread texture mapping SystemC modeling structure Download PDFInfo
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- CN106683171A CN106683171A CN201611140688.9A CN201611140688A CN106683171A CN 106683171 A CN106683171 A CN 106683171A CN 201611140688 A CN201611140688 A CN 201611140688A CN 106683171 A CN106683171 A CN 106683171A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T17/00—Three dimensional [3D] modelling, e.g. data description of 3D objects
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- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
Abstract
The invention belongs to the field of computer graphics, and especially relates to a GPU multi-thread texture mapping SystemC modeling structure. The structure comprises a texture parameter obtaining and Level calculation unit (1), a texel address calculation unit (2), a data assembly and task distribution unit (3), a texel data extraction and format conversion unit (4), a texel filtering and texel data normalization unit (5) and a texture mapping state and control parameter unit (6). The structure can avoid the tedious circuit signal design, quickly evaluates the framework of a large-scale hardware system, is suitable for the early system-level design and development of a circuit, and provides an effective reference for the same type of products and functions.
Description
Technical field
The invention belongs to area of computer graphics, more particularly to a kind of GPU multithreadings texture mapping SystemC modeling knot
Structure.
Background technology
Texture mapping is that the 3D patterned surfaces produced to computer stick various texture images, to improve the true of figure
Sense.Texture mapping belongs to the processes pixel stage, for speed-up computation intensive and storage access intensive texture operation, one
Main computing is exactly to find out screen space pixel (x, y, z) in the texel place memory space corresponding to texture space
Then the texel color chosen is filtered by address (i.e. texel address), and replaces screen space with this value
Pixel color, so as to complete texture mapping.That is, the pixel coordinate of screen space is transformed into into parameter space (u, v) first,
Texture image space is transformed into by parameter space again, its feature is exactly computationally intensive, and has requirement of real-time.
For the software/hardware coordinate design and co-verification (Co-verification) of system, analog rate is weighed very much
Will.In order to improve efficiency, it is necessary to enable effective hardware/software system simulation in the early stage of design process.In order to overcome
In the limitation that traditional RTL modeling speed is slow, and in view of SystemC support hardware/software co-design, can describe by
The structure of the complication system of hardware and software composition, supports the description under C++ environment to hardware, software and interface.Make herein
Different abstraction level modelings are carried out with the transaction-level model (Transaction Level Models, TLM) of SystemC2.0.
SystemC most basic construction unit is module (module), and module can be comprising other modules or process (process) and side
Method (method), by adding sequential details wherein, it is possible to achieve functional module, communication module, software module and hardware mould
Block is abstract on various system-level levels, the concept of the data type description, clock and time delay of its port introduced and signal,
Can be with the performance of assessment system, the structure of searching system.
The content of the invention
The purpose of the present invention is：
A kind of GPU multithreadings texture mapping SystemC modeling structure is provided, is accessed for speed-up computation intensive and storage
The texture operation of intensive, realizes " multiple components " inside " texture operations of 4 fragment " and each fragment
Operation executed in parallel, loaded down with trivial details circuit signal can be avoided to design, the framework of the extensive hardware system of rapid evaluation.
The present invention solution be：
A kind of GPU multithreadings texture mapping SystemC modeling structure, including：
Parametric texture is obtained and the distribution of Level computing units (1), texel address calculation (2), data assembling and task
Unit unit (3), texel data are extracted and format conversion unit (4), texel filtration, texel data normalization unit (5) and stricture of vagina
Reason mapping status and control parameter unit (6)；
Parametric texture acquisition and the input interface of Level computing units (1) output interface and texel address calculation (2)
It is connected, parametric texture obtains the texture Quad being input into according to unified dyeing volume array (USA) with Level computing units (1)
The texture cell id information of request, from texture mapping state and control parameter unit (6) read texture mapping type mapType and
The texture image resolution parameter width of filtered model filterMode, baselevel and baselevel layer, height,
Depth, lod_bias parameter, and and unified dyeing volume array input texture Quad request Quad_mask and coordinate variable s,
T, r are substituted in Level calculation process together, obtain the value of the level layers of resident texture, and from texture mapping state and control ginseng
Counting unit (6) reads width, height, depth of level layer texture image resolution ratio parameters, by the resident texture
The value of level layers, the width of level layer texture image resolution ratio parameters, height, depth, texture mapping type
Texture Quad request coordinate variable s, the t of mapType, texture filtering pattern filterMode and unified dyeing volume array input,
R, inputs to texel address calculation (2)；
The unified chromosome that texel address calculation (2) is obtained according to parametric texture and Level computing units (1) are input into
The texture Quad request coordinate variable s of array input, the width of t, r and level layer texture image resolution ratio parameter, height,
Depth, calculates the texture coordinate for specifying Level layers first, obtains Level laminated striations element coordinate address (i0, j0, k0), (i1, j
1,k1)；Secondly, by texel coordinate address (i0, j0, k0), (i1, j 1, k1) brings wrap moulds into texel address calculation (2)
During formula is to the Coordinate Adjusting algorithm of Level layers, obtain each small component wrap adjustment process after texture coordinate address (i0, j0,
K0), (i1, j 1, k1)；Again, texture filtering pattern filterMode and stricture of vagina of the texel address calculation (2) according to input
Reason map type mapType, carries out texel sampling processing, and produces 1 to n texel coordinate to texture coordinate；And according to wrap
Pattern is processed to multiple texel coordinates to the Coordinate Adjusting algorithm of Level layers, finally, and is sampled final comprising texel
The texel sample request of coordinate is exported to data assembling and task allocation unit (3)；
Data assembling and task allocation unit (3), according to the ready states of current external Texture memory, if ready
State is 1, always allows this unit to send texel sample request to texture storage L1TCache；Otherwise, by whole texture flowing water
Line is stagnated；Meanwhile, carried out by sending texel sample request to external texture memorizer with the interface of external texture memorizer
Ask addressing to process, and arrange request to complete mark, data assembling is constantly detected by internal process with task allocation unit (3)
What external texture memorizer was returned completes identification-state, if returned data is effectively, after the process of external texture memorizer
Request results are ranked up according to the sequencing of request, are exported and are extracted to texel data and format conversion unit (4)；
Texel data is extracted and format conversion unit (4), is first read with control parameter unit (6) from texture mapping state and is worked as
Front texture requests in texture Cache internal storage format internalformat, according to the storage that external texture memorizer is returned
Form, from texel data extract and the request results that obtain of format conversion unit (4) in extract R in texture format, G, B,
Different internal forms are converted to the color data of RGBA forms by A, Lum, Int and Depth, and result is exported and filtered to texel
Operation, texel data normalization unit (5)；
Texel filter operation, texel data normalization unit (5), when texture filtering pattern is to close on sampling configuration, mean
And need not perform filter operation, such texture requests are in filtering module by " transparent transmission "；Otherwise, need according to texture mistake
Multiple texture sampling values are calculated by linear, or bilinearity, or Tri linear interpolation, obtain one by filter pattern filterMode
Result is carried out texel data normalization by the texel value after filtration, finally, by the result by between unified dyeing array
Interface function export to outside unified dyeing array.
It is an advantage of the invention that：
The present invention carries out transaction-level Cycle accurate modeling using SystemC, while describe software with C Plus Plus, can be with
So that the hardware and software modeling of system design is used uniformly across C Plus Plus to realize；Method for designing based on SystemC is supported to set
Meter person is modeled in different levels, reduces size of code and workload, there is provided higher work efficiency；Realize " 4
Inside the texture operation of fragment " and each fragment, the operation executed in parallel of " multiple components ", can avoid loaded down with trivial details
Circuit signal design, the framework of the extensive hardware system of rapid evaluation, it is adaptable to circuit early stage system level design exploitation, it is right
Like product, functional realiey are provided and are effectively referred to.
Description of the drawings
Fig. 1 is a kind of theory diagram of GPU multithreadings texture mapping SystemC modeling structure in the present invention；
Fig. 2 is that block diagram is realized in the transaction-level modeling of texture map unit of the present invention；
Fig. 3 is the map logo explanation schematic diagram to Fig. 2 and Fig. 3；
Fig. 4 is level calculation process schematic diagrams；
Annotation：
1st, Quad is imperfect：Refer to that quad contains the fragment less than 4, can be by the significance bit of quad_mask
Number is learnt；
2nd, enable mipmap：Reduce filter to be arranged to use mipmap, its corresponding filtered model of correspondence has：
Nearest_mipmap_nearest, linear_mipmap_nearest, nearest_mipmap_linear, and linear_
mipmap_linear；
Fig. 5 is that Level texel coordinates calculate schematic diagram under texture Nearest patterns；
Fig. 6 is that Level texel coordinates calculate schematic diagram under texture Linear patterns；
Fig. 7 is adjustment schematic diagram of the wrap patterns to Level layer texel coordinate I.
Fig. 8 is texel filtering process figure.
Specific embodiment
Below in conjunction with the accompanying drawings and specific embodiment, technical scheme is clearly and completely stated.Obviously,
The embodiment stated only is a part of embodiment of the invention, rather than the embodiment of whole, based on the embodiment in the present invention,
Those skilled in the art are not making the every other embodiment obtained by creative work premise, belong to the guarantor of the present invention
Shield scope.
The present invention provides a kind of GPU multithreadings texture mapping SystemC modeling structure, as shown in figure 1, including：
Parametric texture is obtained and the distribution of Level computing units (1), texel address calculation (2), data assembling and task
Unit unit (3), texel data are extracted and format conversion unit (4), texel filtration, texel data normalization unit (5) and stricture of vagina
Reason mapping status and control parameter unit (6)；
Parametric texture acquisition and the input interface of Level computing units (1) output interface and texel address calculation (2)
It is connected, parametric texture obtains the texture Quad being input into according to unified dyeing volume array (USA) with Level computing units (1)
The texture cell id information of request, from texture mapping state and control parameter unit (6) read texture mapping type mapType and
The texture image resolution parameter width of filtered model filterMode, baselevel and baselevel layer, height,
Depth, lod_bias parameter, and and unified dyeing volume array input texture Quad request Quad_mask and coordinate variable s,
T, r are substituted in Level calculation process as shown in Figure 4 together, are mainly included：Texture coordinate pretreatment, scalar are calculated, λ meters
Calculate and mimap layers level is calculated, obtain the value of the level layers of resident texture, and from texture mapping state and control parameter unit
(6) width, height, depth of level layer texture image resolution ratio parameters are read, by the level layers of the resident texture
Value, the width of level layer texture image resolution ratio parameters, height, depth, texture mapping type mapType, texture mistake
Texture Quad request coordinate variable s, t, the r of filter pattern filterMode and unified dyeing volume array input, inputs to texel ground
Location computing unit (2)；
The unified chromosome that texel address calculation (2) is obtained according to parametric texture and Level computing units (1) are input into
The texture Quad request coordinate variable s of array input, the width of t, r and level layer texture image resolution ratio parameter, height,
Depth, calculates the texture coordinate for specifying Level layers first, and specific algorithm process as shown in Figure 5 and Figure 6, obtains Level layers
Texel coordinate address (i0, j0, k0), (i1, j1, k1)；Secondly, texel address calculation (2) by texel coordinate address (i0,
J0, k0), (i1, j1, k1) is brought in " Coordinate Adjusting algorithm of the wrap patterns to Level layers " as shown in Figure 7, obtains each
Texture coordinate address (i0, j0, k0) after small component wrap adjustment process, (i1, j1, k1)；Again, texel address calculation
(2) texture filtering pattern filterMode and texture mapping type mapType according to input, carries out texel to texture coordinate and adopts
Sample process (texel filtered model of the texel sampling rule referring to the openGL2.0 of table 1), and 1 is produced to n texel coordinate；And
According to wrap patterns as shown in Figure 7 mentioned above to the Coordinate Adjusting algorithm of Level layers to multiple texel coordinates at
Reason, finally, and the final texel sample request comprising texel sample coordinate is exported to data assembling and task allocation unit
(3)；
Table 1
Note：
It is arranged to nearest patterns when amplifying to filter and reduce filter, then texture mapping operation is only used
The image of baselevel；Nearest_mipmap_nearest (closing on sampling) and linear_mipmap_nearest are (linear
Sampling) d mipmap layer data is all used, the value of d, k is from texture mapping state and control parameter unit；nearest_
Mipmap_linear and linear_mipmap_linear need to obtain 2 texture values for closing on mipmap layers, by taking 2D as an example,
Nearest_mipmap_linear needs respectively to read 1 texel value from 2 mipmap layers, performs once linear and insert between 2 layers
Value, linear_mipmap_linear need respectively to read 4 texel values, after performing bilinear interpolation, 2 from 2 mipmap layers
Result between individual layer performs 1 sublinear interpolation again.
Data assembling and task allocation unit (3), according to the ready of current external Texture memory (texture L1Cache)
State, if ready states are 1, always allows this unit to send texel sample request to texture storage L1TCache；Otherwise,
Whole texture pipeline is stagnated；Meanwhile, by texel sampling being asked with the interface of external texture memorizer (texture L1Cache)
Ask and send external texture memorizer to and make requests on addressing process, and request is set and complete mark, data assembling and task are distributed
By internal process, unit (3) constantly detects that what external texture memorizer returned completes identification-state, if returned data is effectively,
Then the request results after external texture memorizer (texture L1Cache) process are ranked up according to the sequencing of request, it is defeated
Go out and extract and format conversion unit (4) to texel data；
Texel data is extracted and format conversion unit (4), is first read with control parameter unit (6) from texture mapping state and is worked as
Front texture requests are in texture Cache internal storage format internalformat (with reference to the inner vein lattice that OpenGl2.0 is supported
Formula), according to the storage format (as shown in table 2) that external texture memorizer (texture L1Cache) is returned, extract from texel data and
R, G, B, A, Lum, Int and the Depth extracted in texture format in the request results that format conversion unit (4) is obtained, according to
Different internal forms are converted to table 3 color data of RGBA forms, and result is exported and returned to texel filter operation, texel data
One changes unit (5)；
The texel data form of 2 Cache of table outputs
Transformational rule of 3 shades of colour of table to RGBA
| Basic internal form | R | G | B | A |
| Alpha | 0 | 0 | 0 | Alpha |
| Luminance | Lum | Lum | Lum | 1 |
| Luminance_alpha | Lum | Lum | Lum | Alpha |
| Intensity | Int | Int | Int | Int |
| RGB | R | G | B | 1 |
| RGBA | R | G | B | A |
Texel filter operation, texel data normalization unit (5), when texture filtering pattern is to close on sampling configuration, mean
And need not perform filter operation, such texture requests are in filtering module by " transparent transmission "；Otherwise, need according to texture mistake
Multiple texture sampling values are calculated by linear, or bilinearity, or Tri linear interpolation, obtain one by filter pattern filterMode
Result is carried out texel data normalization by the texel value after filtration, i.e. for RGBA forms, each component is the input of this module
The texel data of 8bit, each component width of the texel data after normalization operation are 32bit, and span is [0,1]
Between, finally, the result is exported to outside unified dyeing array by the interface function between unified dyeing array.
Embodiment
Technical scheme is described in further detail with specific embodiment below in conjunction with the accompanying drawings.
As shown in figure 1, a kind of GPU multithreadings texture mapping SystemC modeling structure, using SystemC language and
Transaction Level Modeling (TLM, transaction-level modeling) method, in model, each functional module passes through transaction-level interface
Function rather than by hardware signal connection come realize communicate, all contain inside modules respective independent, parallel
The process of execution, common event triggering --- the rising edge clock of each process only one of which, is carried out to texture map unit
The hardware modeling of Cycle accurate；Each process can call the function in the transaction-level interface of respective module, mutually to transmit
Information.
Map unit includes that parametric texture is obtained and Level computing units (1), texel address calculation (2), texture are deposited
Storage accesses data assembling and task allocation unit unit (3), texel data is extracted and format conversion unit (4), texel filter behaviour
Work, texel data normalization (5) and texture mapping state and control parameter unit (6).
As shown in figure 3, parametric texture is obtained and Level computing units (1), for what is be input into according to USA texture requests
" texture cell ID " of QUAD obtains associated texture parameter with control parameter unit from (6) texture mapping state, determines that texture reflects
Type (maptype) is penetrated, the value of level levels is then calculated, is determined filtered model (filtermode) of texture etc..Such as Fig. 2
It is shown, (level_compute_Thread) realized with flowing water pipeline_0 using " Level calculation procedures " during modelling,
Wherein USA requests identification information (usa_access_request) is crossed and is called usa_access_tau_export interface function realities
It is existing, when " Level calculation procedures " detect usa_access_request it is effective when, by pointer data_pointer_level_
Compute points to the data first address of USA input requests, is that " Level calculation procedures " provides necessary data message, " Level
Calculation procedure " mainly completes algorithm function mainly to be had：Texture coordinate pretreatment (computer_texture_coordinate),
Scalar calculates (computer_scalar), λ and calculates (computer_lambda) and mimap layers level calculating (compute_
Level_and_alpha) etc., and last operation result is input to into pipeline_0 and realizes that water operation passes to next stage
Texel address calculation (2)；
As shown in figure 4, texel address calculation (2), for being obtained and Level computing units according to (1) parametric texture
The texture mapping type (maptype) of input, filtered model (filtermode) calculate the texture coordinate for specifying level；According to
Wrap mode are further processed to the normalization texture coordinate beyond [0,1] scope；In specified filter mode, 1 is produced
To n texel coordinate；Then multiple texel coordinates are processed according to wrap mode.As shown in Fig. 2 adopting during Modeling and Design
(address_compute_Thread) realized with flowing water pipeline_1 with " texel address computation process ", wherein when " texel
When address computation process " detects flowing water pipeline_0 [n-1] non-NULL, the data pointer of pipeline_0 [n-1] is transmitted
To texel address computation pointer (data_pointer_address_compute), it is that " texel address computation process " provides necessity
Data message, " texel address computation process " mainly completes algorithm function mainly to be had：Coordinate wrap mode process (wrap_
Mode_adjust), filtration system calculates (compute_whd_prameter), the sampling of texel address and calculates (compute_
Level_coordinate) etc., and last operation result being input to pipeline_1, to realize that water operation is passed to next
Level texture storage accesses data assembling and task allocation unit unit (3)；
Texture storage accesses data assembling and task allocation unit unit (3), as shown in Fig. 2 for working as Texture memory
The ready states of (L1 texture cache), if ready states be 1, by cache_read_port always allow this unit to
Texture memory sends texel sample request (many texel coordinates of a quad).Otherwise, whole texture pipeline is stagnated；Together
When, by the interface function with Texture memory (L1 texture cache), cache_return_ is constantly detected by process
The effective situation of export interface function returning results, if returned data effectively, result is entered according to the sequencing of request
Go and sort, and result is assigned to into next stage by data pointer data_pointer and give texel data extraction and form conversion
The data pointer data_pointer_format_convert of unit (4)；
Texel data extract and format conversion unit (4), for the internal form internalformat according to texture from
The value of each component of texel is extracted in the 32bit texel datas that cache is obtained, different internal forms are converted to into the face of RGBA forms
Chromatic number evidence.As shown in Fig. 2 adopting " texel address computation process " (format_convert_Thread) during Modeling and Design and stream
Water pipeline_2 is realized, wherein when " texel form conversion process " is detected by cache_return_export interface functions
When the variable cache_return_request of return is effective, then data pointer data_pointer_format_ is read
The data of convert, are that " texel form conversion process " provides necessary data message, and " texel form conversion process " is main complete
Mainly have into algorithm function：Texture buffer status supplemental characteristic, stricture of vagina are read by texture_parameter_read_port
Plain form RGBA conversions (format_convert) calculating etc., and last operation result is input to into pipeline_3 realization streams
Water operation passes to next texel filter operation, texel data normalization (5)；
As shown in figure 5, texel filter operation, texel data normalization unit (5), when the filtered model of texture
(filtermode) to close on sampling configuration (nearest), it is meant that need not perform filter operation, such texture please
Ask in filtering module by " transparent transmission ".Otherwise, need according to filtered model, to multiple texture sampling values by linear, or bilinearity,
Or Tri linear interpolation is calculated, the texel value after a filtration is obtained, result is carried out into texel data normalization, RGBA will be input into
Form, texel data of each component for 8bit, the width of texel data each component after normalization operation is
32bit, span：Between [0,1].As shown in Fig. 2 " texel filter course " (data_filtert_ is adopted during Modeling and Design
Thread) realize with flowing water pipeline_3, wherein, as shown in figure 8, when " texel filter course " detects flowing water
During pipeline_3 [n-1] non-NULL, read the data pointer of pipeline_3 [n-1], be that " texel filter course " offer must
The data message wanted, " texel filter course " mainly completes algorithm function mainly to be had：According to different texture mapping types
(maptype), filtered model (filtermode) carries out texel value is filtered and normalization is calculated etc., and last result is passed through
Export to USA with the interface function between unified dyeing array (USA).
Finally it should be noted that above fact Example is only to illustrate technical scheme, rather than a limitation；Although
With reference to the foregoing embodiments the present invention has been described in detail, it will be understood by those within the art that；Which still may be used
To modify to the technical scheme that foregoing embodiments are recorded, or equivalent is carried out to which part technical characteristic；And
These modifications are replaced, and do not make the essence of appropriate technical solution depart from the spirit and model of various embodiments of the present invention technical scheme
Enclose.
Claims (1)
1. a kind of GPU multithreadings texture mapping SystemC modeling structure, it is characterised in that include：
Parametric texture is obtained and Level computing units (1), texel address calculation (2), data assembling and task allocation unit
Unit (3), texel data are extracted and format conversion unit (4), texel are filtered, texel data normalization unit (5) and texture are reflected
Penetrate state and control parameter unit (6)；
Parametric texture is obtained and Level computing units (1) output interface is connected with the input interface of texel address calculation (2)
Connect, parametric texture is obtained and the texture Quad being input into according to unified dyeing volume array (USA) of Level computing units (1) is asked
Texture cell id information, read texture mapping type mapType and filtration from texture mapping state and control parameter unit (6)
The texture image resolution parameter width of pattern filterMode, baselevel and baselevel layers, height,
Depth, lod_bias parameter, and and unified dyeing volume array input texture Quad request Quad_mask and coordinate variable s,
T, r are substituted in Level calculation process together, obtain the value of the level layers of resident texture, and from texture mapping state and control ginseng
Counting unit (6) reads width, height, depth of level layer texture image resolution ratio parameters, by the resident texture
The value of level layers, the width of level layer texture image resolution ratio parameters, height, depth, texture mapping type
Texture Quad request coordinate variable s, the t of mapType, texture filtering pattern filterMode and unified dyeing volume array input,
R, inputs to texel address calculation (2)；
The unified dyeing volume array that texel address calculation (2) is obtained according to parametric texture and Level computing units (1) are input into
The texture Quad request coordinate variable s of input, the width of t, r and level layer texture image resolution ratio parameter, height,
Depth, calculates the texture coordinate for specifying Level layers first, obtains Level laminated striations element coordinate address (i0, j0, k0), (i1,
j1,k1)；Secondly, texel address calculation (2) brings texel coordinate address (i0, j0, k0), (i1, j1, k1) into wrap moulds
During formula is to the Coordinate Adjusting algorithm of Level layers, obtain each small component wrap adjustment process after texture coordinate address (i0, j0,
K0), (i1, j1, k1)；Again, texture filtering pattern filterMode and texture of the texel address calculation (2) according to input
Map type mapType, carries out texel sampling processing, and produces 1 to n texel coordinate to texture coordinate；And according to wrap moulds
Formula is processed to multiple texel coordinates to the Coordinate Adjusting algorithm of Level layers, finally, and is sat final comprising texel sampling
Target texel sample request is exported to data assembling and task allocation unit (3)；
Data assembling and task allocation unit (3), according to the ready states of current external Texture memory, if ready states
For 1, this unit is always allowed to send texel sample request to texture storage L1TCache；Otherwise, whole texture pipeline is stopped
It is stagnant；Meanwhile, made requests on by sending texel sample request to external texture memorizer with the interface of external texture memorizer
Addressing is processed, and is arranged request and completed mark, and data assembling and task allocation unit (3) constantly detect outside by internal process
What Texture memory was returned completes identification-state, if returned data is effectively, by the request after the process of external texture memorizer
As a result it is ranked up according to the sequencing of request, exports and extract to texel data and format conversion unit (4)；
Texel data is extracted and format conversion unit (4), first reads current stricture of vagina with control parameter unit (6) from texture mapping state
Reason is asked in texture Cache internal storage format internalformat, according to the storage format that external texture memorizer is returned,
From texel data extract and the request results that obtain of format conversion unit (4) in extract R in texture format, G, B, A, Lum,
Different internal forms are converted to the color data of RGBA forms by Int and Depth, and result is exported to texel filter operation, stricture of vagina
Prime number is according to normalization unit (5)；
Texel filter operation, texel data normalization unit (5), when texture filtering pattern is to close on sampling configuration, it is meant that no
Need to perform filter operation, such texture requests are in filtering module by " transparent transmission "；Otherwise, need according to texture filtering mould
Multiple texture sampling values are calculated by linear, or bilinearity, or Tri linear interpolation, obtain a filtration by formula filterMode
Result is carried out texel data normalization by texel value afterwards, finally, by the result by connecing between unified dyeing array
Mouth function is exported to outside unified dyeing array.
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| CN108109103A (en) * | 2017-12-06 | 2018-06-01 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of high-performance GPU dyeing tasks and unified dyeing array task scene mapping structure |
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