CN106681878A - Method for testing PCIE channel bandwidth - Google Patents

Method for testing PCIE channel bandwidth Download PDF

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Publication number
CN106681878A
CN106681878A CN201710007903.6A CN201710007903A CN106681878A CN 106681878 A CN106681878 A CN 106681878A CN 201710007903 A CN201710007903 A CN 201710007903A CN 106681878 A CN106681878 A CN 106681878A
Authority
CN
China
Prior art keywords
pcie
test
test machine
information
serial port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710007903.6A
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Chinese (zh)
Inventor
刘振东
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhengzhou Yunhai Information Technology Co Ltd
Original Assignee
Zhengzhou Yunhai Information Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhengzhou Yunhai Information Technology Co Ltd filed Critical Zhengzhou Yunhai Information Technology Co Ltd
Priority to CN201710007903.6A priority Critical patent/CN106681878A/en
Publication of CN106681878A publication Critical patent/CN106681878A/en
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/273Tester hardware, i.e. output processing circuits

Abstract

The invention discloses a method for testing a PCIE channel bandwidth, and relates to the field of computer signal testing. A testing platform is erected, a test machine is restarted through an ipmi command, serial port information of the test machine is collected in the restarting process, the serial port information collected every time is compared with PCIE signal information serving as the standard, a comparison result is checked, and whether a PCIE bandwidth signal is complete or not is verified. The method comprises the specific steps that peripheral equipment for measuring a PCIE slot position is connected with the test machine through a line, and an ipmitool platform tool is installed in the test machine; a man-machine interface is edited, and test parameter information is input; the test machine is restarted through the ipmi command, and the serial port information of the test machine is collected; the serial port information collected every time is compared with the PCIE signal information serving as the standard; the comparison result is checked, and whether the PCIE bandwidth signal is complete or not is verified.

Description

A kind of method of testing of PCIE channel bandwidth
Technical field
The present invention discloses a kind of method of testing of bandwidth chahnel, is related to Computer signal field tests, and specifically one Plant the method for testing of PCIE channel bandwidth.
Background technology
PCI-Express is newest bus and interface standard, and the interface of PCI Express is according to bus bit wide difference Difference, including X1, X4, X8 and X16 etc..PCI Express specifications are connected to 32 passage connections from 1 passage, There is very strong retractility, the demand different to data transfer bandwidth to meet different system equipment.To meet high scalability, PCIE has become indispensable expansion interface, it will usually which RAID card, SAS cards, HBA cards of extrapolation some PCIE interfaces etc. set It is standby meeting different customer demands.The signal quality of PCIE directly affects the function and performance of these outer plug-in cards.It is outer to ensure Slotting PCIE device is capable of the work of stability and high efficiency, and the signal quality of PCIE has to comply with PCIE protocol specifications.In research and development test In, PCIE signal quality shows as PCIE bandwidth indirectly, generally measures PCIE bandwidth to verify the stability of PCIE signal.But it is existing In having test, the environment collocation and test process to PCIE bandwidth tests is more complicated, needs repeated test, expends big The time of amount and manpower.
The present invention provides a kind of method of testing of PCIE channel bandwidth, and by ipmi orders restarting for test machine is realized, And Serial Port Information is collected in restarting process, and initial p CIE information is contrasted in Serial Port Information, whether inspection PCIE signal is normal, And with this information as standard, the Serial Port Information collected every time is contrasted with this, exports comparison result later, so as to realize quickly weight Review the whether complete purpose of card PCIE bandwidth signals.
IPMI IPMIs, are a kind of hardware management interface specifications of open standard, define embedded pipe The ad hoc approach that reason subsystem is communicated.IPMI information is exchanged by baseboard management controller BMC, and it is not rely on The processor of server, BIOS or operating system carry out work, and IPMI functions all send commands to complete to BMC, and order makes Instructed with specified in IPMI specifications, BMC is received and event message is recorded in System Event Log, safeguard in descriptive system and pass The Sensor Data Record of sensor situation.
The content of the invention
The present invention is in existing test, the environment collocation and test process to PCIE bandwidth tests is more complicated, needs Repeated test, take a substantial amount of time and manpower problem, there is provided a kind of method of testing of PCIE channel bandwidth, pass through By in serial ports PCIE information and Comparison of standards, come quick discovery system in there is the bad situation of PCIE signal.
A kind of method of testing of PCIE channel bandwidth:
Test platform is built, test machine is restarted by ipmi orders, test machine Serial Port Information is collected in restarting process, will be every The Serial Port Information of secondary collection is contrasted with the PCIE signal information as standard, checks comparing result, and checking PCIE bandwidth signals are It is no complete;
Concrete steps:The extrapolation equipment for measuring PCIE grooves position is connected with test machine using circuit, test machine is installed Ipmitool platform tools;
Editor's man-machine interface, input test parameter information;
Test machine is restarted by ipmi orders, test machine Serial Port Information is collected;
Each Serial Port Information collected and the PCIE signal information as standard are contrasted;
Comparing result is checked, whether checking PCIE bandwidth signals are complete.
The PCIE signal information of the standard is the PCIE signal information of first time desk checking.
The test parameter information includes test machine monitoring management IP address, and test machine title, test machine serial equipment is known Other information, restart number of times.
Restarting when number of times is arranged for the test parameter information is no less than 3 times.
A kind of test system of PCIE channel bandwidth, including holding wire, extrapolation equipment, the test machine of PCIE grooves position;
The extrapolation equipment for measuring PCIE grooves position is connected with test machine using circuit, test machine installs ipmitool platform works Tool;
Editor's man-machine interface, input test parameter information;
Test machine is restarted by ipmi orders, test machine Serial Port Information is collected;
Each Serial Port Information collected and the PCIE signal information as standard are contrasted;
Comparing result is checked, whether checking PCIE bandwidth signals are complete.
The holding wire includes Serial Port Line, netting twine.
The test parameter information arranged in the test machine includes test machine monitoring management IP address, and test machine title is surveyed Test-run a machine serial equipment identification information, restart number of times.
The present invention has an advantageous effect in that compared with prior art:
The present invention provides a kind of method of testing of PCIE channel bandwidth:Test platform is built, survey is restarted by ipmi orders Test-run a machine, collects test machine Serial Port Information in restarting process, each Serial Port Information collected and the PCIE signal as standard are believed Breath contrast, checks comparing result, and whether checking PCIE bandwidth signals are complete;
Using the inventive method by restarting, collection system serial ports, by serial ports PCIE information with Comparison of standards, comes in quick discovery system the bad situation of PCIE signal occur, and the PCIE links to going wrong can enter Row subsequent analysis, expend so as to save testing time input with manpower, save R&D costs.
Description of the drawings
Fig. 1 man-machine interface schematic diagrames;
Fig. 2 the inventive method schematic flow sheets.
Specific embodiment
A kind of method of testing of PCIE channel bandwidth:
Test platform is built, test machine is restarted by ipmi orders, test machine Serial Port Information is collected in restarting process, will be every The Serial Port Information of secondary collection is contrasted with the PCIE signal information as standard, checks comparing result, and checking PCIE bandwidth signals are It is no complete;
Concrete steps:The extrapolation equipment for measuring PCIE grooves position is connected with test machine using circuit, test machine is installed Ipmitool platform tools;
Editor's man-machine interface, input test parameter information;
Test machine is restarted by ipmi orders, test machine Serial Port Information is collected;
Each Serial Port Information collected and the PCIE signal information as standard are contrasted;
Comparing result is checked, whether checking PCIE bandwidth signals are complete.
Using said method, in conjunction with specific embodiments, the present invention is described in more detail.
Illustrated as test machine with the NX8480M4 types of tide, prepare Serial Port Line, netting twine, a measurement PCIE grooves position Extrapolation equipment it is some, build test platform, the extrapolation equipment for measuring PCIE grooves positions is connected with test machine using circuit, test Machine installs ipmitool platform tools;
Editor's man-machine interface, input test parameter information, with reference to Fig. 1;
Wherein BMCIP represents the IP address of the monitoring management of test machine, and project name is NX8480M4, and COM is represented and surveyed Serial equipment identification information on test-run a machine, counts and represents the number of times restarted, and pass represents standard compliant number of times, result interfaces Each comparing result is recorded in detail, and key can be the standard being manually entered, and the PCIE signal information of such as standard is for for the first time The PCIE signal information of desk checking, is shown as in figure:
Skt[1],D[3]:The equipment that F [0] position is mounted with a gen3, represents PICE3.0 equipment.
Test machine is restarted by ipmi orders, test machine Serial Port Information is collected;
Each Serial Port Information collected and the PCIE signal information as standard are contrasted;
Comparing result is checked, whether checking PCIE bandwidth signals are complete.Data below is the data display after restarting 3 times:
BMC connective 201,6/9,/13 11:50
Start number of times:1
Start shooting 201,6/9,/13 11:50
PCIE is extracted:2016/9/13 11:52
Fail
Skt [0], D [2]:F[0] Link Down!
Skt [0], D [2]:F[1] Link Down!
Skt [0], D [2]:F[2] Link up asx08Gen3!
Skt [0], D [3]:F[0] Link Down!
Skt [1], D [2]:F[0] Link Down!
Skt [1], D [3]:F[0] Link up asx08Gen3!
Skt [1], D [3]:F[2] Link Down!
BMC connective 201,6/9,/13 11:52
Start number of times:2
Start shooting 201,6/9,/13 11:52
PCIE is extracted:2016/9/13 11:52
Fail
BMC connective 201,6/9,/13 11:52
Start number of times:3
BMC connective 201,6/9,/13 11:53
Start number of times:3
Start shooting 201,6/9,/13 11:53
PCIE is extracted:2016/9/13 11:54
Fail
Skt [0], D [2]:F[0] Link Down!
Skt [0], D [2]:F[1] Link Down!
Skt [0], D [2]:F[2] Link up asx08Gen3!
Skt [0], D [3]:F[0] Link Down!
Skt [1], D [2]:F[0] Link Down!
Skt [1], D [3]:F[0] Link up asx08Gen3!
Skt [1], D [3]:F[2] Link Down!
As above it is the test detailed results of output, if we see test fail at result interfaces, can preserving Document in check details, be then further analyzed.
Using the inventive method by restarting, collection system serial ports, by serial ports PCIE information with Comparison of standards, comes in quick discovery system the bad situation of PCIE signal occur, and the PCIE links to going wrong can enter Row subsequent analysis, expend so as to save testing time input with manpower, save R&D costs.

Claims (7)

1. a kind of method of testing of PCIE channel bandwidth, it is characterised in that
Test platform is built, test machine is restarted by ipmi orders, test machine Serial Port Information is collected in restarting process, will be received every time The Serial Port Information of collection is contrasted with the PCIE signal information as standard, checks comparing result, and whether checking PCIE bandwidth signals are complete It is whole;
Concrete steps:The extrapolation equipment for measuring PCIE grooves position is connected with test machine using circuit, test machine installs ipmitool Platform tools;
Editor's man-machine interface, input test parameter information;
Test machine is restarted by ipmi orders, test machine Serial Port Information is collected;
Each Serial Port Information collected and the PCIE signal information as standard are contrasted;
Comparing result is checked, whether checking PCIE bandwidth signals are complete.
2. method of testing according to claim 1, it is characterised in that the PCIE signal information of the standard is first time people The PCIE signal information of work inspection.
3. method of testing according to claim 1 and 2, it is characterised in that the test parameter information includes test machine monitoring Management ip address, test machine title, restarts number of times at test machine serial equipment identification information.
4. method of testing according to claim 3, it is characterised in that when restarting number of times and arranging of the test parameter information No less than 3 times.
5. a kind of test system of PCIE channel bandwidth, it is characterised in that including holding wire, the extrapolation equipment of PCIE grooves position, test Machine;
The extrapolation equipment for measuring PCIE grooves position is connected with test machine using circuit, test machine installs ipmitool platform tools;
Editor's man-machine interface, input test parameter information;
Test machine is restarted by ipmi orders, test machine Serial Port Information is collected;
Each Serial Port Information collected and the PCIE signal information as standard are contrasted;
Comparing result is checked, whether checking PCIE bandwidth signals are complete.
6. test system according to claim 5, it is characterised in that holding wire includes Serial Port Line, netting twine.
7. test system according to claim 5, it is characterised in that the test parameter information arranged in test machine includes surveying Test-run a machine monitoring management IP address, test machine title, restarts number of times at test machine serial equipment identification information.
CN201710007903.6A 2017-01-05 2017-01-05 Method for testing PCIE channel bandwidth Pending CN106681878A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710007903.6A CN106681878A (en) 2017-01-05 2017-01-05 Method for testing PCIE channel bandwidth

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710007903.6A CN106681878A (en) 2017-01-05 2017-01-05 Method for testing PCIE channel bandwidth

Publications (1)

Publication Number Publication Date
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107480017A (en) * 2017-08-02 2017-12-15 郑州云海信息技术有限公司 The batch-testing device and method of PCIE outer plug-in cards
CN110659171A (en) * 2019-09-25 2020-01-07 苏州浪潮智能科技有限公司 Test method, electronic device and computer readable storage medium
CN113204457A (en) * 2021-05-20 2021-08-03 山东英信计算机技术有限公司 High-speed serial bus bandwidth testing device and method
WO2022100307A1 (en) * 2020-11-11 2022-05-19 苏州浪潮智能科技有限公司 Method and apparatus for data interaction between server bios and bmc, and device
WO2022134855A1 (en) * 2020-12-26 2022-06-30 苏州浪潮智能科技有限公司 Bandwidth allocation method and apparatus for pcie external plug-in card, and device and storage medium
CN115658375A (en) * 2022-12-27 2023-01-31 苏州浪潮智能科技有限公司 Device repairing method, repairing system and device, electronic device and storage medium
CN115756941A (en) * 2023-01-09 2023-03-07 苏州浪潮智能科技有限公司 Automatic repair method and device for equipment, electronic equipment and storage medium

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CN101131663A (en) * 2006-08-22 2008-02-27 鸿富锦精密工业(深圳)有限公司 Method for detecting installation correctness of computer PCI/PCI Express devices
US20110296072A1 (en) * 2010-05-31 2011-12-01 Hon Hai Precision Industry Co., Ltd. System and method for controlling pci-e slots of computer
CN102968362A (en) * 2012-11-21 2013-03-13 浪潮电子信息产业股份有限公司 Method for detecting integrity of PCIE (peripheral component interface express) equipment in system start-up process

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CN101131663A (en) * 2006-08-22 2008-02-27 鸿富锦精密工业(深圳)有限公司 Method for detecting installation correctness of computer PCI/PCI Express devices
US20110296072A1 (en) * 2010-05-31 2011-12-01 Hon Hai Precision Industry Co., Ltd. System and method for controlling pci-e slots of computer
CN102968362A (en) * 2012-11-21 2013-03-13 浪潮电子信息产业股份有限公司 Method for detecting integrity of PCIE (peripheral component interface express) equipment in system start-up process

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107480017A (en) * 2017-08-02 2017-12-15 郑州云海信息技术有限公司 The batch-testing device and method of PCIE outer plug-in cards
CN110659171A (en) * 2019-09-25 2020-01-07 苏州浪潮智能科技有限公司 Test method, electronic device and computer readable storage medium
WO2021056393A1 (en) * 2019-09-25 2021-04-01 苏州浪潮智能科技有限公司 Test method, electronic device and computer-readable storage medium
WO2022100307A1 (en) * 2020-11-11 2022-05-19 苏州浪潮智能科技有限公司 Method and apparatus for data interaction between server bios and bmc, and device
US11907073B2 (en) 2020-11-11 2024-02-20 Inspur Suzhou Intelligent Technology Co., Ltd. Method and apparatus for data interaction between BIOS and BMC of server, and device
WO2022134855A1 (en) * 2020-12-26 2022-06-30 苏州浪潮智能科技有限公司 Bandwidth allocation method and apparatus for pcie external plug-in card, and device and storage medium
CN113204457A (en) * 2021-05-20 2021-08-03 山东英信计算机技术有限公司 High-speed serial bus bandwidth testing device and method
CN115658375A (en) * 2022-12-27 2023-01-31 苏州浪潮智能科技有限公司 Device repairing method, repairing system and device, electronic device and storage medium
CN115658375B (en) * 2022-12-27 2023-08-15 苏州浪潮智能科技有限公司 Equipment repairing method, repairing system and device, electronic equipment and storage medium
CN115756941A (en) * 2023-01-09 2023-03-07 苏州浪潮智能科技有限公司 Automatic repair method and device for equipment, electronic equipment and storage medium

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