CN106652954A - Data drive circuit and driving method thereof, source drive chip and display device - Google Patents

Data drive circuit and driving method thereof, source drive chip and display device Download PDF

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Publication number
CN106652954A
CN106652954A CN201710002755.9A CN201710002755A CN106652954A CN 106652954 A CN106652954 A CN 106652954A CN 201710002755 A CN201710002755 A CN 201710002755A CN 106652954 A CN106652954 A CN 106652954A
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signal
signal output
data
output end
driving circuit
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CN106652954B (en
Inventor
杨建光
王洁琼
何宗泽
苏丹
李硕
冯志鹏
张亮
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0271—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping
    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

The invention discloses a data drive circuit and a driving method thereof, a source drive chip and a display device; by virtue of signal selectors, it can judge whether a data signal, which is outputted from a corresponding signal output end of a data driver, is a signal of a darkest gray-scale picture under a normally black mode or a signal of a brightest gray-scale picture under a normally white mode, if so, a public voltage signal, which is outputted from a public voltage signal output end, is transmitted to a corresponding signal output end of the data drive circuit, so that it stops charging and discharging a liquid crystal under the normally black mode of a normally black screen or the normally white mode of a normally white screen, otherwise, a data signal, which is outputted from a corresponding signal output end of the data driver, is outputted to a corresponding signal output end of the data drive circuit. Therefore, by improving the data drive circuit, power consumption of a liquid crystal display panel under the normally black mode of the normally black screen or the normally white mode of the normally white screen can be effectively reduced, and meanwhile, under the precondition of avoiding influence to the normal display of other pictures, service life of the liquid crystal screen can be effectively prolonged.

Description

Data driving circuit, driving method thereof, source electrode driving chip and display device
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a data driving circuit, a driving method thereof, a source driving chip and a display device.
Background
The array substrate of the conventional liquid crystal display panel includes a display region and a non-display region, wherein the non-display region may include a gate driving circuit, a data driving circuit, a timing controller, and the like, the gate driving circuit is configured to provide a gate scanning signal to the display region, the data driving circuit is configured to provide a data signal to the display region, and the timing controller is configured to provide a timing signal to the gate driving circuit and the data driving circuit, and control signal output of the gate driving circuit and the data driving circuit.
Taking a 256-bit gray scale display picture as an example, the signal output by the data driving circuit is as shown in fig. 1, the middle dotted line represents a common voltage signal, starting from the gray scale signal closest to the dotted line, and gradually departing from the dotted line, the gray scale signals are a 0 gray scale signal, a 1 gray scale signal, a 2 gray scale signal, a 3 gray scale signal.. 252 gray scale signal, a 253 gray scale signal, a 254 gray scale signal, and a 255 gray scale signal in sequence; meanwhile, the level of the Polarity Inversion signal (POL) output from the timing controller may control the Polarity of the data signal output from the data driving circuit, as shown in fig. 1, such that the gray-scale signal is located at both upper and lower sides of the dotted line.
Generally, from black to white, the gray scales can be displayed by 64-bit gray scale, 256-bit gray scale or other bit gray scales; in the design process of the circuit, in order to satisfy the normal display of the picture, the gamma voltage is usually adjusted to meet the display requirement. In addition, in order to prevent polarization of liquid crystal located in the middle of the display panel, each gray scale corresponds to two gamma voltages with opposite polarities. Therefore, for the normally black screen/normally white screen liquid crystal display panel, after the gamma voltages are adjusted, the corresponding black screen/white screen also has two gamma voltages with opposite polarities, and the two gamma voltages are different from the common voltage, so that when the liquid crystal display panel is in the black screen/white screen, the data driving circuit is also charging and discharging the liquid crystal in the display area; therefore, power consumption of the liquid crystal display panel is increased while the life span of the liquid crystal display panel is reduced.
Therefore, how to reduce the power consumption of the liquid crystal display panel and prolong the service life is a technical problem to be urgently solved by the technical personnel in the field.
Disclosure of Invention
The embodiment of the invention provides a data driving circuit, a driving method thereof, a source electrode driving chip and a display device, which are used for solving the problem of how to reduce the power consumption of a liquid crystal display panel and prolong the service life in the prior art.
The data driving circuit provided by the embodiment of the invention comprises a data driver; further comprising: a plurality of signal selectors in one-to-one correspondence with the respective signal output terminals of the data driver; wherein,
the first signal input end of the signal selector is connected with the signal output end corresponding to the data driver, the second signal input end of the signal selector is connected with the common voltage signal output end, the first signal control end of the signal selector is connected with the positive polarity gamma voltage signal end, the second signal control end of the signal selector is connected with the negative polarity gamma voltage signal end, and the signal output end of the signal selector is connected with the signal output end corresponding to the data driving circuit; the positive polarity gamma voltage signal end and the negative polarity gamma voltage signal end are respectively used for outputting a pair of gamma voltage signals with opposite polarities corresponding to the darkest gray scale picture in a normally black mode or the brightest gray scale picture in a normally white mode;
the signal selector is used for outputting a common voltage signal output by the common voltage signal output end to a signal output end corresponding to the data driving circuit when the data signal output by the signal output end corresponding to the data driver is judged to be a signal of a darkest gray scale picture in a normally black mode or a signal of a brightest gray scale picture in a normally white mode; and when the data signal output by the signal output end corresponding to the data driver is judged to be the signal of the non-darkest gray scale picture in the normally black mode or the signal of the non-brightest gray scale picture in the normally white mode, the data signal output by the signal output end corresponding to the data driver is output to the signal output end corresponding to the data driving circuit.
In a possible implementation manner, in the data driving circuit provided in an embodiment of the present invention, the signal selector includes: a positive polarity signal selector and a negative polarity signal selector; wherein,
a first signal input end of the positive polarity signal selector is connected with a signal output end corresponding to the data driver, a second signal input end of the positive polarity signal selector is connected with a common voltage signal output end, a signal control end of the positive polarity signal selector is connected with a positive polarity gamma voltage signal end, and a signal output end of the positive polarity signal selector is connected with a signal output end corresponding to the data driving circuit;
the positive polarity signal selector is used for outputting a common voltage signal output by the common voltage signal output end to a signal output end corresponding to the data driving circuit when judging that a positive polarity data signal output by a signal output end corresponding to the data driver is the same as a positive polarity gamma voltage signal output by the positive polarity gamma voltage signal end; when the positive polarity data signal is judged to be different from the positive polarity gamma voltage signal, outputting the positive polarity data signal to a signal output end corresponding to the data driving circuit;
a first signal input end of the negative polarity signal selector is connected with a signal output end corresponding to the data driver, a second signal input end of the negative polarity signal selector is connected with a common voltage signal output end, a signal control end of the negative polarity signal selector is connected with a negative polarity gamma voltage signal end, and a signal output end of the negative polarity signal selector is connected with a signal output end corresponding to the data driving circuit;
the negative polarity signal selector is used for outputting a common voltage signal output by the common voltage signal output end to a signal output end corresponding to the data drive circuit when judging that a negative polarity data signal output by a signal output end corresponding to the data driver is the same as a negative polarity gamma voltage signal output by the negative polarity gamma voltage signal end; and when the negative polarity data signal is judged to be different from the negative polarity gamma voltage signal, outputting the negative polarity data signal to a signal output end corresponding to the data driving circuit.
In a possible implementation manner, in the data driving circuit provided in an embodiment of the present invention, the positive polarity signal selector includes: a positive voltage comparator, a first switching transistor, and a second switching transistor; wherein,
the negative input end of the positive voltage comparator is connected with the positive gamma voltage signal end, the positive input end of the positive voltage comparator is connected with the signal output end corresponding to the data driver, and the output end of the positive voltage comparator is connected with the first node; the positive voltage comparator is used for outputting a preset first level signal to the first node when judging that the positive polarity data signal output by the signal output end corresponding to the data driver is the same as the positive polarity gamma voltage signal output by the positive polarity gamma voltage signal end; when the positive polarity data signal is judged to be different from the positive polarity gamma voltage signal, outputting a preset second level signal to the first node; the first level signal is a low level signal, and the second level signal is a high level signal; or, the first level signal is a high level signal, and the second level signal is a low level signal;
the grid electrode of the first switch transistor is connected with the first node, the source electrode of the first switch transistor is connected with the signal output end corresponding to the data driver, and the drain electrode of the first switch transistor is connected with the signal output end corresponding to the data driving circuit; the first switching transistor is in a conducting state when the potential of the first node is at a second level;
the grid electrode of the second switching transistor is connected with the first node, the source electrode of the second switching transistor is connected with the common voltage signal output end, and the drain electrode of the second switching transistor is connected with the signal output end corresponding to the data driving circuit; the second switching transistor is in a conductive state when the potential of the first node is at a first level.
In a possible implementation manner, in the data driving circuit provided in an embodiment of the present invention, when the first level signal is a low level signal and the second level signal is a high level signal, the first switching transistor is an N-type transistor, and the second switching transistor is a P-type transistor; the first level signal is a high level signal, and when the second level signal is a low level signal, the first switch transistor is a P-type transistor, and the second switch transistor is an N-type transistor.
In one possible implementation manner, in the data driving circuit provided in an embodiment of the present invention, the negative polarity signal selector includes: a negative voltage comparator, a third switching transistor, and a fourth switching transistor; wherein,
the negative electrode input end of the negative voltage comparator is connected with the signal output end corresponding to the data driver, the positive electrode input end of the negative voltage comparator is connected with the negative polarity gamma voltage signal end, and the output end of the negative voltage comparator is connected with a second node; the negative voltage comparator is used for outputting a preset first level signal to the second node when judging that the negative polarity data signal output by the signal output end corresponding to the data driver is the same as the negative polarity gamma voltage signal output by the negative polarity gamma voltage signal end; when the negative polarity data signal is judged to be different from the negative polarity gamma voltage signal, outputting a preset second level signal to the second node; the first level signal is a low level signal; the second level signal is a high level signal; or, the first level signal is a high level signal, and the second level signal is a low level signal;
the grid electrode of the third switching transistor is connected with the second node, the source electrode of the third switching transistor is connected with the signal output end corresponding to the data driver, and the drain electrode of the third switching transistor is connected with the signal output end corresponding to the data driving circuit; the third switching transistor is in a conducting state when the potential of the second node is at a second level;
the grid electrode of the fourth switching transistor is connected with the second node, the source electrode of the fourth switching transistor is connected with the common voltage signal output end, and the drain electrode of the fourth switching transistor is connected with the signal output end corresponding to the data driving circuit; the fourth switching transistor is in a conductive state when the potential of the second node is at the first level.
In a possible implementation manner, in the data driving circuit provided in this embodiment of the present invention, when the first level signal is a low level signal and the second level signal is a high level signal, the third switching transistor is an N-type transistor, and the fourth switching transistor is a P-type transistor; the first level signal is a high level signal, and when the second level signal is a low level signal, the third switching transistor is a P-type transistor, and the fourth switching transistor is an N-type transistor.
The embodiment of the present invention further provides a driving method of the data driving circuit provided by the embodiment of the present invention, including:
receiving a data signal output by a signal output end corresponding to the data driver;
determining whether the received data signal output by the signal output end corresponding to the data driver is the signal of the darkest gray scale picture in the normally black mode or the signal of the brightest gray scale picture in the normally white mode;
if so, outputting the common voltage signal output by the common voltage signal output end to a signal output end corresponding to the data driving circuit;
and if not, outputting the data signal output by the signal output end corresponding to the data driver to the signal output end corresponding to the data driving circuit.
In a possible implementation manner, in the driving method provided by an embodiment of the present invention, the determining whether the received data signal output by the signal output terminal corresponding to the data driver is a signal of a darkest gray scale picture in a normally black mode or a signal of a brightest gray scale picture in a normally white mode specifically includes:
the positive polarity signal selector determines whether the received data signal output by the signal output end corresponding to the data driver is the same as the positive polarity gamma voltage signal output by the positive polarity gamma voltage signal end;
the negative polarity signal selector determines whether the received data signal output by the signal output end corresponding to the data driver is the same as the negative polarity gamma voltage signal output by the negative polarity gamma voltage signal end.
The embodiment of the invention also provides a source driving chip which comprises at least one data driving circuit provided by the embodiment of the invention.
The embodiment of the invention also provides a display device which comprises the source electrode driving chip provided by the embodiment of the invention.
The invention has the following beneficial effects:
the data driving circuit comprises a data driver and a plurality of signal selectors in one-to-one correspondence with signal output ends of the data driver, wherein a first signal input end of each signal selector is connected with the corresponding signal output end of the data driver, a second signal input end of each signal selector is connected with a common voltage signal output end, a first signal control end is connected with a positive polarity gamma voltage signal end, a second signal control end is connected with a negative polarity gamma voltage signal end, and the signal output ends are connected with the corresponding signal output ends of the data driving circuit; therefore, the signal selector can judge whether the data signal output by the signal output end corresponding to the data driver is the signal of the darkest gray scale picture in the normally black mode or the signal of the brightest gray scale picture in the normally white mode, if so, the common voltage signal output by the common voltage signal output end is output to the signal output end corresponding to the data driving circuit, so that the charging and discharging of the liquid crystal are stopped in the normally black mode of the normally black screen or the normally white mode of the normally white screen, and the power consumption of the liquid crystal display panel at the moment is reduced; if not, outputting the data signal output by the signal output end corresponding to the data driver to the signal output end corresponding to the data driving circuit; therefore, through the improvement of the data driving circuit, the power consumption of the liquid crystal display panel in the normally black mode of the normally black screen or the normally white mode of the normally white screen can be effectively reduced, and the service life of the liquid crystal display panel is effectively prolonged while the normal display of other pictures is not influenced.
Drawings
FIG. 1 is a schematic diagram of gray scale signals output by a data driving circuit in the prior art;
fig. 2 is a schematic diagram of a structure of a data driving circuit according to an embodiment of the present invention;
fig. 3 is a schematic diagram illustrating a structure of a signal selector in a data driving circuit according to an embodiment of the present invention;
fig. 4 is a schematic diagram illustrating a flow of a driving method of a data driving circuit according to an embodiment of the present invention.
Detailed Description
Specific embodiments of a data driving circuit, a driving method thereof, a source driving chip and a display device according to embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
An embodiment of the present invention provides a data driving circuit, as shown in fig. 2, which may include a data driver 10; the method can also comprise the following steps: a plurality of signal selectors 20 corresponding one-to-one to the respective signal output terminals of the data driver 10; wherein,
the first signal input terminal of the signal selector 20 is connected to the signal OUTPUT terminal G [1] corresponding to the data driver 10, the second signal input terminal is connected to the common voltage signal OUTPUT terminal Vcom, the first signal control terminal is connected to the positive polarity GAMMA voltage signal terminal GAMMA [ + ], the second signal control terminal is connected to the negative polarity GAMMA voltage signal terminal GAMMA [ - ], and the signal OUTPUT terminal is connected to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit; the positive GAMMA voltage signal end GAMMA [ + ] and the negative GAMMA voltage signal end GAMMA [ - ] are respectively used for outputting a pair of GAMMA voltage signals with opposite polarities corresponding to the darkest gray scale picture in a normally black mode or the brightest gray scale picture in a normally white mode;
a signal selector 20, configured to OUTPUT a common voltage signal OUTPUT by the common voltage signal OUTPUT end Vcom to a signal OUTPUT end OUTPUT corresponding to the data driving circuit when determining that the data signal OUTPUT by the signal OUTPUT end G [1] corresponding to the data driver 10 is a signal of a darkest gray scale picture in a normally black mode or a signal of a brightest gray scale picture in a normally white mode; when the data signal OUTPUT by the signal OUTPUT terminal G [1] corresponding to the data driver 10 is judged to be the signal of the non-darkest gray scale picture in the normally black mode or the signal of the non-brightest gray scale picture in the normally white mode, the data signal OUTPUT by the signal OUTPUT terminal G [1] corresponding to the data driver 10 is OUTPUT to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit.
In the data driving circuit provided in the embodiment of the present invention, the signal selector 20 determines whether the data signal OUTPUT by the signal OUTPUT terminal G [1] corresponding to the data driver 10 is the signal of the darkest gray scale picture in the normally black mode or the signal of the brightest gray scale picture in the normally white mode, and if so, OUTPUTs the common voltage signal OUTPUT by the common voltage signal OUTPUT terminal Vcom to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit, so that in the normally black mode of the normally black screen or the normally white mode of the normally white screen, charging and discharging of the liquid crystal is stopped, and the power consumption of the liquid crystal display panel at that time is reduced; if not, outputting the data signal OUTPUT by the signal OUTPUT end G [1] corresponding to the data driver 10 to the signal OUTPUT end OUTPUT corresponding to the data driving circuit; therefore, through the improvement of the data driving circuit, the power consumption of the liquid crystal display panel in the normally black mode of the normally black screen or the normally white mode of the normally white screen can be effectively reduced, and the service life of the liquid crystal display panel is effectively prolonged while the normal display of other pictures is not influenced.
It should be noted that, in the data driving circuit provided in the embodiment of the present invention, the power consumption of the liquid crystal panel may be reduced by setting the signal selector 20 for a normally black screen or a normally white screen, which is not limited herein.
Specifically, from a black picture to a white picture, 64-bit gray scale, 256-bit gray scale or other-bit gray scale can be displayed; taking 256-bit gray scale display as an example, the darkest gray scale picture in the normally black mode is a picture displayed when 0 gray scale is output, and the brightest gray scale picture in the normally white mode is a picture displayed when 255 gray scale is output; of course, in the process of designing the liquid crystal display panel, a 64-bit gray scale display picture may be selected, a 256-bit gray scale display picture may be selected, and other-bit gray scale display pictures may be selected, which is not limited herein.
Specifically, the GAMMA voltages may be 14, 10, or 16, and if 14 GAMMA voltages are set, a pair of GAMMA voltage signals with opposite polarities corresponding to the darkest gray-scale picture in the normally black mode or the brightest gray-scale picture in the normally white mode, which are respectively output from the positive GAMMA voltage signal terminal GAMMA [ + ] and the negative GAMMA voltage signal terminal GAMMA [ - ], are G7 and G8; if 10 GAMMA voltages are set, a pair of GAMMA voltage signals with opposite polarities corresponding to the darkest gray scale picture in the normally black mode or the brightest gray scale picture in the normally white mode, which are respectively output by the positive GAMMA voltage signal end GAMMA [ + ] and the negative GAMMA voltage signal end GAMMA [ - ], are G5 and G6; if 16 GAMMA voltages are set, a pair of GAMMA voltage signals with opposite polarities corresponding to the darkest gray scale picture in the normally black mode or the brightest gray scale picture in the normally white mode, which are respectively output by the positive GAMMA voltage signal end GAMMA [ + ] and the negative GAMMA voltage signal end GAMMA [ - ], are G8 and G9; therefore, for the setting of the gamma voltage, 14 may be selected, 10 may be selected, or 16 may be selected, which is not limited herein.
In specific implementation, in order to enable the signal selector 20 to selectively output the data signal output by the signal output terminal G [1] corresponding to the data driver 10, in the data driving circuit provided in the embodiment of the present invention, as shown in fig. 3, the signal selector 20 may include: a positive polarity signal selector 21 and a negative polarity signal selector 22; wherein,
the first signal input terminal of the positive polarity signal selector 21 is connected to the signal OUTPUT terminal G [1] corresponding to the data driver 10, the second signal input terminal is connected to the common voltage signal OUTPUT terminal Vcom, the signal control terminal is connected to the positive polarity GAMMA voltage signal terminal GAMMA [ + ], and the signal OUTPUT terminal is connected to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit;
a positive polarity signal selector 21 for outputting a common voltage signal OUTPUT from the common voltage signal OUTPUT terminal Vcom to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit when it is determined that the positive polarity data signal OUTPUT from the signal OUTPUT terminal G [1] corresponding to the data driver 10 is the same as the positive polarity GAMMA voltage signal OUTPUT from the positive polarity GAMMA voltage signal terminal GAMMA [ + ]; when the positive polarity data signal is judged to be different from the positive polarity gamma voltage signal, the positive polarity data signal is OUTPUT to a signal OUTPUT end OUTPUT corresponding to the data driving circuit;
the negative polarity signal selector 22 has a first signal input terminal connected to the signal OUTPUT terminal G1 corresponding to the data driver 10, a second signal input terminal connected to the common voltage signal OUTPUT terminal Vcom, a signal control terminal connected to the negative polarity GAMMA voltage signal terminal GAMMA-, and a signal OUTPUT terminal connected to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit;
a negative polarity signal selector 22 for outputting a common voltage signal OUTPUT from the common voltage signal OUTPUT terminal Vcom to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit when it is judged that the negative polarity data signal OUTPUT from the signal OUTPUT terminal G [1] corresponding to the data driver 10 is the same as the negative polarity GAMMA voltage signal OUTPUT from the negative polarity GAMMA voltage signal terminal GAMMA-; and when the negative polarity data signal is judged to be different from the negative polarity gamma voltage signal, outputting the negative polarity data signal to a signal OUTPUT end OUTPUT corresponding to the data driving circuit.
In practical implementation, in order to enable selective output of the positive polarity signal selector 21 to the data signal, in the data driving circuit provided in the embodiment of the present invention, as shown in fig. 3, the positive polarity signal selector 21 may include: a positive voltage comparator 21a, a first switching transistor T1, and a second switching transistor T2; wherein,
the negative input terminal of the positive voltage comparator 21a is connected to the positive GAMMA voltage signal terminal GAMMA [ + ], the positive input terminal is connected to the corresponding signal output terminal G [1] of the data driver 10, and the output terminal is connected to the first node P1; a positive voltage comparator 21a for outputting a preset first level signal to a first node P1 when it is determined that the positive polarity data signal output from the signal output terminal G [1] corresponding to the data driver 10 is the same as the positive polarity GAMMA voltage signal output from the positive polarity GAMMA voltage signal terminal GAMMA [ + ]; when the positive polarity data signal is judged to be different from the positive polarity gamma voltage signal, outputting a preset second level signal to a first node P1; the first level signal is a low level signal, and the second level signal is a high level signal; or, the first level signal is a high level signal, and the second level signal is a low level signal;
a first switching transistor T1 having a gate connected to the first node P1, a source connected to the signal OUTPUT terminal G [1] corresponding to the data driver 10, and a drain connected to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit; the first switching transistor T1 is in a conducting state when the potential of the first node P1 is at the second level;
a gate of the second switching transistor T2 is connected to the first node P1, a source thereof is connected to the common voltage signal OUTPUT terminal Vcom, and a drain thereof is connected to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit; the second switching transistor T2 is in a conductive state when the potential of the first node P1 is at the first level.
Specifically, the first switching transistor T1 OUTPUTs the positive polarity data signal OUTPUT from the signal OUTPUT terminal G [1] corresponding to the data driver 10 to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit under the control of the first node P1; the second switching transistor T2 OUTPUTs the common voltage signal OUTPUT from the common voltage signal OUTPUT terminal Vcom to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit under the control of the first node P1.
Specifically, in the data driving circuit according to the embodiment of the present invention, when the first level signal is a low level signal and the second level signal is a high level signal, the first switching transistor T1 is an N-type transistor, and the second switching transistor T2 is a P-type transistor; when the first level signal is a high level signal and the second level signal is a low level signal, the first switch transistor T1 is a P-type transistor and the second switch transistor T2 is an N-type transistor.
Of course, the first switching transistor T1 may be an N-type transistor, and may also be a P-type transistor; the second switching transistor T2 may be an N-type transistor or a P-type transistor, as shown in fig. 3, which is not limited herein.
The above is only an example of the specific structure of the positive polarity signal selector 21, and in the specific implementation, the specific structure of the positive polarity signal selector 21 is not limited to the above structure provided in the embodiment of the present invention, and may be other structures known by those skilled in the art, which are not described herein again.
In order to selectively output the data signal by the negative polarity signal selector 22 in a specific implementation, in the data driving circuit provided in the embodiment of the present invention, as shown in fig. 3, the negative polarity signal selector 22 includes: a negative voltage comparator 22a, a third switching transistor T3, and a fourth switching transistor T4; wherein,
the negative voltage comparator 22a has its negative input terminal connected to the signal output terminal G1 corresponding to the data driver 10, its positive input terminal connected to the negative GAMMA voltage signal terminal GAMMA-, and its output terminal connected to the second node P2; a negative voltage comparator 22a for outputting a preset first level signal to a second node P2 when it is determined that the negative polarity data signal output from the signal output terminal G [1] corresponding to the data driver 10 is the same as the negative polarity GAMMA voltage signal output from the negative polarity GAMMA voltage signal terminal GAMMA-; when the negative polarity data signal is judged to be different from the negative polarity gamma voltage signal, outputting a preset second level signal to a second node P2; the first level signal is a low level signal; the second level signal is a high level signal; or, the first level signal is a high level signal, and the second level signal is a low level signal;
a gate of the third switching transistor T3 is connected to the second node P2, a source thereof is connected to the signal OUTPUT terminal G [1] corresponding to the data driver 10, and a drain thereof is connected to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit; the third switching transistor T3 is in a conducting state when the potential of the second node P2 is at the second level;
a gate of the fourth switching transistor T4 is connected to the second node P2, a source thereof is connected to the common voltage signal OUTPUT terminal Vcom, and a drain thereof is connected to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit; the fourth switching transistor T4 is in a turn-on state when the potential of the second node P2 is the first level.
Specifically, the third switching transistor T3 OUTPUTs the positive polarity data signal OUTPUT from the signal OUTPUT terminal G [1] corresponding to the data driver 10 to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit under the control of the second node P2; the fourth switching transistor T4 OUTPUTs the common voltage signal OUTPUT from the common voltage signal OUTPUT terminal Vcom to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit under the control of the second node P2.
Specifically, in the data driving circuit according to the embodiment of the present invention, when the first level signal is a low level signal and the second level signal is a high level signal, the third switching transistor T3 is an N-type transistor, and the fourth switching transistor T4 is a P-type transistor; when the first level signal is a high level signal and the second level signal is a low level signal, the third switching transistor T3 is a P-type transistor and the fourth switching transistor T4 is an N-type transistor.
Of course, the third switching transistor T3 may be an N-type transistor, and may also be a P-type transistor; the fourth switching transistor T4 may be an N-type transistor or a P-type transistor, as shown in fig. 3, which is not limited herein.
The above is only an example of the specific structure of the negative polarity signal selector 22, and in the specific implementation, the specific structure of the negative polarity signal selector 22 is not limited to the above structure provided in the embodiment of the present invention, and may be other structures known to those skilled in the art, which are not described herein again.
The above-described data driving circuit provided by the embodiment of the present invention will be described in detail with reference to specific embodiments.
The first embodiment is as follows: taking the data driving circuit shown in fig. 3 as an example, a normally black screen with 256-bit gray scale display and 14 gamma voltages are set, the positive gamma voltage is G7 and the negative gamma voltage is G8 when the darkest picture of the normally black picture is 0 gray scale.
When the signal OUTPUT terminal G [1] corresponding to the data driver 10 OUTPUTs a positive polarity data signal, the positive polarity signal selector 21 is in an operating state, the negative polarity signal selector 22 is in a closed state, when the positive voltage comparator 21a in the positive polarity signal selector 21 determines that the positive polarity data signal OUTPUT by the signal OUTPUT terminal G [1] corresponding to the data driver 10 is the same as the positive polarity data signal G7, the OUTPUT terminal of the positive voltage comparator 21a OUTPUTs a low level signal, the potential of the first node P1 is at a low level, so that the second switching transistor T2 is turned on, the first switching transistor T1 is turned off, the common voltage signal OUTPUT by the common voltage signal OUTPUT terminal Vcom is OUTPUT to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit and is transmitted to a corresponding data line, and at this time, charging and discharging of the liquid crystal are stopped; when the positive voltage comparator 21a in the positive polarity signal selector 21 determines that the positive polarity data signal is greater than G7, the OUTPUT terminal of the positive voltage comparator 21a OUTPUTs a high level signal, the potential of the first node P1 is at a high level, so that the first switching transistor T1 is turned on, the second switching transistor T2 is turned off, and the positive polarity data signal is OUTPUT to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit, transmitted to the corresponding data line, and charged and discharged to the liquid crystal.
When the signal OUTPUT terminal G [1] corresponding to the data driver 10 OUTPUTs a negative polarity data signal, the positive polarity signal selector 21 is in an off state, the negative polarity signal selector 22 is in an operating state, when the negative voltage comparator 22a in the negative polarity signal selector 22 determines that the negative polarity data signal OUTPUT by the signal OUTPUT terminal G [1] corresponding to the data driver 10 is the same as G8, the OUTPUT terminal of the negative voltage comparator 22a OUTPUTs a low level signal, the potential of the second node P2 is at a low level, the fourth switching transistor T4 is turned on, the third switching transistor T3 is turned off, the common voltage signal OUTPUT by the common voltage signal OUTPUT terminal Vcom is OUTPUT to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit and transmitted to a corresponding data line, and at this time, the charging and discharging of the liquid crystal is stopped; when the negative voltage comparator 22a in the negative polarity signal selector 22 determines that the negative polarity data signal is less than G8, the OUTPUT terminal of the negative voltage comparator 22a OUTPUTs a high level signal, the potential of the second node P2 is at a high level, the third switching transistor T3 is turned on, the fourth switching transistor T4 is turned off, and the negative polarity data signal is OUTPUT to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit and transmitted to the corresponding data line, so as to charge and discharge the liquid crystal.
Example two: with reference to the data driving circuit shown in fig. 3, taking a normally white screen with 256-bit gray scale display and setting 14 gamma voltages as an example, the positive gamma voltage is G7 and the negative gamma voltage is G8 when the brightest screen of the normally white screen is 255 gray scale.
When the signal OUTPUT terminal G [1] corresponding to the data driver 10 OUTPUTs a positive polarity data signal, the positive polarity signal selector 21 is in an operating state, the negative polarity signal selector 22 is in a closed state, when the positive voltage comparator 21a in the positive polarity signal selector 21 determines that the positive polarity data signal OUTPUT by the signal OUTPUT terminal G [1] corresponding to the data driver 10 is the same as the positive polarity data signal G7, the OUTPUT terminal of the positive voltage comparator 21a OUTPUTs a low level signal, the potential of the first node P1 is at a low level, so that the second switching transistor T2 is turned on, the first switching transistor T1 is turned off, the common voltage signal OUTPUT by the common voltage signal OUTPUT terminal Vcom is OUTPUT to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit and is transmitted to a corresponding data line, and at this time, charging and discharging of the liquid crystal are stopped; when the positive voltage comparator 21a in the positive polarity signal selector 21 determines that the positive polarity data signal is less than G7, the OUTPUT terminal of the positive voltage comparator 21a OUTPUTs a high level signal, the potential of the first node P1 is at a high level, so that the first switching transistor T1 is turned on, the second switching transistor T2 is turned off, and the positive polarity data signal is OUTPUT to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit, transmitted to the corresponding data line, and charged and discharged to the liquid crystal.
When the signal OUTPUT terminal G [1] corresponding to the data driver 10 OUTPUTs a negative polarity gray scale signal, the positive polarity signal selector 21 is in an off state, the negative polarity signal selector 22 is in an operating state, when the negative voltage comparator 22a in the negative polarity signal selector 22 determines that the negative polarity data signal OUTPUT by the signal OUTPUT terminal G [1] corresponding to the data driver 10 is the same as G8, the OUTPUT terminal of the negative voltage comparator 22a OUTPUTs a low level signal, the potential of the second node P2 is at a low level, the fourth switching transistor T4 is turned on, the third switching transistor T3 is turned off, the common voltage signal OUTPUT by the common voltage signal OUTPUT terminal Vcom is OUTPUT to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit and transmitted to a corresponding data line, and at this time, the charging and discharging of the liquid crystal is stopped; when the negative voltage comparator 22a in the negative polarity signal selector 22 determines that the negative polarity data signal is greater than G8, the OUTPUT terminal of the negative voltage comparator 22a OUTPUTs a high level signal, the potential of the second node P2 is at a high level, the third switching transistor T3 is turned on, the fourth switching transistor T4 is turned off, and the negative polarity data signal is OUTPUT to the signal OUTPUT terminal OUTPUT corresponding to the data driving circuit and transmitted to the corresponding data line, so as to charge and discharge the liquid crystal.
Based on the same inventive concept, an embodiment of the present invention further provides a driving method of the data driving circuit provided by the embodiment of the present invention, as shown in fig. 4, the driving method may include the following steps:
s401, receiving a data signal output by a signal output end corresponding to a data driver;
s402, determining whether the received data signal output by the signal output end corresponding to the data driver is the signal of the darkest gray scale picture in the normally black mode or the signal of the brightest gray scale picture in the normally white mode; if yes, go to step S403; if not, go to step S404;
s403, outputting the common voltage signal output by the common voltage signal output end to a signal output end corresponding to the data driving circuit;
and S404, outputting the data signal output by the signal output end corresponding to the data driver to the signal output end corresponding to the data driving circuit.
In a specific implementation, the step S402 of the driving method provided in the embodiment of the present invention determines whether the received data signal output by the signal output end corresponding to the data driver is a signal of a darkest gray scale picture in a normally black mode or a signal of a brightest gray scale picture in a normally white mode, and may specifically include:
the positive polarity signal selector determines whether the received data signal output by the signal output end corresponding to the data driver is the same as the positive polarity gamma voltage signal output by the positive polarity gamma voltage signal end;
the negative polarity signal selector determines whether the received data signal output by the signal output end corresponding to the data driver is the same as the negative polarity gamma voltage signal output by the negative polarity gamma voltage signal end.
Based on the same inventive concept, embodiments of the present invention further provide a source driver chip, including at least one of the data driver circuits provided in embodiments of the present invention, and specific implementations thereof can be described with reference to the data driver circuits provided in embodiments of the present invention, and details of the same parts are not repeated.
Based on the same inventive concept, an embodiment of the present invention further provides a display device, including the source driver chip provided in the embodiment of the present invention, where the display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like. The implementation of the display device can refer to the embodiment of the source driver chip, and repeated details are not repeated.
The embodiment of the invention provides a data driving circuit, a driving method thereof, a source electrode driving chip and a display device, wherein the data driving circuit comprises a data driver and a plurality of signal selectors which correspond to signal output ends of the data driver one by one, wherein a first signal input end of each signal selector is connected with the corresponding signal output end of the data driver, a second signal input end of each signal selector is connected with a common voltage signal output end, a first signal control end of each signal selector is connected with a positive polarity gamma voltage signal end, a second signal control end of each signal selector is connected with a negative polarity gamma voltage signal end, and the signal output ends of each signal selector are connected with the corresponding signal output ends of the data driving circuit; therefore, the signal selector can judge whether the data signal output by the signal output end corresponding to the data driver is the signal of the darkest gray scale picture in the normally black mode or the signal of the brightest gray scale picture in the normally white mode, if so, the common voltage signal output by the common voltage signal output end is output to the signal output end corresponding to the data driving circuit, so that the charging and discharging of the liquid crystal are stopped in the normally black mode of the normally black screen or the normally white mode of the normally white screen, and the power consumption of the liquid crystal display panel at the moment is reduced; if not, outputting the data signal output by the signal output end corresponding to the data driver to the signal output end corresponding to the data driving circuit; therefore, through the improvement of the data driving circuit, the power consumption of the liquid crystal display panel in the normally black mode of the normally black screen or the normally white mode of the normally white screen can be effectively reduced, and the service life of the liquid crystal display panel is effectively prolonged while the normal display of other pictures is not influenced.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (10)

1. A data driving circuit includes a data driver; it is characterized by also comprising: a plurality of signal selectors in one-to-one correspondence with the respective signal output terminals of the data driver; wherein,
the first signal input end of the signal selector is connected with the signal output end corresponding to the data driver, the second signal input end of the signal selector is connected with the common voltage signal output end, the first signal control end of the signal selector is connected with the positive polarity gamma voltage signal end, the second signal control end of the signal selector is connected with the negative polarity gamma voltage signal end, and the signal output end of the signal selector is connected with the signal output end corresponding to the data driving circuit; the positive polarity gamma voltage signal end and the negative polarity gamma voltage signal end are respectively used for outputting a pair of gamma voltage signals with opposite polarities corresponding to the darkest gray scale picture in a normally black mode or the brightest gray scale picture in a normally white mode;
the signal selector is used for outputting a common voltage signal output by the common voltage signal output end to a signal output end corresponding to the data driving circuit when the data signal output by the signal output end corresponding to the data driver is judged to be a signal of a darkest gray scale picture in a normally black mode or a signal of a brightest gray scale picture in a normally white mode; and when the data signal output by the signal output end corresponding to the data driver is judged to be the signal of the non-darkest gray scale picture in the normally black mode or the signal of the non-brightest gray scale picture in the normally white mode, the data signal output by the signal output end corresponding to the data driver is output to the signal output end corresponding to the data driving circuit.
2. The data driving circuit of claim 1, wherein the signal selector comprises: a positive polarity signal selector and a negative polarity signal selector; wherein,
a first signal input end of the positive polarity signal selector is connected with a signal output end corresponding to the data driver, a second signal input end of the positive polarity signal selector is connected with a common voltage signal output end, a signal control end of the positive polarity signal selector is connected with a positive polarity gamma voltage signal end, and a signal output end of the positive polarity signal selector is connected with a signal output end corresponding to the data driving circuit;
the positive polarity signal selector is used for outputting a common voltage signal output by the common voltage signal output end to a signal output end corresponding to the data driving circuit when judging that a positive polarity data signal output by a signal output end corresponding to the data driver is the same as a positive polarity gamma voltage signal output by the positive polarity gamma voltage signal end; when the positive polarity data signal is judged to be different from the positive polarity gamma voltage signal, outputting the positive polarity data signal to a signal output end corresponding to the data driving circuit;
a first signal input end of the negative polarity signal selector is connected with a signal output end corresponding to the data driver, a second signal input end of the negative polarity signal selector is connected with a common voltage signal output end, a signal control end of the negative polarity signal selector is connected with a negative polarity gamma voltage signal end, and a signal output end of the negative polarity signal selector is connected with a signal output end corresponding to the data driving circuit;
the negative polarity signal selector is used for outputting a common voltage signal output by the common voltage signal output end to a signal output end corresponding to the data drive circuit when judging that a negative polarity data signal output by a signal output end corresponding to the data driver is the same as a negative polarity gamma voltage signal output by the negative polarity gamma voltage signal end; and when the negative polarity data signal is judged to be different from the negative polarity gamma voltage signal, outputting the negative polarity data signal to a signal output end corresponding to the data driving circuit.
3. The data driving circuit according to claim 2, wherein the positive polarity signal selector includes: a positive voltage comparator, a first switching transistor, and a second switching transistor; wherein,
the negative input end of the positive voltage comparator is connected with the positive gamma voltage signal end, the positive input end of the positive voltage comparator is connected with the signal output end corresponding to the data driver, and the output end of the positive voltage comparator is connected with the first node; the positive voltage comparator is used for outputting a preset first level signal to the first node when judging that the positive polarity data signal output by the signal output end corresponding to the data driver is the same as the positive polarity gamma voltage signal output by the positive polarity gamma voltage signal end; when the positive polarity data signal is judged to be different from the positive polarity gamma voltage signal, outputting a preset second level signal to the first node; the first level signal is a low level signal, and the second level signal is a high level signal; or, the first level signal is a high level signal, and the second level signal is a low level signal;
the grid electrode of the first switch transistor is connected with the first node, the source electrode of the first switch transistor is connected with the signal output end corresponding to the data driver, and the drain electrode of the first switch transistor is connected with the signal output end corresponding to the data driving circuit; the first switching transistor is in a conducting state when the potential of the first node is at a second level;
the grid electrode of the second switching transistor is connected with the first node, the source electrode of the second switching transistor is connected with the common voltage signal output end, and the drain electrode of the second switching transistor is connected with the signal output end corresponding to the data driving circuit; the second switching transistor is in a conductive state when the potential of the first node is at a first level.
4. The data driving circuit according to claim 3, wherein the first level signal is a low level signal, and when the second level signal is a high level signal, the first switching transistor is an N-type transistor, and the second switching transistor is a P-type transistor;
the first level signal is a high level signal, and when the second level signal is a low level signal, the first switch transistor is a P-type transistor, and the second switch transistor is an N-type transistor.
5. The data driving circuit according to claim 2, wherein the negative polarity signal selector includes: a negative voltage comparator, a third switching transistor, and a fourth switching transistor; wherein,
the negative electrode input end of the negative voltage comparator is connected with the signal output end corresponding to the data driver, the positive electrode input end of the negative voltage comparator is connected with the negative polarity gamma voltage signal end, and the output end of the negative voltage comparator is connected with a second node; the negative voltage comparator is used for outputting a preset first level signal to the second node when judging that the negative polarity data signal output by the signal output end corresponding to the data driver is the same as the negative polarity gamma voltage signal output by the negative polarity gamma voltage signal end; when the negative polarity data signal is judged to be different from the negative polarity gamma voltage signal, outputting a preset second level signal to the second node; the first level signal is a low level signal; the second level signal is a high level signal; or, the first level signal is a high level signal, and the second level signal is a low level signal;
the grid electrode of the third switching transistor is connected with the second node, the source electrode of the third switching transistor is connected with the signal output end corresponding to the data driver, and the drain electrode of the third switching transistor is connected with the signal output end corresponding to the data driving circuit; the third switching transistor is in a conducting state when the potential of the second node is at a second level;
the grid electrode of the fourth switching transistor is connected with the second node, the source electrode of the fourth switching transistor is connected with the common voltage signal output end, and the drain electrode of the fourth switching transistor is connected with the signal output end corresponding to the data driving circuit; the fourth switching transistor is in a conductive state when the potential of the second node is at the first level.
6. The data driving circuit according to claim 5, wherein when the first level signal is a low level signal and the second level signal is a high level signal, the third switching transistor is an N-type transistor and the fourth switching transistor is a P-type transistor;
the first level signal is a high level signal, and when the second level signal is a low level signal, the third switching transistor is a P-type transistor, and the fourth switching transistor is an N-type transistor.
7. A driving method of the data driving circuit according to any one of claims 1 to 6, comprising:
receiving a data signal output by a signal output end corresponding to the data driver;
determining whether the received data signal output by the signal output end corresponding to the data driver is the signal of the darkest gray scale picture in the normally black mode or the signal of the brightest gray scale picture in the normally white mode;
if so, outputting the common voltage signal output by the common voltage signal output end to a signal output end corresponding to the data driving circuit;
and if not, outputting the data signal output by the signal output end corresponding to the data driver to the signal output end corresponding to the data driving circuit.
8. The driving method as claimed in claim 7, wherein the determining whether the received data signal outputted from the signal output terminal corresponding to the data driver is the signal of the darkest gray scale picture in the normally black mode or the signal of the brightest gray scale picture in the normally white mode includes:
the positive polarity signal selector determines whether the received data signal output by the signal output end corresponding to the data driver is the same as the positive polarity gamma voltage signal output by the positive polarity gamma voltage signal end;
the negative polarity signal selector determines whether the received data signal output by the signal output end corresponding to the data driver is the same as the negative polarity gamma voltage signal output by the negative polarity gamma voltage signal end.
9. A source driver chip comprising at least one data driver circuit as claimed in any one of claims 1 to 6.
10. A display device comprising the source driver chip according to claim 9.
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