CN106650111A - Clock comprehensive result evaluation method based on time sequencing dependency relation - Google Patents
Clock comprehensive result evaluation method based on time sequencing dependency relation Download PDFInfo
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Abstract
The invention discloses a clock comprehensive result evaluation method based on a time sequencing dependency relation. The method comprises the steps of conducting clustering on a clock synchronization unit based on a time sequencing dependency relation; conducting an evaluation of a clock comprehensive result on a single cluster. According to the clock comprehensive result evaluation method based on the time sequencing dependency relation, the evaluation method can be applied in rich and traditional clock comprehensive evaluation, the data path omitted in the clock comprehensive (CTS) process is integrated into final clock comprehensive evaluation in the form of clustering, a user of a clock comprehensive tool can have clearer and more accurate cognition of the result of the clock comprehensive (CTS) by combining time sequencing constraints to some degree, thus the most effective constraint configuration can be executed, the meaningless process iteration is avoided, and thus the purpose that the design process is accelerated and the design efficiency is improved is achieved.
Description
Technical field
The present invention relates to technical field of circuit design, more particularly to the clock synthesis result evaluation method of circuit design.
Background technology
Sub-micro, nanometer technology etc. reach its maturity under the facilitating of the applications such as internet, mobile phone movement, Internet of Things.
IC design between market application and manufacturing industry, is made a simultaneous frontal and rear attack, and faces huge challenge.
Clock comprehensively belongs to the rear end design in circuit design, specifically, after physical layout, before wiring,
Mainly complete the efficient clock path connection of all lock units from clock source point to the clock.For the design of rear end,
Circuit meets the necessary condition that temporal constraint is that it is completed, and the comprehensive quality of clock then affects the result of Time-Series analysis.
At present, the rear end design cycle of main flow, cannot also realize full-automation, it is still necessary to substantial amounts of manual control.Although
There is special eda tool, quality that can be comprehensive to clock is evaluated, but from efficiency and cost consideration, current clock
Whether synthesis result can receive, if need new round iteration, how iteration, and remaining needs the process of manual intervention.And
The intermediate result file that the foundation of manual intervention exactly clock synthesis tool is generated.
The intermediate result file, generally comprises two parts：A part is that in units of Clock Tree, comprehensively statistics is prolonged
When, deviation, power consumption, report timing topology；Another part, then with specific lock unit as object, report the correlations such as its time delay
Routing information.Statistics in units of Clock Tree, is a kind of analysis of suitable coarseness, is closed with Temporal dependency without reflection
The situation of the clock tree synthesis between the lock unit of system, often leads to higher tightened up requirement comprehensive to clock, and increase sets
Iterations in meter flow process, reduces design efficiency.
It is therefore proposed a kind of new clock synthesis result evaluation method based on Temporal dependency relation, can be directly used for
The comprehensive quality of clock is evaluated, the adverse effect that reduction manual intervention brings becomes problem demanding prompt solution.
The content of the invention
In order to solve the deficiency of prior art presence, it is an object of the invention to provide a kind of based on Temporal dependency relation
Clock synthesis result evaluation method, extracts knot group, to single knot using the Temporal dependency relation between lock unit on Clock Tree
Group enters the evaluation of row clock synthesis result, so as to accelerate design cycle, improves design efficiency.
For achieving the above object, the clock synthesis result evaluation method based on Temporal dependency relation that the present invention is provided, bag
Include following steps：
1）To clock synchronization unit, knot group is carried out based on Temporal dependency relation；2）Row clock synthesis result is entered to single knot group
Evaluate.
Further, in the step 1）, step 2）Between also include to it is described knot group's row mutation process the step of.
Further, the step 1）Comprise the following steps：
11）First point in using a certain clock synchronization unit as current knot group；12）The a certain clock will be received synchronous single
Other clock synchronization units of the data-signal of unit's transmission are added to the current knot group；13）Data-signal will be sent to described
The remaining clock synchronization unit of a certain clock synchronization unit is added to the current knot group；14）To not holding in the current knot group
Row step 11）Clock synchronization unit, execution step 11）、12）And 13）.
Further, mutation process is carried out to the knot group, is comprised the following steps：
31）The all of knot group is mapped on all of Clock Tree；32）According to the strategy of knot group's mutation, to the knot group
It is adjusted.
Further, mutation process is carried out to the knot group, it is further comprising the steps of：
When the Clock Tree is comprising son knot group, the sub- knot group is considered as the independence for being equal to other knot groups on the Clock Tree
Knot group.
Further, step 32）In to it is described knot group be adjusted, including：The knot group is merged or cutting.
Further, the step 2）Include：
21）Count the traditional parameters of all of clock synchronization unit in the single knot group；22）Count institute in the single knot group
Maximum and minimum gate series of some clock synchronization units in Clock Tree upper pathway；23）Count all of in the single knot group
The expected value and standard deviation of clock synchronization unit time delay.
Further, the traditional parameters include：Most long delay, most short time delay and delay deviation.
Clock synthesis result evaluation method based on Temporal dependency relation proposed by the present invention, it is therefore intended that more accurately comment
Estimate clock synthesis result, it is to avoid insignificant development process iteration, shorten the design cycle.It is between the method foundation lock unit
It is no to there is data transmission path, automatically generate based on the knot group of Temporal dependency relation；Evaluation to clock synthesis result, ignores not
With the difference between knot group, the characteristics such as time delay, a deviation tied in group between lock unit are only focused on.This method is applied
In the middle of the design of complicated clock tree construction, contribute to improving the degree of awareness to clock synthesis result, clock can be effectively improved
The comprehensive iteration efficiency of tree.
Clock synthesis result evaluation method based on Temporal dependency relation proposed by the present invention, is directed to Clock Tree, is based on
Knot group is processed.During knot group, using the Temporal dependency relation between lock unit on Clock Tree.One Clock Tree can
Can be comprising one or more knot groups：When a Clock Tree only ties group comprising one, the granularity and pin of the evaluation method of the present invention
To identical during a Clock Tree；When a Clock Tree is comprising multiple knot groups, the granularity of the evaluation method of the present invention can divide
Three granularity levels, reflect the comprehensive result of clock：First, with Clock Tree as most coarseness level, statistical time lag, deviation and work(
Consumption；Secondly, time delay, deviation, the power consumption isochronon synthesis in units of to tie group, inside statistics knot group（CTS）The parameter of concern, draws
Enter the concept of distribution curve；Finally, the specific delayed data of each lock unit, routing information etc. are calculated.
Clock synthesis result evaluation method based on Temporal dependency relation proposed by the present invention, when can be used to enriching traditional
Clock overall merit, will be in clock synthesis（CTS）During ignored data path to tie group in the form of to be dissolved into its final
In clock overall merit, the user for making clock synthesis tool combines to a certain extent temporal constraint, to clock synthesis（CTS）
Result quality have apparent and correct understanding, so as to implement it is maximally effective constraint configuration, it is to avoid insignificant flow process iteration,
So as to play acceleration design cycle, the purpose of design efficiency is improved.
Other features and advantages of the present invention will illustrate in the following description, also, partly from specification become aobvious
And be clear to, or understood by implementing the present invention.
Description of the drawings
Accompanying drawing is used for providing a further understanding of the present invention, and constitutes a part for specification, and with the present invention's
Embodiment together, for explaining the present invention, is not construed as limiting the invention.In the accompanying drawings：
Fig. 1 is the clock synthesis result evaluation method flow chart based on Temporal dependency relation according to the present invention；
Fig. 2 is the principle schematic for having transitivity according to the Temporal dependency relation of the present invention；
Fig. 3 is to be carried out tying the process schematic of group based on Temporal dependency relation according to the present invention；
Fig. 4 is the schematic diagram according to Clock Tree of the present invention comprising multiple knot groups；
Fig. 5 is to compare the deviation schematic diagram for obtaining knot group according to the time delay of the same knot group internal clock lock unit of the present invention；
Fig. 6 is the time delay scatter chart of the clock synchronization unit according to the present invention.
Specific embodiment
The preferred embodiments of the present invention are illustrated below in conjunction with accompanying drawing, it will be appreciated that preferred reality described herein
Apply example and be merely to illustrate and explain the present invention, be not intended to limit the present invention.
Fig. 1 is the clock synthesis result evaluation method flow chart based on Temporal dependency relation according to the present invention, below will
With reference to Fig. 1, to being described in detail based on the clock synthesis result evaluation method of Temporal dependency relation for the present invention.
In step 101, based on circuit input information, enter row clock synthesis；
In the step, clock is comprehensively the process object into row clock synthesis result evaluation method, is not that the present invention was realized
The step of must having in journey.
In step 102, to clock synchronization unit, knot group is carried out based on Temporal dependency relation；
Fig. 2 is have the principle schematic of transitivity according to the Temporal dependency relation of the present invention, with reference to Fig. 2, to sequential according to
Bad relation transmission property carries out detailed explanation.And FF0, FF1, FF2 and the FF3 in Fig. 2 is clock synchronization unit.
In circuit design, when there is effective data transfer between two clock synchronization units（With signal transmission direction
On the basis of, another clock by after is same through combinational logic circuit for the data exported from the output end of previous clock synchronization unit
The input of step unit is received）When, it is considered as the presence of sequential dependence between them, carry out sequential about in final data path
When beam is checked, need to meet data foundation（SETUP）Keep with data（HOLD）Delay constraint condition.It is same with some clock
All other clock synchronization unit that step unit has Temporal dependency relation is defined to time delay because of the clock synchronization unit
Restrict each other, and then cause Temporal dependency relation that there is transitivity.Knot group is set up on the Temporal dependency relation basis of transitivity
On.
In fig. 2, the data of the output end Q output of clock synchronization unit FF0 are through middle combinational logic circuit transmission
To the input D of clock synchronization unit FF1.Equally, to be delivered to clock same for the output end Q output data of clock synchronization unit FF1
The input D of step unit F F2.When the temporal constraint of data path is checked, just for the clock synchronization for having immediate constraint relation
Unit group, FF0/FF1 groups and FF1/FF2 groups are carried out, and clock synchronization unit FF0 and clock synchronization unit FF2 is not present directly about
Beam relation.But clock synchronization unit FF1, used as crossover node, clock signal arrival time affects FF0/FF1 and FF1/FF2 simultaneously
Constraint calculate, clock signal arrival time of clock synchronization unit FF0 and clock synchronization unit FF2 all need to be synchronous single with clock
First FF1 is reference, and this just constitutes indirectly Temporal dependency relation.And clock synchronization unit FF3 is with its excess-three clock synchronization
There is no data path in unit, do not possess Temporal dependency.
For clock synthesis, its clock synthesis result can be evaluated also just because of above-mentioned reason by tying group.
Not because there is no temporal constraint between the clock synchronization unit with Temporal dependency relation, so time delay correlation is zero, to it
The comparison of time delay is carried out, it is nonsensical that the calculating of deviation meets to sequential.
Fig. 3 is to be carried out tying the process schematic of group based on Temporal dependency relation according to the present invention, with reference to Fig. 3, to tying group
Process is illustrated, and knot group's process includes：
（1）First point in using a certain clock synchronization unit as current knot group, the data of a certain clock synchronization unit are defeated
Go out end and send data-signal, other clock synchronization units that all data input pins have received the data-signal are added into current knot
Group；
（2）Using the data input pin of a certain clock synchronization unit as signal receiving point, conversion check circuit, by it is all can be with
The remaining clock synchronization unit for transmitting data-signal to the data input pin of a certain clock synchronization unit adds current knot group；
（3）Choose from current knot group and be not carried out step（1）Clock synchronization unit, execution step（1）And step（2）, and will
The clock synchronization unit for being not yet added into current knot group for being obtained adds current knot group；
（4）Repeat step（3）, the equal executed step of all clock synchronization units in current knot group（1）, and not
There is new clock synchronization unit to add current knot group again.
User-defined Clock Tree, may include the subgroup of a knot group, multiple knot groups or knot group.As shown in figure 3, knot
After group, subgroups { FF3, FF4 } of the clock CLK comprising knot group { FF0, FF1, FF2 } and knot group { FF3, FF4, FF5, FF6 }.Knot
Timing topology, and distribution of the knot group on Clock Tree are closed, appropriate adjustment can be carried out to tying group, so as to more clearly present
Synthesis result of the knot group on Clock Tree.
In step 103, to tying group mutation process is carried out；
In this step, all of knot group will be obtained in step 102 to be mapped on all of Clock Tree.According to concrete on Clock Tree
Knot group's distribution situation, can according to knot group's mutation strategy, to tie group be adjusted.For the feelings for tying group on Clock Tree comprising son
Condition, sub- knot group is considered as on Clock Tree and is equal to independent knot groups of other knot groups and is analyzed.
Fig. 4 is the schematic diagram of the Clock Tree comprising multiple knot groups according to the present invention, with reference to Fig. 4, elaborates knot
The mutation process of group.
When certain the knot clock synchronization unit number that included of group on Clock Tree it is many, and from clock signal source point to this
The timing topology of a little clock synchronization units is more complicated（It is mainly shown as that branch is more, path is more）When, the comprehensive difficulty of clock itself is big,
Clock synchronization unit in same knot group, time delay may be uneven.Now can be to tying group（Such as tie crowd A）Carry out more fine granularity
Ground cutting.Each subgroup is processed respectively, the specific aim for evaluating clock synthesis result can be strengthened；
Many when group's number is tied on Clock Tree, single knot group is few comprising lock unit number, and timing topology is relatively easy, can be to knot
Group（Such as tie crowd C）Merge.It is appropriate to reduce the number that group is tied on Clock Tree according to the efficiency of different clock synthesis tools,
Can reduce evaluating the complexity of clock synthesis result.
It is of course also possible to mutation process is not carried out to knot group, and directly execution step 104.
In step 104, the evaluation of row clock synthesis result is entered to single knot group；
In this step, all clock synchronization units with single knot group are as object.
First, the traditional parameters of clock synchronization unit, such as most long delay, most short time delay and delay deviation are counted, wherein,
Fig. 5 is the schematic diagram for comparing the deviation for obtaining knot group according to the time delay of the same knot group internal clock lock unit of the present invention, is referred to
Fig. 5, tying the calculating of group's deviation can have two kinds of means：
（A）Traditional deviation computational methods, that is, calculate the difference of most long delay and most short time delay；
（B）Calculate the series deviation of the gate on clock path, the i.e. difference of the maximum of gate number and minimum of a value.It is right
For different process, identical timing topology might have the difference in larger time delay, and the series of clock path is
One metastable value, this will be easy to user intuitively to understand the formation of clock synthesis result.
Secondly, the expected value and standard deviation of all clock synchronization unit time delays in single knot group is counted, wherein, Fig. 6 is root
According to the time delay scatter chart of the clock synchronization unit of the present invention（For the set of the time delay of a clock synchronization unit）.With reference to
Fig. 6, the variance and standard deviation of computation delay.From for the angle of deviation, distribution curve is more concentrated, and illustrates the comprehensive deviation of clock
Less, effect is better；Conversely, curve is more flat, illustrate that deviation is bigger, effect is poorer.The distribution of desired value near maximum delay,
Minimum time delay is also proximate to, the strategy of next round iteration may be affected.Wherein, distribution curve can be bent using normal distribution
Line, statistical time lag.
The method evaluated for single knot group in the step, is equally applicable to single Clock Tree, with institute on Clock Tree
There is effective clock synchronization unit for process object.
The clock synthesis result evaluation method of the present invention is had been realized in by abovementioned steps, it is also possible to continue executing with
Step 105, further improves the clock synthesis result evaluation method of the present invention.
In step 105, from the angle of Clock Tree, knot group and clock synchronization unit clock synthesis is evaluated.
First, reference pair it is single knot group clock overall merit method, Clock Tree is carried out macroscopic view time delay, deviation,
The statistics of power consumption etc.；
Secondly, based on the knot group on Clock Tree, the method according to row clock overall merit is entered to single knot group, analysis knot group when
Result on Zhong Shu；
Finally, according to conventional method, the information such as time delay of each clock synchronization unit on Clock Tree are provided.
Clock synthesis result evaluation method based on Temporal dependency relation proposed by the present invention, it is therefore intended that more accurately comment
Estimate clock synthesis result, it is to avoid insignificant development process iteration, shorten the design cycle.It is between the method foundation lock unit
It is no to there is data transmission path, automatically generate based on the knot group of Temporal dependency relation；Evaluation to clock synthesis result, ignores not
With the difference between knot group, the characteristics such as time delay, a deviation tied in group between lock unit are only focused on.This method is applied
In the middle of the design of complicated clock tree construction, contribute to improving the degree of awareness to clock synthesis result, clock can be effectively improved
The comprehensive iteration efficiency of tree.
Clock synthesis result evaluation method based on Temporal dependency relation proposed by the present invention, is directed to Clock Tree, is based on
Knot group is processed.During knot group, using the Temporal dependency relation between lock unit on Clock Tree.One Clock Tree can
Can be comprising one or more knot groups：When a Clock Tree only ties group comprising one, the granularity and pin of the evaluation method of the present invention
To identical during a Clock Tree；When a Clock Tree is comprising multiple knot groups, the granularity of the evaluation method of the present invention can divide
Three granularity levels, reflect the comprehensive result of clock：First, with Clock Tree as most coarseness level, statistical time lag, deviation and work(
Consumption；Secondly, time delay, deviation, the power consumption isochronon synthesis in units of to tie group, inside statistics knot group（CTS）The parameter of concern, draws
Enter the concept of distribution curve；Finally, the specific delayed data of each lock unit, routing information etc. are calculated.
Clock synthesis result evaluation method based on Temporal dependency relation proposed by the present invention, when can be used to enriching traditional
Clock overall merit, will be in clock synthesis（CTS）During ignored data path to tie group in the form of to be dissolved into its final
In clock overall merit, the user for making clock synthesis tool combines to a certain extent temporal constraint, to clock synthesis（CTS）
Result quality have apparent and correct understanding, so as to implement it is maximally effective constraint configuration, it is to avoid insignificant flow process iteration,
So as to play acceleration design cycle, the purpose of design efficiency is improved.
One of ordinary skill in the art will appreciate that：The foregoing is only the preferred embodiments of the present invention, and without
In the present invention is limited, although being described in detail to the present invention with reference to the foregoing embodiments, for those skilled in the art
For, it still can modify to the technical scheme that foregoing embodiments are recorded, or which part technical characteristic is entered
Row equivalent.All any modification, equivalent substitution and improvements within the spirit and principles in the present invention, made etc., all should include
Within protection scope of the present invention.
Claims (8)
1. a kind of clock synthesis result evaluation method based on Temporal dependency relation, it is characterised in that comprise the following steps：
1）To clock synchronization unit, knot group is carried out based on Temporal dependency relation；
2）The evaluation of row clock synthesis result is entered to single knot group.
2. the clock synthesis result evaluation method of Temporal dependency relation is based on according to claim 1, it is characterised in that in institute
State step 1）, step 2）Between also include to it is described knot group's row mutation process the step of.
3. the clock synthesis result evaluation method of Temporal dependency relation is based on according to claim 1, it is characterised in that described
Step 1）It is further comprising the steps：
11）First point in using a certain clock synchronization unit as current knot group；
12）Other clock synchronization units for receiving the data-signal of a certain clock synchronization unit transmission are added into described working as
Front knot group；
13）Data-signal will be sent and be added to the current knot to the remaining clock synchronization unit of a certain clock synchronization unit
Group；
14）To being not carried out step 11 in the current knot group）Clock synchronization unit, execution step 11）、12）And 13）.
4. the clock synthesis result evaluation method of Temporal dependency relation is based on according to claim 2, it is characterised in that to institute
Stating knot group carries out mutation process, comprises the following steps：
31）The all of knot group is mapped on all of Clock Tree；
32）According to the strategy of knot group's mutation, the knot group is adjusted.
5. the clock synthesis result evaluation method of Temporal dependency relation is based on according to claim 4, it is characterised in that enter one
Step is comprised the following steps：When the Clock Tree is comprising son knot group, the sub- knot group is considered as on the Clock Tree and is equal to it
He ties the independent knot group of group.
6. the clock synthesis result evaluation method of Temporal dependency relation is based on according to claim 4, it is characterised in that step
32）In to it is described knot group be adjusted, including：The knot group is merged or cutting.
7. the clock synthesis result evaluation method of Temporal dependency relation is based on according to claim 1, it is characterised in that described
Step 2）Include：
21）Count the traditional parameters of all of clock synchronization unit in the single knot group；
22）Count maximum and minimum gate series of all of clock synchronization unit in Clock Tree upper pathway in the single knot group；
23）Count the expected value and standard deviation of all of clock synchronization unit time delay in the single knot group.
8. the clock synthesis result evaluation method of Temporal dependency relation is based on according to claim 7, it is characterised in that described
Traditional parameters include：Most long delay, most short time delay and delay deviation.
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