CN106649192B - Three-dimensional network-on-chip dynamic frequency adjustment method based on prediction - Google Patents
Three-dimensional network-on-chip dynamic frequency adjustment method based on prediction Download PDFInfo
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- CN106649192B CN106649192B CN201610993055.6A CN201610993055A CN106649192B CN 106649192 B CN106649192 B CN 106649192B CN 201610993055 A CN201610993055 A CN 201610993055A CN 106649192 B CN106649192 B CN 106649192B
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Abstract
The invention discloses a three-dimensional network-on-chip dynamic frequency adjustment method based on prediction, which comprises the following steps: s1: carrying out system partitioning on the three-dimensional network on chip; dividing the whole system into a plurality of areas, wherein each area is called a frequency adjustment area; s2: predicting the system temperature of the three-dimensional network on chip; in the system operation process, acquiring data information of input power and real-time temperature of each processing node of each partition, performing prediction calculation on the temperature of the node at the next moment, and generating an over-temperature signal or a reset signal according to whether the prediction result exceeds a threshold temperature; s3: adjusting the frequency of the three-dimensional network on chip; after receiving the temperature prediction signal, corresponding frequency adjustment measures are carried out on different partitions. The invention has the advantages of simple principle, flexibility, high efficiency, capability of ensuring the integral performance of the system and the like.
Description
Technical Field
The invention mainly relates to the field of microprocessor design, in particular to a three-dimensional network-on-chip dynamic frequency adjusting method based on prediction.
Background
To meet the increasing performance demands of microprocessors, the design of microprocessors has also undergone a change from single-core, multi-core to many-core. With the increase of the number of microprocessor cores, the traditional bus-based interconnect communication mode gradually becomes the bottleneck of system performance, and a network on chip (NoC) is widely used as a novel interconnect communication mode. And a three-dimensional network on chip (3D NoC) is the third dimension extension of a common NoC, has higher bandwidth, and is an ideal many-core interconnection communication scheme.
However, stacking more processing units on the same chip increases power density and also increases heat dissipation paths, resulting in faster heat build-up, and ultra-high temperatures can permanently damage electronic components. To solve this problem, many temperature management methods are proposed.
Conventional temperature management methods can be roughly classified into a time-level temperature management method and a space-level temperature management method. The time-level temperature management method achieves the purpose of temperature reduction by slowing down the activity of overheating nodes, such as a gating technology. When the node temperature exceeds the alarm value, the whole overheating node is generally shut down and is prohibited from operating to reduce the temperature, and although the method can achieve the purpose of temperature reduction in a short time, the performance of the whole system is seriously affected. The space level temperature management method achieves the cooling purpose by transferring tasks of overheating nodes, such as task scheduling and process migration. Tasks assigned to the overheated node are migrated to the normal node for execution, so that the overheated node can execute fewer or no tasks to reduce the temperature, and although this method does not slow down the activity of the overheated node, it takes longer for the overheated node to reduce the temperature.
In the above time-horizon temperature management method, a so-called dynamic frequency adjustment is also performed, which roughly comprises the following steps:
1. when the temperature of any node in the NoC system exceeds a preset value T, the working frequency of the whole system is zero, the system is in a non-working state, and the temperature of the system is reduced to the maximum extent.
2. When the temperature of any node in the NoC system exceeds 80% of the preset value T, the working frequency of the whole system is 0.8 × fmax, and the temperature of each node in the system rises slowly or begins to fall in a non-full-speed running state.
3. When the temperature of any node in the NoC system does not exceed 60% of the preset value T, the working frequency of the whole system is kept unchanged, the system is in a full-speed running state, and the temperature of the system does not need to be reduced.
However, the above-described adjustment method is only a dynamic frequency adjustment method for a two-dimensional plane, and is global adjustment, which greatly affects the performance of the entire system.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: aiming at the technical problems in the prior art, the invention provides a prediction-based three-dimensional network-on-chip dynamic frequency adjustment method which is simple in principle, flexible and efficient and can ensure the overall performance of a system.
In order to solve the technical problems, the invention adopts the following technical scheme:
a three-dimensional network-on-chip dynamic frequency adjustment method based on prediction comprises the following steps:
s1: carrying out system partitioning on the three-dimensional network on chip; dividing the whole system into a plurality of areas, wherein each area is called a frequency adjustment area;
s2: predicting the system temperature of the three-dimensional network on chip; in the system operation process, acquiring data information of input power and real-time temperature of each processing node of each partition, performing prediction calculation on the temperature of the node at the next moment, and generating an over-temperature signal or a reset signal according to whether the prediction result exceeds a threshold temperature;
s3: adjusting the frequency of the three-dimensional network on chip; after receiving the temperature prediction signal, corresponding frequency adjustment measures are carried out on different partitions.
As a further improvement of the invention: in step S1, each node in one area uses the same clock signal, nodes belonging to different areas use different clock signals, and the clock signals in different areas use the same or different clock frequencies.
As a further improvement of the invention: in step S1, the partition principle is to use an equal partition manner or an unequal partition manner.
As a further improvement of the invention: data communication among all the areas is completed through asynchronous FIFO which is an asynchronous FIFO with a dual-port dual-clock structure, each port performs data storage and transmission under the control of a corresponding clock, and the two clocks are respectively the same as the clock frequency of two partitions connected with the FIFO.
As a further improvement of the invention: in step S3, it is determined according to the prediction signal and the source region, and the down-conversion process is performed on the region with too high temperature, and the original frequency maintenance process is performed on the region with normal temperature.
As a further improvement of the invention: the step S3 includes the following adjustment modes:
(a) when only one partition of adjusting signals is received, only the clock frequency of the partition receiving the adjusting signals is reduced, and the clock frequency of the partition is not restored to the initial value until a reset signal is received;
(b) when the adjustment signals of a few partitions are received, reducing the clock frequency of the partitions receiving the adjustment signals until a reset signal is received, and restoring the clock frequency of the corresponding partition to an initial value;
(c) when the adjustment signals of all the partitions are received, the clock frequency of all the partitions receiving the adjustment signals is reduced, global frequency adjustment is carried out, and the clock frequency of the corresponding partition is recovered to an initial value until a reset signal is received.
As a further improvement of the invention: in step S2, the temperature of the node in the system at the next moment is calculated by obtaining the input power of the node and the current real-time temperature; if the predicted temperature of the node exceeds a specific temperature T, transmitting the information to a frequency adjustment module to prepare for subsequent dynamic frequency adjustment; if the predicted temperature of the node does not exceed the specific temperature, the node transmits reset information to the frequency adjustment module.
Compared with the prior art, the invention has the advantages that:
1. the prediction-based three-dimensional network-on-chip dynamic frequency adjusting method divides the whole system into partitions, each partition can be regarded as a simple small-sized system, global dynamic frequency adjustment is respectively carried out on each partition, and distributed dynamic frequency adjustment is actually carried out on the whole system, so that the flexibility of the frequency adjusting method is improved, and the reduction of the system performance caused by frequency adjustment is reduced. This is because global dynamic frequency adjustment is applicable for simple small systems, but not for 3D NoC many-core systems. In one extreme case, taking global dynamic frequency adjustment only because one node in the entire system is too hot will cause a severe degradation in the overall system performance.
2. Compared with the existing adjusting strategy, the frequency adjusting part of the three-dimensional network-on-chip dynamic frequency adjusting method based on prediction has better timeliness. The existing frequency adjustment method is passive, and corresponding adjustment can be performed only after the node temperature exceeds a specific temperature value. The frequency adjusting method provided by the invention is an active prediction type, the frequency adjusting module receives information from the temperature predicting module, and frequency adjustment is carried out in advance before the node temperature is overhigh without passive waiting.
Drawings
FIG. 1 is a schematic flow diagram of the process of the present invention.
FIG. 2 is a schematic diagram of a partitioning method in an embodiment of the present invention.
Fig. 3 is a schematic diagram of the communication between the areas after the partition in the specific application example of the invention.
FIG. 4 is a flow chart illustrating the prediction of the system temperature of the three-dimensional network on chip according to the embodiment of the present invention.
Fig. 5 is a schematic flow chart of adjusting the frequency of the three-dimensional network on chip in a specific application example of the present invention.
Fig. 6 is a schematic diagram of the implementation process of dynamic frequency adjustment in a specific application example of the present invention.
Fig. 7 is a schematic diagram of the principle of the method of the present invention when applied to an embodiment.
Detailed Description
The invention will be described in further detail below with reference to the drawings and specific examples.
As shown in fig. 1, the method for adjusting the dynamic frequency of the three-dimensional network on chip based on prediction of the present invention comprises the following steps:
s1: carrying out system partitioning on the three-dimensional network on chip;
the whole system is divided into a plurality of areas, each area is called a frequency adjusting area, each node in the area uses the same clock signal, nodes belonging to different areas use different clock signals, and the clock signals of different areas can adopt the same or different clock frequencies according to corresponding requirements. The system after partitioning can perform distributed frequency adjustment or global frequency adjustment according to the actual situation, thereby reducing the performance overhead caused by dynamic frequency adjustment.
The principle of the partition should follow the working mode of the actual system, and the partition of the equal partition area is performed in this embodiment, but not limited to the equal partition area.
S2: predicting the system temperature of the three-dimensional network on chip;
in the whole system operation process, the temperature prediction module collects data information of input power and real-time temperature of each processing node of each partition, performs prediction calculation on the temperature of the node at the next moment, and generates an over-temperature signal or a reset signal according to whether the prediction result exceeds a threshold temperature, wherein the over-temperature signal or the reset signal contains regional source information of the signal besides the signal.
Namely: and calculating the temperature of the node in the system at the next moment according to a corresponding temperature prediction method by acquiring the input power and the current real-time temperature of the node. If the node predicted temperature exceeds a certain temperature T, the information is passed to the frequency adjustment module in preparation for subsequent dynamic frequency adjustment, and if the node predicted temperature does not exceed the certain temperature, a reset message is passed to the frequency adjustment module. Since the signals transmitted to the frequency adjustment module are all based on the predicted information at the next time, the method does not need to wait for the actual temperature to exceed the threshold value and take an adjustment in advance.
S3: adjusting the frequency of the three-dimensional network on chip;
after receiving the temperature prediction signal (information from the temperature prediction module), corresponding frequency adjustment measures are taken. Namely, the frequency adjustment module judges according to the signal and the source area, finally performs frequency reduction processing on the area with overhigh temperature, and performs original frequency keeping processing on the area with normal temperature. The entire system continues to operate after distributed frequency adjustment and no node exceeds the threshold temperature.
In a specific application example, the step S3 may include the following typical adjustment manners, but is not limited to the following manners.
(a) When the frequency adjusting module only receives an adjusting signal of one partition, the module only reduces the clock frequency of the partition receiving the adjusting signal until a reset signal is received, and the clock frequency of the partition is recovered to an initial value;
(b) when the frequency adjusting module receives adjusting signals of a few partitions, the module reduces the clock frequency of the partitions receiving the adjusting signals until a reset signal is received, and the clock frequency of the corresponding partition is recovered to an initial value;
(c) when the frequency adjusting module receives the adjusting signals of all the partitions, the module reduces the clock frequency of all the partitions receiving the adjusting signals, and performs global frequency adjustment until the clock frequency of the corresponding partition is recovered to the initial value after a reset signal is received.
As shown in fig. 2, the method is a partitioning method used in step S1 in the specific application example. The system of this example is an 8 x 4 3D NoC system, which is equally divided into 4 regions, region 1, region 2, region 3, and region 4. Such partition is only one of many ways of partitioning, and the partitioning depends on the way the actual system works. The same clock signal is used in each region, all operations of the intra-domain processing nodes such as data sending, data transmission path selection, data receiving and the like are synchronous with the clock signal, and the clock signals in the regions are independent from each other and can be equal or unequal in value. As shown in fig. 3, since the frequencies of the clock signals used between the regions may not be the same, in order to ensure stable and reliable data communication between the regions, the communication therebetween is performed by means of an asynchronous FIFO. The asynchronous FIFO is an asynchronous FIFO with a double-port double-clock structure, each port performs data storage and transmission under the control of a corresponding clock, and the two clocks are respectively the same as the clock frequency of two partitions connected with the FIFO. Fig. 7 is a schematic diagram of the method of the present invention applied to this embodiment.
As shown in fig. 4, the complete execution flow of step S2 in the specific application example is shown. During normal operation of the 3D NoC system, each processing node in each partition may have power input and generate heat during operation. The temperature prediction module collects the input power of the node and the corresponding real-time temperature, calculates the temperature value Tnext of the node at the next moment by utilizing the collected information, and then judges whether the temperature value exceeds the threshold temperature T. The module generates an over temperature signal if a threshold temperature is exceeded and generates a reset signal if the threshold temperature is not exceeded. These two signals are used as the final output of the temperature prediction module and are transmitted to the frequency adjustment module as input.
As shown in fig. 5, the complete execution flow of step S3 in the specific application example is shown. After receiving the result generated by the temperature prediction module, the frequency adjustment module first determines whether the signal is an over-temperature signal or a reset signal, and then determines the source area of the signal. If the signal is a signal with overhigh temperature, further determining a source region of the signal, and finally adjusting the clock frequency of the corresponding region downwards, if the signal is a reset signal, further determining the source region of the signal, and finally recovering or keeping the clock frequency of the corresponding region as an initial frequency value.
Fig. 6 is a schematic diagram illustrating a process of performing dynamic frequency adjustment of a 3D NoC system in an embodiment of the present invention. In the full-speed operation process of the system, the temperature prediction module monitors that the temperature of the node in the area 1 exceeds the threshold temperature at the next moment, sends a signal that the temperature of the area 1 is too high to the frequency adjustment module, and immediately reduces the clock frequency of the area 1 after the frequency adjustment module receives the signal, wherein all processing nodes in the area 1 work in a frequency reduction state at the moment. When the task load of the processing node in the area 1 is reduced, the corresponding node temperature is also reduced, and the temperature prediction module detects that the next moment of the node temperature in the area 1 is below the threshold temperature, the temperature prediction module sends an area 1 reset signal to the frequency adjustment module, the frequency adjustment module immediately restores the clock frequency of the area 1 to be the original frequency according to the signal, and the area 1 works in a full-speed state at this moment. In the figure, (a), (b), and (c) show different levels and degrees of frequency adjustment.
The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above-mentioned embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and embellishments within the scope of the invention may be made by those skilled in the art without departing from the principle of the invention.
Claims (7)
1. A three-dimensional network-on-chip dynamic frequency adjustment method based on prediction is characterized by comprising the following steps:
s1: carrying out system partitioning on the three-dimensional network on chip; dividing the whole system into a plurality of areas, wherein each area is called a frequency adjustment area;
s2: predicting the system temperature of the three-dimensional network on chip; in the system operation process, acquiring data information of input power and real-time temperature of each processing node of each partition, performing prediction calculation on the temperature of the node at the next moment, and generating an over-temperature signal or a reset signal according to whether the prediction result exceeds a threshold temperature;
s3: adjusting the frequency of the three-dimensional network on chip; after receiving the temperature prediction signal, corresponding frequency adjustment measures are carried out on different partitions.
2. The method of claim 1, wherein in step S1, each node in one area uses the same clock signal, nodes belonging to different areas use different clock signals, and the clock signals in different areas use the same or different clock frequencies.
3. The method as claimed in claim 1, wherein in step S1, the partition principle is equal partition or unequal partition.
4. The method according to claim 1, wherein the data communication between the areas is performed through an asynchronous FIFO, the asynchronous FIFO is an asynchronous FIFO with a dual-port dual-clock structure, each port performs data storage and transmission under control of a corresponding clock, and the two clocks have the same clock frequency as the two partitions connected to the FIFO.
5. The method as claimed in claim 1, 2, 3 or 4, wherein in step S3, the method determines the temperature of the over-temperature region according to the prediction signal and the source region, and performs down-conversion on the over-temperature region and maintains the original frequency of the normal temperature region.
6. The method for adjusting the dynamic frequency of the three-dimensional network on chip based on the prediction of claim 5, wherein the step S3 comprises the following adjustment methods:
(a) when only one partition of adjusting signals is received, only the clock frequency of the partition receiving the adjusting signals is reduced, and the clock frequency of the partition is not restored to the initial value until a reset signal is received;
(b) when the adjustment signals of a few partitions are received, reducing the clock frequency of the partitions receiving the adjustment signals until a reset signal is received, and restoring the clock frequency of the corresponding partition to an initial value;
(c) when the adjustment signals of all the partitions are received, the clock frequency of all the partitions receiving the adjustment signals is reduced, global frequency adjustment is carried out, and the clock frequency of the corresponding partition is recovered to an initial value until a reset signal is received.
7. The method for adjusting dynamic frequency of network on chip based on prediction according to claim 1, 2, 3 or 4, wherein in step S2, the input power of the node and the current real-time temperature are obtained to calculate the temperature of the node in the system at the next moment; if the predicted temperature of the node exceeds a specific temperature T, transmitting the information to a frequency adjustment module to prepare for subsequent dynamic frequency adjustment; if the predicted temperature of the node does not exceed the specific temperature, the node transmits reset information to the frequency adjustment module.
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| CN112363609B (en) * | 2020-10-21 | 2023-03-24 | 海光信息技术股份有限公司 | Method and device for reducing power consumption of network on chip, CPU chip and server |
| CN112363610B (en) * | 2020-10-21 | 2023-03-24 | 海光信息技术股份有限公司 | Method and device for reducing power consumption of network on chip, CPU chip and server |
| CN112394807B (en) * | 2020-11-17 | 2023-08-29 | 海光信息技术股份有限公司 | Method and device for reducing network-on-chip power consumption, CPU chip and server |
| CN113157438A (en) * | 2021-03-10 | 2021-07-23 | 电子科技大学 | Dynamic thermal management method of multi-core microprocessor with high energy efficiency ratio |
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