CN106649162A - Pci-Express multi-port aggregation system and use method thereof - Google Patents
Pci-Express multi-port aggregation system and use method thereof Download PDFInfo
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- CN106649162A CN106649162A CN201611177522.4A CN201611177522A CN106649162A CN 106649162 A CN106649162 A CN 106649162A CN 201611177522 A CN201611177522 A CN 201611177522A CN 106649162 A CN106649162 A CN 106649162A
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- 238000000034 method Methods 0.000 title claims abstract description 23
- 238000004220 aggregation Methods 0.000 title abstract 2
- 230000002776 aggregation Effects 0.000 title abstract 2
- 238000004891 communication Methods 0.000 abstract description 7
- 230000005540 biological transmission Effects 0.000 abstract description 5
- 238000006116 polymerization reaction Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0024—Peripheral component interconnect [PCI]
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- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Abstract
The invention provides a Pci-Express multi-port aggregation system and a use method thereof, and belongs to the technical field of communication transmission. The system comprises a CPU, a main board and a Pci Express expansion slot. The main board carries the CPU and the Pci Express expansion slot, and provides a data transmission path between the CPU and the Pci Express expansion slot. The CPU is connected with the Pci Express expansion slot through a circuit. The single Pci Express expansion slot is internally provided with M link channel numbers, and the representing mode of the types of the link channel numbers is XM, wherein X represents the link channel numbers, and M is an integer larger than or equal to 4; the single Pci Express expansion slot is provided with N ports, wherein N is an integer larger than or equal to 2, and M/N is an even number. By means of the system, an originally used circuit connection structure in a standard part is divided into two or more links capable of being connected with two or more ports through a single link capable of only being connected with one port, a device (inserted card) supporting multiple links can be inserted to the slot which only supports one link before, and the communication bandwidth is doubled.
Description
Technical field
The invention belongs to communication transmission technology field, and in particular to for a kind of Pci-Express multiports paradigmatic system and
Its using method.
Background technology
Pci Express are Principle of External Device Extension STD bus in current computer system, in personal computer or clothes
In business device, Pci Express are provided in the form of expansion slot, each Pci Express expansion slot one Pci of correspondence
Express ports (PORT), these Pci Express expansion slots press link channel number（LANE）There are X1, X4, X8, X16 etc.
Several types are provided, because the link channel number that primary processor is provided（LANE）It is limited, so ordinary personal computer or clothes
Business device mainboard is arranged to single port or multiple ports and is supported with providing many slots by circuit limited passage link, and one
Individual slot only distributes a port（PORT), Pci Express exchange chips are added in system（Switch it is) still such afterwards.
Current arrangements are trees, and the passage of big quantity can arrange and be dispersed into multiport and use, conventional system one
Slot correspondence a port（PORT), a piece of single port chip is also only configured on equipment card, when a wide slot（Such as x16
Slot）The equipment card of x8 width is plugged, 8 links can only be used after link training, it is impossible to fully obtain the link that system is provided
Bandwidth, corresponding expansion equipment chip, present situation is that Pci Express endpoint devices number of links is less than or equal to 8 in device chip
Passage（lane).
Therefore, it is necessary to provide a kind of scheme, the slot of script a port is allowed to be arranged to multiport, and in device element
Middle polymerization is used, and the branches and leaves of script tree is converged in expansion equipment and is used, the demand double so as to meet bandwidth.
The content of the invention
It is an object of the invention to overcome defect and deficiency mentioned above, and provide a kind of Pci-Express multiports
Paradigmatic system.
Another object of the present invention is to provide a kind of using method of Pci-Express multiports polymerization.
The present invention realizes that the technical scheme that its purpose is adopted is as follows.
A kind of Pci-Express multiports paradigmatic system, including CPU, mainboard, Pci Express expansion slots；The master
Plate supporting CPU and Pci Express expansion slots, and the data transmission route between CPU and Pci Express expansion slots is provided
Footpath；The CPU and Pci Express expansion slot connections；The link of M bars is set in single Pci Express expansion slots
Port number, the method for expressing of link channel several classes of type is XM, wherein, X represents link channel number, and M is the integer more than or equal to 4；
Single Pci Express expansion slots are provided with N number of port, wherein, N is the integer more than or equal to 2, and M/N is even number.
A kind of Pci-Express multiports paradigmatic system, including CPU, mainboard, Pci Express adapters, EEPROM,
Pci Express expansion slots；The mainboard supporting CPU, Pci Express adapters, EEPROM and Pci Express extensions
Slot, and the data transmission route between Pci Express adapters and CPU, EEPROM, Pci Express expansion slots is provided
Footpath；The Pci Express adapter connections have CPU, EEPROM, Pci Express expansion slots；EEPROM is stored
The configuration information of Pci Express adapters；The link channel number of the Pci Express expansion slots is XM, and wherein X is represented
Link channel number, M is the integer more than or equal to 4；The Pci Express expansion slots are provided with N number of port, wherein, N is big
In the integer equal to 2, M/N is even number.
A kind of Pci-Express multiports paradigmatic system, also including device element, the quantity of device element is more than or equal to 2
And less than or equal to N；Single Pci Express expansion slots are arranged to multiple ports；Each device element is interior to be provided with one
Single-ended chip；Each single-ended chip connects a port.
A kind of Pci-Express multiports paradigmatic system, also including device element；Single Pci Express extensions are inserted
Groove is arranged to multiport；A multi-endpoint chip is provided with device element；Multi-endpoint chip connects A port simultaneously, wherein, A
For integer, and 2≤A≤N.
A kind of using method of Pci-Express multiports paradigmatic system, comprises the following steps：
Step one, by single Pci Express expansion slots N number of port is arranged to；The CPU and Pci Express extend
Slot connection；The link channel number of M bars, the expression of link channel several classes of type are set in single Pci Express expansion slots
Method is XM, wherein, X represents link channel number, and M is the integer more than or equal to 4；Port is divided by CPU configuration pins, it is single
One Pci Express expansion slots are divided into N number of port, wherein, N is the integer more than or equal to 2, and M/N is even number；
Step 2, each port connects single-ended chip of a device element.
A kind of using method using Pci Express multiport paradigmatic systems as claimed in claim 4, its feature exists
In comprising the following steps：
Step one, by single Pci Express expansion slots N number of port is arranged to；The CPU and Pci Express extend
Slot connection；The link channel number of M bars, the expression of link channel several classes of type are set in single Pci Express expansion slots
Method is XM, wherein, X represents link channel number, and M is the integer more than or equal to 4；Port is divided by CPU configuration pins, it is single
One Pci Express expansion slots are divided into N number of port, wherein, N is the integer more than or equal to 2, and M/N is even number；
Step 2, the multi-endpoint chip of device element connects A port, wherein, A is integer, and 2≤A≤N.
The present invention the circuit connection structure in the standard component for using originally by single link (port can only be connected),
It is divided into two or more links（Two port or multiple port can be connected), can allow the device for supporting multiple links（Insert
Card）It is inserted on the slot of one link of original only support, realizes that communication bandwidth doubles.
Description of the drawings
Fig. 1 is the structural representation of embodiment one；
Fig. 2 is the structural representation of embodiment two；
Fig. 3 is a kind of structural representation of embodiment three；
Fig. 4 is another kind of structural representation of embodiment three；
Fig. 5 is a kind of structural representation of example IV；
Fig. 6 is another kind of structural representation of example IV；
In figure：1-CPU, 2- mainboard, 3-Pci Express expansion slots, 4- ports, 5-Pci Express adapters, 6-
Single-ended chip of EEPROM, 7- device element, 8-, 9- multi-endpoint chips.
Specific embodiment
Below in conjunction with the accompanying drawings, the present invention is described in further detail.
Embodiment one.
A kind of Pci-Express multiports paradigmatic system, including CPU1, mainboard 2, Pci Express expansion slots 3.
The supporting CPU 1 of the mainboard 2 and Pci Express expansion slots 3, and it is slotting to provide CPU1 and Pci Express extensions
Data transfer path between groove 3.
The CPU1 and the connection of Pci Express expansion slots 3.
The link channel number of M bars is set in single Pci Express expansion slots 3（LANE）, link channel number（LANE）Class
The method for expressing of type is XM, wherein, X represents link channel number（LANE）, M is the integer more than or equal to 4.
Single Pci Express expansion slots 3 are provided with N number of port 4, wherein, N is the integer more than or equal to 2, and M/N
For even number.
For example, the link channel number of Pci Express expansion slots 3（LANE）There are the several types such as X1, X4, X8, X16 to carry
For.As shown in figure 1, when the link channel number of Pci Express expansion slots 3（LANE）For X16 when, 2 ends can be divided into
Mouthful（2X8）Or 4 ports（4X4）Or 16 ports（16X1）.
By cpu configuration pins（pin）To divide port（port）.In INTEL（4th Generation Intel®
Core™ processor）On I7-4700 CPU, signal pins CFG [19 are configured:0] CFG [6 in:5] for PCI allocation
Express link modes, mode is as follows：
• CFG[6:5]: PCI Express* Bifurcation:
— 00 = 1 x8, 2 x4 PCI Express*
— 01 = reserved
— 10 = 2 x8 PCI Express*
— 11 = 1 x16 PCI Express*
In conventional application, PCI Express are configured to for link to be divided into different in width port, and are connected respectively to different
On expansion slot, and this method configures single Pci Express port modes, is divided into the port of different in width, its link
Lane is connected on same expansion slot and uses.
The Pci Express expansion slots of cpu and x16 are all the standard components in current computer, what is used originally
Circuit connection structure in standard component is divided into two or more links by single link (can only connect a port)（Can be with
Two port or multiple port of connection), can allow the device for supporting multiple links（Plug-in card）It is inserted into one link of original only support
On slot, realize that communication bandwidth doubles.
Embodiment two.
A kind of Pci-Express multiports paradigmatic system, including CPU1, mainboard 2, Pci Express adapters 5,
EEPROM6, Pci Express expansion slots 3.
The supporting CPU 1 of the mainboard 2, Pci Express adapters 5, EEPROM6 and Pci Express expansion slots 3, and
Data transfer path between Pci Express adapters 5 and CPU1, EEPROM6, Pci Express expansion slots 3 is provided.
The Pci Express adapters 5, i.e. Pci Express Switch, connection have CPU1, EEPROM6,
Pci Express expansion slots 3.
The link channel number of the Pci Express expansion slots 3（LANE）For XM, wherein X represents link channel number, M
It is the integer more than or equal to 4.
The Pci Express expansion slots 3 are provided with N number of port (port), wherein, N is the integer more than or equal to 2,
M/N is even number.
For example, the link channel number of Pci Express expansion slots 3（LANE）There are the several types such as X1, X4, X8, X16
There is provided.As shown in Fig. 2 when the link channel number of Pci Express expansion slots 3（LANE）For X16 when, 2 can be divided into
Port（2X8）Or 4 ports（4X4）Or 16 ports（16X1）.
Pci Express adapters 5 are arranged by PIN and configuration EEPROM is arranged, and X16 slots are arranged to many by support
Individual port (port), configures with CPU, and PCI Express are configured to for link to be divided into different in width port in conventional application,
And be connected on different expansion slots, and this method configuration Pci Express port modes, it is divided into different in width
Port, its link lane is connected on same expansion slot and uses.Dividing mode can be：2X8、4X4、16X1.
The configuration information of EEPROM6 storage Pci Express adapters 5.
The STRAP_STN [5 in PLX PEX_8796 exchange chips:0]_PORTCFG[1:0] pin is used to configure correspondence
The port patterns of Station, mode is as follows：
00 =0=Reserved
0Z=1=X16
01=2=X8X8
Z0=3=X8X4X4
ZZ=4=X4X4X4X4
Embodiment three.
As shown in Figure 3 and Figure 4, on the basis of embodiment one or two, this Pci Express multiport paradigmatic systems, also
Including device element 7, the quantity of device element 7 is more than or equal to 2 and less than or equal to N.
In embodiment one or two, single Pci Express expansion slots 3 have been set to multiple ports 4.
Each device element 7 is interior to be provided with a single-ended chip 8.Each single-ended chip 8 connects a port 4.
The using method of the Pci Express multiports polymerization of single-ended point device device is as follows：
Step one, by single Pci Express expansion slots 3 N number of port 4 is arranged to；The CPU1 and Pci Express expand
The exhibition connection of slot 3；The link channel number of M bars is set in single Pci Express expansion slots 3（LANE）, link channel number
（LANE）The method for expressing of type is XM, wherein, X represents link channel number（LANE）, M is the integer more than or equal to 4；Pass through
Dividing port 4, single Pci Express expansion slots 3 are divided into N number of port 4 to CPU1 configuration pins, wherein, N be more than etc.
In 2 integer, and M/N is even number；
Step 2, each port 4 connects single-ended chip 8 of a device element 7.
In conventional application, the PCI Express link lane of single-ended chip of device element require connect to Pci
In the data channel that lane0 starts in Express expansion slots, such as single-ended chip is x8 patterns, then single-ended chip
Lane0 ~ 7 connection Pci Express expansion slots lane0 ~ 7, Pci Express expansion slot lane8 ~ lane15 can not profit
With.
This method is divided into Pci Express expansion slots after multiport, it is possible to connect multiple single-ended chips.
In Fig. 3 and Fig. 4, the lane0 ~ lane7 of single-ended of left side chip connects the lane0 ~ lane7 of Pci Express expansion slots, right
Lane0 ~ lane7 connection Pci Express expansion slot lane8 ~ lane15 of single-ended of side chip, realize 1 times of Expansion.
Example IV.
As shown in Figure 5 and Figure 6, on the basis of embodiment one or two, this Pci Express multiport paradigmatic systems, also
Including device element 7.
In embodiment one or two, single Pci Express expansion slots 3 have been set to multiport.
A multi-endpoint chip 9 is provided with device element 7.Multi-endpoint chip 9 connects A port simultaneously, wherein, A is whole
Number, and 2≤A≤N.
Therefore, the multiple ports (port) for providing in slot interface on device extension card are connected to same device element
On.For example, device element 7 is typically Altera FPGA devices, integrated 4 ~ 6 Pci Express on high-end FPGA device
port。
The using method of the Pci Express multiports polymerization of multi-endpoint device element is as follows：
Step one, by single Pci Express expansion slots 3 N number of port 4 is arranged to；The CPU1 and Pci Express expand
The exhibition connection of slot 3；The link channel number of M bars is set in single Pci Express expansion slots 3（LANE）, link channel number
（LANE）The method for expressing of type is XM, wherein, X represents link channel number（LANE）, M is the integer more than or equal to 4；Pass through
Dividing port 4, single Pci Express expansion slots 3 are divided into N number of port 4 to CPU1 configuration pins, wherein, N be more than etc.
In 2 integer, and M/N is even number；
Step 2, the multi-endpoint chip 9 of device element 7 connects A port, wherein, A is integer, and 2≤A≤N.
Port0 lane0 in multi-endpoint chip ~ lane7 connection Pci Express expansion slot lane0 ~ lane7 are more
Port1 lane0 ~ lane7 connected slots lane8 ~ lane15 in end points chip.1 times of Expansion is realized, while multiple ends
Point port can be in chip internal communication or while using the realisation energy extension of communication bandwidth of two port.
The present invention is illustrated according to embodiment, on the premise of without departing from present principles, if this device can also make
Dry deformation and improvement.It should be pointed out that the technical scheme that the mode such as all employing equivalents or equivalent transformation is obtained, all falls within this
In the protection domain of invention.
Claims (6)
1. a kind of Pci-Express multiports paradigmatic system, it is characterised in that including CPU（1）, mainboard（2）、Pci Express
Expansion slot（3）；The mainboard（2）Supporting CPU（1）With Pci Express expansion slots（3）, and CPU is provided（1）And Pci
Express expansion slots（3）Between data transfer path；The CPU（1）With Pci Express expansion slots（3）Circuit connects
Connect；Single Pci Express expansion slots（3）The link channel number of M bars is inside set, the method for expressing of link channel several classes of type is
XM, wherein, X represents link channel number, and M is the integer more than or equal to 4；Single Pci Express expansion slots（3）It is provided with N
Individual port（4）, wherein, N is the integer more than or equal to 2, and M/N is even number.
2. a kind of Pci-Express multiports paradigmatic system, it is characterised in that including CPU（1）, mainboard（2）、Pci Express
Adapter（5）、EEPROM（6）, Pci Express expansion slots（3）；The mainboard（2）Supporting CPU（1）、Pci Express
Adapter（5）、EEPROM（6）With Pci Express expansion slots（3）, and Pci Express adapters are provided（5）With CPU
（1）、EEPROM（6）, Pci Express expansion slots（3）Between data transfer path；The Pci Express adapters
（5）Connection has CPU（1）、EEPROM（6）, Pci Express expansion slots（3）； EEPROM（6）Storage Pci
Express adapters（5）Configuration information；The Pci Express expansion slots（3）Link channel number be XM, wherein X tables
Show link channel number, M is the integer more than or equal to 4；The Pci Express expansion slots（3）N number of port is provided with, wherein,
N is the integer more than or equal to 2, and M/N is even number.
3. a kind of Pci-Express multiports paradigmatic system as claimed in claim 1 or 2, it is characterised in that also including equipment
Device（7）, device element（7）Quantity more than or equal to 2 and less than or equal to N；Single Pci Express expansion slots（3）If
It is set to multiple ports（4）；Each device element（7）A single-ended chip is provided with（8）；Each single-ended chip（8）Even
Connect a port（4）.
4. a kind of Pci-Express multiports paradigmatic system as claimed in claim 1 or 2, it is characterised in that also including equipment
Device（7）；Single Pci Express expansion slots（3）It is arranged to multiport；Device element（7）Inside it is provided with a multi-endpoint
Chip（9）；Multi-endpoint chip（9）Connect A port simultaneously, wherein, A is integer, and 2≤A≤N.
5. a kind of using method using Pci Express multiport paradigmatic systems as claimed in claim 3, its feature exists
In comprising the following steps：
Step one, by single Pci Express expansion slots（3）It is arranged to N number of port（4）；The CPU（1）With Pci
Express expansion slots（3）Connection；Single Pci Express expansion slots（3）Inside set the link channel number of M bars, link
The method for expressing of port number type is XM, wherein, X represents link channel number, and M is the integer more than or equal to 4；By CPU（1）Match somebody with somebody
Put pin to divide port（4）, single Pci Express expansion slots（3）It is divided into N number of port（4）, wherein, N be more than etc.
In 2 integer, and M/N is even number；
Step 2, each port（4）One device element of connection（7）Single-ended chip（8）.
6. a kind of using method using Pci Express multiport paradigmatic systems as claimed in claim 4, its feature exists
In comprising the following steps：
Step one, by single Pci Express expansion slots（3）It is arranged to N number of port（4）；The CPU（1）With Pci
Express expansion slots（3）Connection；Single Pci Express expansion slots（3）Inside set the link channel number of M bars, link
The method for expressing of port number type is XM, wherein, X represents link channel number, and M is the integer more than or equal to 4；By CPU（1）Match somebody with somebody
Put pin to divide port（4）, single Pci Express expansion slots（3）It is divided into N number of port（4）, wherein, N be more than etc.
In 2 integer, and M/N is even number；
Step 2, device element（7）Multi-endpoint chip（9）A port of connection, wherein, A is integer, and 2≤A≤N.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611177522.4A CN106649162A (en) | 2016-12-19 | 2016-12-19 | Pci-Express multi-port aggregation system and use method thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611177522.4A CN106649162A (en) | 2016-12-19 | 2016-12-19 | Pci-Express multi-port aggregation system and use method thereof |
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ID=58833328
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107885923A (en) * | 2017-10-31 | 2018-04-06 | 郑州云海信息技术有限公司 | A kind of method for improving signal quality based on redriver parameter adaptives |
| CN107943730A (en) * | 2017-12-06 | 2018-04-20 | 郑州云海信息技术有限公司 | A kind of system for supporting NVMe agreement PCIE signals |
| CN108763771A (en) * | 2018-05-30 | 2018-11-06 | 郑州云海信息技术有限公司 | A kind of PCIe link performance optimization method and system |
| CN111464342A (en) * | 2020-03-19 | 2020-07-28 | 烽火通信科技股份有限公司 | Distributed routing convergence method and system for network equipment management information |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070239925A1 (en) * | 2006-04-11 | 2007-10-11 | Nec Corporation | PCI express link, multi host computer system, and method of reconfiguring PCI express link |
| CN101101583A (en) * | 2006-07-05 | 2008-01-09 | 友劲科技股份有限公司 | PCI-Express multi-mode extended card and communication device possessing the extended card |
| US20080065805A1 (en) * | 2006-09-11 | 2008-03-13 | Cameo Communications, Inc. | PCI-Express multimode expansion card and communication device having the same |
| CN101727419A (en) * | 2008-10-16 | 2010-06-09 | 英业达股份有限公司 | Computer capable of automatically configuring bandwidth according to types of interface expansion cards |
| CN102810085A (en) * | 2011-06-03 | 2012-12-05 | 鸿富锦精密工业（深圳）有限公司 | PCI-E expansion system and method |
| CN206312133U (en) * | 2016-12-19 | 2017-07-07 | 杭州海莱电子科技有限公司 | A kind of Pci Express multiport paradigmatic systems |
-
2016
- 2016-12-19 CN CN201611177522.4A patent/CN106649162A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070239925A1 (en) * | 2006-04-11 | 2007-10-11 | Nec Corporation | PCI express link, multi host computer system, and method of reconfiguring PCI express link |
| CN101101583A (en) * | 2006-07-05 | 2008-01-09 | 友劲科技股份有限公司 | PCI-Express multi-mode extended card and communication device possessing the extended card |
| US20080065805A1 (en) * | 2006-09-11 | 2008-03-13 | Cameo Communications, Inc. | PCI-Express multimode expansion card and communication device having the same |
| CN101727419A (en) * | 2008-10-16 | 2010-06-09 | 英业达股份有限公司 | Computer capable of automatically configuring bandwidth according to types of interface expansion cards |
| CN102810085A (en) * | 2011-06-03 | 2012-12-05 | 鸿富锦精密工业（深圳）有限公司 | PCI-E expansion system and method |
| CN206312133U (en) * | 2016-12-19 | 2017-07-07 | 杭州海莱电子科技有限公司 | A kind of Pci Express multiport paradigmatic systems |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107885923A (en) * | 2017-10-31 | 2018-04-06 | 郑州云海信息技术有限公司 | A kind of method for improving signal quality based on redriver parameter adaptives |
| CN107943730A (en) * | 2017-12-06 | 2018-04-20 | 郑州云海信息技术有限公司 | A kind of system for supporting NVMe agreement PCIE signals |
| WO2019109684A1 (en) * | 2017-12-06 | 2019-06-13 | 郑州云海信息技术有限公司 | System supporting nvme protocol pcie signal |
| CN108763771A (en) * | 2018-05-30 | 2018-11-06 | 郑州云海信息技术有限公司 | A kind of PCIe link performance optimization method and system |
| CN108763771B (en) * | 2018-05-30 | 2021-11-02 | 郑州云海信息技术有限公司 | PCIe link performance optimization method and system |
| CN111464342A (en) * | 2020-03-19 | 2020-07-28 | 烽火通信科技股份有限公司 | Distributed routing convergence method and system for network equipment management information |
| CN111464342B (en) * | 2020-03-19 | 2023-04-07 | 烽火通信科技股份有限公司 | Distributed routing convergence method and system for network equipment management information |
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Application publication date: 20170510 |