CN106648513B - Picture display control method and device, microcontroller and electronic cigarette - Google Patents

Picture display control method and device, microcontroller and electronic cigarette Download PDF

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CN106648513B
CN106648513B CN201611237982.1A CN201611237982A CN106648513B CN 106648513 B CN106648513 B CN 106648513B CN 201611237982 A CN201611237982 A CN 201611237982A CN 106648513 B CN106648513 B CN 106648513B
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picture
dma controller
idle state
displayed
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CN106648513A (en
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周立功
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Guangzhou Ligong Science And Technology Co Ltd
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Guangzhou Ligong Science And Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication

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  • Controls And Circuits For Display Device (AREA)
  • Digital Computer Display Output (AREA)

Abstract

The invention relates to a picture display control method, a picture display control device, a microcontroller and an electronic cigarette, wherein the method comprises the following steps: calculating a storage base address of a picture to be displayed according to a target application; acquiring picture parameters of a picture to be displayed; acquiring buffer areas in an idle state, and controlling a DMA controller to read N rows of data from the position of a storage base address to the buffer areas in the idle state in sequence, wherein the number of the buffer areas at least comprises two; and when detecting that the data exist in the buffer areas, respectively transmitting the data stored in each buffer area to a display screen for displaying. Through being provided with a plurality of buffers, realize that the MDA controller reads the pixel data of waiting to show the picture and microcontroller sends the data of reading to the display screen and carries out the parallel processing that shows, practice thrift the time that the picture shows and consume, improve the speed that the picture shows. The method does not need to additionally increase the video memory, and has low cost and high performance.

Description

Picture display control method and device, microcontroller and electronic cigarette
Technical Field
The invention relates to the technical field of microcontrollers, in particular to a picture display control method and device, a microcontroller and an electronic cigarette.
Background
Currently, there are microcontrollers with and without LCD controllers on the market, and generally, a system with an LCD controller has a relatively high image display performance, and the display content update speed does not have a significant delay. Systems without LCD controllers usually require their own LCD with on-screen display, and such systems have limited image update rate, poor visual effect, and low cost due to the communication mode.
Disclosure of Invention
In view of the above, it is necessary to provide a low-cost and high-performance picture display control method and apparatus, a microcontroller, and an electronic cigarette.
A picture display control method includes:
calculating a storage base address of a picture to be displayed according to a target application;
acquiring picture parameters of a picture to be displayed;
acquiring buffer areas in an idle state, and controlling a DMA controller to read N rows of data from the position of the storage base address in a memory to the buffer areas in the idle state in sequence, wherein the number of the buffer areas at least comprises two;
and when detecting that data exist in the cache regions, respectively transmitting the data stored in each cache region to a display screen for displaying.
A picture display control apparatus comprising: the device comprises a calculation module, an acquisition module, a control module and a transmission module;
the computing module is used for computing the storage base address of the picture to be displayed according to the target application;
the acquisition module is used for acquiring picture parameters of a picture to be displayed;
the control module is used for acquiring the buffer areas in the idle state and controlling the DMA controller to read N rows of data from the position of the storage base address in the memory to the buffer areas in the idle state in sequence, wherein the number of the buffer areas is at least two;
and the transmission module is used for transmitting the data stored in each cache region to a display screen for displaying when the data in the cache regions are detected.
A microcontroller comprises the picture display control device.
An electronic cigarette comprises a DMA controller, a Flash chip, a display screen and the microcontroller; the FLASH chip and the display screen are connected with the microcontroller through an SPI interface; the DMA controller and the microcontroller are connected through a system bus.
According to the picture display control method and device, the microcontroller and the electronic cigarette, the plurality of cache areas are arranged, the MDA controller sequentially sends the N rows of data of the picture to be displayed to the cache areas in an idle state, when the cache areas are detected to have the data, the microcontroller respectively transmits the data of the cache areas to the display screen for displaying, so that the MDA controller reads the pixel data of the picture to be displayed and the microcontroller sends the read data to the display screen for displaying in parallel, the time consumed by picture display is saved, and the picture display speed is improved. The method does not need to additionally increase the video memory, and has low cost and high performance.
Drawings
Figure 1 is a block diagram of the structure of an electronic cigarette of one embodiment;
FIG. 2 is a flowchart of a picture display control method according to an embodiment;
FIG. 3 is a flowchart illustrating steps of controlling a DMA controller to read data from a memory according to one embodiment of a picture display control method;
FIG. 4 is a flowchart of a method for controlling display of a picture according to an embodiment;
fig. 5 is a block diagram of a picture display control apparatus according to an embodiment.
Detailed Description
In one embodiment, an electronic cigarette is provided, as shown in fig. 1, including a DMA (Direct Memory Access) controller 102, a Flash chip 104, a display screen 106, and a microcontroller 108, where the Flash chip 104 and the display screen 106 are connected to the microcontroller 108 through an SPI interface, and the DMA controller 102 and the microcontroller 108 are connected through a system bus.
The FLASH chip 104 is used for storing picture data, the DMA controller 102 is provided with a plurality of buffer areas for sequentially copying the N-line data of the picture to be displayed from the FLASH chip to an idle buffer area, and the microcontroller sends the data of the buffer areas to the display screen for displaying.
In a particular embodiment, a DMA controller is provided with a first buffer and a second buffer. And when the data of the first cache region is not transmitted, the first cache region is in a busy state, and the DMA controller copies the next N rows of data in the FLASH chip of the picture to be displayed to the second cache region. Meanwhile, the microprocessor 108 sends the data of the buffer area to the display screen 106 for displaying, and the performance of picture display is improved through the parallel work of the microcontroller 108 and the DMA controller 102.
In one embodiment, a picture display control method is provided, as shown in fig. 2, including:
s202: and calculating the storage base address of the picture to be displayed according to the target application.
The target application refers to an application program to be executed by the microprocessor. Taking the electronic cigarette as an example, the application programs include application programs such as ignition and adjustment, and pictures displayed on the display screen by different application programs are different.
The data of the picture to be displayed is burned in the FLASH chip in a binary form, and the storage base address refers to the initial storage address of the pixel data corresponding to the display area of the picture to be displayed, which is calculated according to the target application, in the FLASH chip.
S204: and acquiring picture parameters of the picture to be displayed.
The picture parameters of the picture to be displayed comprise the size of the picture, specifically the length and the width of the picture, and the unit of the size of the picture is a pixel.
S206: and acquiring the buffer areas in the idle state, and controlling the DMA controller to read N rows of data from the position for storing the base address in the memory to the buffer areas in the idle state in sequence, wherein the number of the buffer areas at least comprises two.
In this embodiment, the number of cache regions is at least two. Specifically, the microprocessor controls the DMA controller to read the first N rows of data from the location of the base address in the memory to the idle first buffer area, and then controls the DMA controller to read the next N rows of data of the picture to be displayed to the second buffer area, and so on. The memory in this embodiment may be a false chip.
S206: and when detecting that the data exist in the buffer areas, respectively transmitting the data stored in each buffer area to a display screen for displaying.
In this embodiment, when it is detected that the data exists in the buffer area, the data in the buffer area is transmitted to the display screen for displaying. The step and the step that the DMA controller reads the data of the picture to be displayed to the idle cache region are carried out in parallel, the two steps are not conflicted, the DMA controller reads N rows of data from the memory to the idle cache region in sequence, and when the data in the cache region is detected, the microprocessor transmits the data in the cache region to the display screen for displaying.
In the process of displaying the picture, the time consumed by the two steps of reading the pixel data of the picture to be displayed from the memory and sending the read data to the display screen for displaying is longest. In this embodiment, through being provided with a plurality of buffers, the MDA controller sends the buffer of idle state with the N row data of waiting to show the picture in proper order, and when detecting that the buffer has data, microcontroller transmits the data of each buffer to the display screen respectively and shows, thereby realize that the MDA controller reads the pixel data of waiting to show the picture and microcontroller sends the data of reading to the display screen and carries out the parallel processing that shows, practice thrift the time that the picture shows and consume, improve the speed that the picture shows. The method does not need to additionally increase the video memory, and has low cost and high performance.
In another embodiment, as shown in fig. 3, step S206 specifically includes:
s2062: and acquiring a buffer area in an idle state, and controlling the DMA controller to read the N rows of data from the position for storing the base address to one of the buffers in the idle state.
Specifically, the method comprises the following steps: acquiring a buffer area in an idle state, and controlling a DMA controller to read N rows of data from a position for storing a base address to one of buffers in the idle state; the state of the buffer area storing the data is set to busy.
S2064: and judging whether the data of the picture to be displayed is read completely according to the picture parameters.
S2066: and marking the first pixel data of the (N + 1) th row as a storage base address, and returning to the step S2062.
Step S208 includes: when detecting that data exist in the cache regions, transmitting the data stored in each cache region to a display screen for displaying; and setting the state of the buffer zone for completing the data transmission to be idle.
In this embodiment, the state of the buffer area in which the data is stored is set to be busy, the state of the buffer area in which the data transmission is completed is set to be idle, and when the data of the picture to be displayed is not completely read, the DMA controller is controlled to read N lines of data from the position in which the base address is stored to one of the buffers in the idle state, so that the DMA controller can continuously read the pixel data of the picture to be displayed from the accessor to the buffer. The microcontroller and the DMA controller can work in a parallel mode, the hardware performance is exerted to the greatest extent, the capability of a system for updating pictures is accelerated, and the picture updating speed can be as high as 12 frames/second.
In the following, a description will be given taking an example in which the DMA controller is provided with two buffer areas. In a specific embodiment, the DMA controller is provided with two buffers, a first buffer and a second buffer. As shown in fig. 4, the picture display control method includes the following steps:
s401: and calculating the storage base address of the picture to be displayed according to the target application.
S402: and acquiring picture parameters of the picture to be displayed.
S403: and controlling the DMA controller to start, and reading N rows of data from the position storing the base address in the memory to the first buffer area in an idle state.
S404: and judging whether the data of the picture to be displayed is read completely according to the picture parameters of the picture to be displayed. If not, go to step S405. And if so, notifying other display components on the picture to update.
S405: it is determined which buffer is being operated by the DMA. If the first cache region is being operated, step S4061 is performed, and if the second cache region is being operated, step S4062 is performed.
S4061: waiting for the DMA controller's transfer to complete in the first buffer.
S4071: and controlling the DMA controller to read the downlink data from the memory to the second buffer area.
S4081: and sending the data of the first cache region to a display screen for displaying.
S4062: waiting for the DMA controller's transfer to complete in the second buffer.
S4072: and controlling the DMA controller to read the downlink data from the memory to the first buffer area.
S4082: and waiting for the data in the second buffer area to be sent to the display screen for display.
After the steps of steps S4081 and S4082, the process returns to step S404.
According to the picture display control method, the DMA can be a coprocessor specially used for data transportation, so that two buffer areas which are large enough are opened, the DMA is started firstly in each operation, the DMA is enabled to transport picture data from the SPI Flash to one of the buffer areas, at the moment, the MCU sends the picture data in the other buffer area which is obtained before to the TFT, and through the method, the MCU and the DMA can work in a parallel mode, the hardware performance is exerted to the maximum extent, and the picture updating capability of a system is accelerated.
A picture display control device, as shown in FIG. 5, includes a calculation module 501, an acquisition module 502, a control module 503, and a transmission module 504.
The calculating module 501 is configured to calculate a storage base address of the to-be-displayed picture according to the target application.
The obtaining module 502 is configured to obtain a picture parameter of a picture to be displayed.
The control module 503 is configured to obtain a buffer area in an idle state, and control the DMA controller to sequentially read N rows of data from a location in the memory where the base address is stored to the buffer area in the idle state, where the number of the buffer areas is at least two.
The transmission module 504 is configured to transmit the data stored in each buffer area to a display screen for displaying when it is detected that the data exists in the buffer area.
In this embodiment, through being provided with a plurality of buffers, the MDA controller sends the buffer of idle state with the N row data of waiting to show the picture in proper order, and when detecting that the buffer has data, microcontroller transmits the data of each buffer to the display screen respectively and shows, thereby realize that the MDA controller reads the pixel data of waiting to show the picture and microcontroller sends the data of reading to the display screen and carries out the parallel processing that shows, practice thrift the time that the picture shows and consume, improve the speed that the picture shows. The method does not need to additionally increase the video memory, and has low cost and high performance.
In another embodiment, the control module comprises: the device comprises a reading module, a judging module and a marking module.
The reading module is used for acquiring the buffer area in the idle state and controlling the DMA controller to read the N rows of data from the position for storing the base address to one of the buffer areas in the idle state;
the judging module is used for judging whether the data of the picture to be displayed is read completely according to the picture parameters;
and the marking module is used for marking the first pixel data of the (N + 1) th row as a storage base address when the judgment result of the judgment module is negative.
In another embodiment, the apparatus further includes a setting module, configured to set a state of the buffer storing the data to busy, and set a state of the buffer completing the data transmission to idle.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (6)

1. A picture display control method, comprising:
calculating a storage base address of a picture to be displayed according to a target application; the target application refers to an application program to be executed by the microprocessor, and the storage base address refers to an initial storage address of pixel data in the chip, corresponding to a picture area of a picture to be displayed, calculated according to the target application;
acquiring picture parameters of a picture to be displayed;
the method comprises the steps of obtaining a buffer area in an idle state, controlling a DMA controller to read first N lines of data from a position of a storage base address to the first buffer area in the idle state in sequence, and then controlling the DMA controller to read the next N lines of data of a picture to be displayed to a second buffer area; the cache regions at least comprise two;
when detecting that data exist in the cache regions, respectively transmitting the data stored in each cache region to a display screen for displaying, and realizing parallel processing with a DMA controller for reading the data from a memory;
the step of controlling the DMA controller to read N rows of data from the position of the storage base address in the memory to the buffer area in the idle state sequentially comprises the following steps:
acquiring a buffer area in an idle state, and controlling a DMA controller to read N rows of data from the position of the storage base address to one of the buffer areas in the idle state;
judging whether the data of the picture to be displayed is read completely according to the picture parameters;
and if not, marking the first pixel data of the (N + 1) th line as a storage base address, returning to the cache region for acquiring the idle state, and controlling the DMA controller to read the N lines of data from the position of the storage base address to one of the cache regions in the idle state, so that the DMA controller continuously reads the pixel data of the picture to be displayed from the memory to cache.
2. The method of claim 1, wherein the step of obtaining a buffer in an idle state and controlling the DMA controller to read N rows of data from the location of the storage base to one of the buffers in the idle state comprises:
acquiring a buffer area in an idle state, and controlling a DMA controller to read N rows of data from the position of the storage base address to one of the buffer areas in the idle state;
setting the state of the cache area storing the data as busy;
when detecting that there is data in the buffer areas, the step of respectively transmitting the data stored in each buffer area to the display screen for displaying comprises:
when detecting that data exist in the cache regions, transmitting the data stored in each cache region to a display screen for displaying;
and setting the state of the buffer zone for completing data transmission to be idle.
3. An image display control apparatus, comprising: the device comprises a calculation module, an acquisition module, a control module and a transmission module;
the computing module is used for computing the storage base address of the picture to be displayed according to the target application; the target application refers to an application program to be executed by the microprocessor, and the storage base address refers to an initial storage address of pixel data in the chip, corresponding to a picture area of a picture to be displayed, calculated according to the target application;
the acquisition module is used for acquiring picture parameters of a picture to be displayed;
the control module is used for acquiring a buffer area in an idle state, controlling the DMA controller to read first N lines of data from the position of the storage base address in the memory to the first buffer area in the idle state in sequence, and then controlling the DMA controller to read the next N lines of data of the picture to be displayed to the second buffer area; the cache regions at least comprise two;
the transmission module is used for respectively transmitting the data stored in each cache region to a display screen for displaying when the data in the cache regions are detected, so as to realize parallel processing with the DMA controller for reading the data from the memory;
the control module includes: the device comprises a reading module, a judging module and a marking module;
the reading module is used for acquiring a buffer area in an idle state and controlling the DMA controller to read N rows of data from the position of the storage base address to one of the buffer areas in the idle state;
the judging module is used for judging whether the data of the picture to be displayed is read completely according to the picture parameters;
and the marking module is used for marking the first pixel point data of the (N + 1) th line as a storage base address when the judgment result of the judgment module is negative, so that the DMA controller can continuously read the pixel data of the picture to be displayed from the memory to the cache.
4. The apparatus of claim 3, further comprising a setting module configured to set a status of the buffer storing the data to busy and further configured to set a status of the buffer completing the data transmission to idle.
5. A microcontroller characterized by comprising the picture display control apparatus according to any one of claims 3 to 4.
6. An electronic cigarette, comprising a DMA controller, a Flash chip, a display screen and the microcontroller of claim 5; the Flash chip and the display screen are connected with the microcontroller through an SPI interface; the DMA controller is connected with the microcontroller through a system bus.
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CN112783462A (en) * 2021-01-19 2021-05-11 昆山联滔电子有限公司 Data transmission control method and device
CN113369173A (en) * 2021-06-29 2021-09-10 上海希翎智能科技有限公司 Full-automatic plastic bottle color sorting equipment
CN113610699A (en) * 2021-07-19 2021-11-05 广州致远电子有限公司 Hardware layer rendering scheduling method, device, equipment and storage medium

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