CN106601162A - Display panel and display device comprising same - Google Patents

Display panel and display device comprising same Download PDF

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Publication number
CN106601162A
CN106601162A CN201611204324.2A CN201611204324A CN106601162A CN 106601162 A CN106601162 A CN 106601162A CN 201611204324 A CN201611204324 A CN 201611204324A CN 106601162 A CN106601162 A CN 106601162A
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CN
China
Prior art keywords
test circuit
circuit area
display floater
spacing
arbitrary neighborhood
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201611204324.2A
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Chinese (zh)
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CN106601162B (en
Inventor
朱仁远
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tianma Microelectronics Co Ltd
Wuhan Tianma Microelectronics Co Ltd
Original Assignee
Tianma Microelectronics Co Ltd
Shanghai Tianma AM OLED Co Ltd
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Application filed by Tianma Microelectronics Co Ltd, Shanghai Tianma AM OLED Co Ltd filed Critical Tianma Microelectronics Co Ltd
Priority to CN201611204324.2A priority Critical patent/CN106601162B/en
Publication of CN106601162A publication Critical patent/CN106601162A/en
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Publication of CN106601162B publication Critical patent/CN106601162B/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12Test circuits or failure detection circuits included in a display system, as permanent part thereof

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The application discloses a display panel and a display device comprising the same. The display panel comprises an array substrate which consists of a display area and a non-display area around the display area. The display area comprises multiple scanning lines which extend in a first direction and are arranged in a second direction, multiple data lines which extend in the second direction and are arranged in the first direction, and multiple pixel areas which are arranged in an array. The display area further comprises a test circuit area which comprises multiple switch elements. The data lines and the switch elements are connected in a one-to-one correspondence manner. As the test circuit of the display panel is arranged between any two rows of pixel areas or between any two columns of pixel areas, the display panel has a narrow bezel, and troubleshooting can be carried out through the test circuit during use of the display panel.

Description

Display floater and the display device comprising which
Technical field
The application is related to display technology field, and in particular to organic light emitting display technical field, more particularly to display floater And the display device comprising which.
Background technology
In order to detect before display floater is connected with control circuit whether display floater is defective, can be in display floater In the testing cushion that is provided with test circuit area and is connected with the test circuit in test circuit area.Can apply in testing cushion The signal of telecommunication, by each data line of the short bar by electric signal transmission to display floater with the pixel for detecting display floater being It is no defective.After display floater is connected with control circuit, short bar and testing cushion are in the real work of display floater Just no longer work.
Generally test circuit area and testing cushion are arranged in the non-display area of display floater, due to test circuit area take it is non- Certain area of viewing area, is unfavorable for the narrow frame of display floater.
The content of the invention
In view of the problems referred to above that prior art is present, expect to provide a kind of display floater and the display device comprising which, with Solve at least part of technical problem described in background technology.
In a first aspect, the embodiment of the present application provides a kind of display floater, including array base palte, array base palte includes showing Area and the non-display area around viewing area;Viewing area includes a plurality of scanning for extending in a first direction, arranging in a second direction Line, a plurality of data wire for extending in a second direction, arranging in the first direction, multiple pixel regions of array arrangement;Also wrap viewing area Test circuit area is included, test circuit area includes multiple switch element, and each data wire is connected one to one with each switch element.
Optionally, test circuit area extends in a first direction, and is arranged between two scan lines of arbitrary neighborhood.
Optionally, viewing area is circle, and viewing area includes two adjacent scan lines, in two adjacent scan lines Orthographic projection from any one scan line to array base palte place plane and orthographic projection from each data wire to array base palte place plane It is intersecting;Test circuit area is arranged between two adjacent scan lines.
Optionally, test circuit area extends in a second direction, and is arranged between two data line of arbitrary neighborhood.
Optionally, viewing area is circle, and viewing area includes two adjacent data wires, in two adjacent data wires Orthographic projection from any one data line to array base palte place plane and orthographic projection from each scan line to array base palte place plane It is intersecting;Test circuit area is arranged between two adjacent data wires.
Optionally, display floater also includes transparent cover plate and organic be arranged between array base palte and transparent cover plate Optical material layer;Organic light emitting material includes and the one-to-one multiple luminescence units of multiple pixel regions, multiple luminescence unit battle arrays Row arrangement;Spacing between two row luminescence unit of arbitrary neighborhood is equal, and the spacing phase between two row luminescence unit of arbitrary neighborhood Deng;It is in addition to spacing adjacent with test circuit area, between two row pixel regions of test circuit area heteropleural respectively, each any Spacing between adjacent rows pixel region is equal and less than the spacing between two row luminescence unit of arbitrary neighborhood.
Optionally, display floater also includes transparent cover plate and organic be arranged between array base palte and transparent cover plate Optical material layer;Organic light emitting material includes and the one-to-one multiple luminescence units of multiple pixel regions, multiple luminescence unit battle arrays Row arrangement;Spacing between two row luminescence unit of arbitrary neighborhood is equal, and the spacing phase between two row luminescence unit of arbitrary neighborhood Deng;It is in addition to spacing adjacent with test circuit area, between two row pixel regions of test circuit area heteropleural respectively, each any Spacing between adjacent two row pixel region is equal and less than the spacing between two row luminescence unit of arbitrary neighborhood.
Optionally,Wherein, P1 be except respectively it is adjacent with test circuit area, positioned at test circuit area heteropleural Two row pixel regions between spacing outside, the spacing between two row pixel region of each arbitrary neighborhood, P2 be two row of arbitrary neighborhood send out Spacing between light unit.
Optionally,Wherein, L1 be except respectively it is adjacent with test circuit area, positioned at test circuit area heteropleural Two row pixel regions between spacing outside, the spacing between two row pixel region of each arbitrary neighborhood, L2 be arbitrary neighborhood two row send out Spacing between light unit.
Optionally, multiple switch element is divided into N number of switch element group, and each switch element group includes multiple switch unit Part;A plurality of data lines is divided into N number of data line group, and each data line group includes a plurality of data lines;Each data line group with one Switch element group is corresponded;Pieces of data line switch element group corresponding with the data line group in any one data line group In each switch connect one to one.
Second aspect, the embodiment of the present application provide a kind of display device, and display device includes above-mentioned display floater.
Display floater and the display device comprising which that the application is provided, by the viewing area surrounded by non-display area Test circuit area is set, so as to the display floater that not only can realize narrow frame can also retain test circuit area, so as to aobvious Failure is investigated during showing panel use
Description of the drawings
By reading the detailed description made to non-limiting example made with reference to the following drawings, the application other Feature, objects and advantages will become more apparent upon:
A kind of structural representation of the display floater that Fig. 1 is provided for the embodiment of the present application;
Fig. 2 is the corresponding relation schematic diagram in test circuit area shown in Fig. 1 and data wire;
Another structural representation for the display floater that Fig. 3 is provided for the embodiment of the present application;
A kind of display device structure schematic diagram that Fig. 4 is provided for the embodiment of the present application.
Specific embodiment
With reference to the accompanying drawings and examples the application is described in further detail.It is understood that this place is retouched The specific embodiment stated is only used for explaining related invention, rather than the restriction to the invention.It also should be noted that, in order to just Illustrate only in description, accompanying drawing to about the related part of invention.
It should be noted that in the case where not conflicting, the feature in embodiment and embodiment in the application can phase Mutually combine.Below with reference to the accompanying drawings and in conjunction with the embodiments describing the application in detail.
Fig. 1 is refer to, Fig. 1 shows a kind of structural representation of the display floater that the embodiment of the present application is provided.Such as Fig. 1 institutes Show, display floater 100 includes array base palte 110, organic light emitting material 120.Additionally, display floater also includes encapsulating material layer (not shown).
As shown in figure 1, array base palte 110 includes viewing area 111 and non-display area 112.Wherein non-display area 112 is surrounded Viewing area 111.
Viewing area 111 include it is a plurality of extend in a first direction, along second to arrangement scan line 1101;It is a plurality of along Two directions extend, formed to the data wire 1102 of arrangement and by data wire 1102 and scan line 1101 are arranged in a crossed manner along first Multiple pixel regions 1103.
Also include test circuit area 1104 in viewing area 111.Multiple switch unit can be included in test circuit area 1104 Part.Each switch element is corresponded with each above-mentioned data wire.Specifically,
Fig. 2 is refer to, the corresponding relation schematic diagram of test circuit area shown in Fig. 1 and data wire is it illustrates.Such as Fig. 2 institutes Show, test circuit area 1104 includes multiple switch element T.Pieces of data line 1102 is corresponded with each switch element T and is connected Connect.
In some optional implementations of the present embodiment, as shown in Fig. 2 the multiple switch unit in test circuit area 1104 Part T can be divided into N switch element groups SW1, SW2 ..., SWN, each switch element group includes multiple switch element T.It is a plurality of Data wire 201 can also be divided into N number of data line group D1, D2 ..., DN, each data line group includes a plurality of data lines 1102. Each data line group is corresponded with each switch element group.Further, the pieces of data line in any one data line group Each switch T in 1102 switch element groups corresponding with the data line group connects one to one.Each switch element group pair Answer a test signal input, namely switch element group SW1, SW2 ..., SWN correspond to respectively test signal input In1, In2、…、InN.Each test signal input can be connected with a testing cushion being arranged in array base palte non-display area (not shown).
Specifically, 1104 in test circuit area in switch element T can punching by way of with corresponding data wire 1102 connection, or the switch element T in test circuit area 1104 can punching plus cabling by way of with corresponding data Line 1102 connects.
Please continue to refer to Fig. 1, test circuit area 1104 extends in a first direction, and test circuit area 1104 can be arranged Between two scan lines 1101 of arbitrary neighborhood.
It is understood that when test circuit area 1104 is arranged between shorter two scan line 1101, due to surveying Examination circuit region 1104 is due to covering pieces of data line, therefore the data wire 1102 of 1104 both sides of correspondence test circuit area can be with It is connected with the switch element T in test circuit area 1104 by way of punching plus cabling.
In the present embodiment, when the test signal input of any one switch element group has test signal to be input into, should Each switch element in switch element group can be all turned on, test signal by conducting switch element can for transmission to Come on pieces of data line 1102 in the corresponding data line group of switch element group to the display floater including array base palte 110 100 are tested.
As shown in figure 1, organic light emitting material 120 includes multiple luminescence units 121, and multiple luminescence units 121 are in battle array Row arrangement.Each luminescence unit 121 is corresponded with each pixel region 1103 in array base palte 110.
Display floater 100 in the present embodiment, can be by each pixel region 1103 in array base palte 110 when work is powered up Glow current is provided to each self-corresponding luminescence unit 121 so that luminescence unit 121 is luminous.Common organic light emitting display face Plate, its test circuit area are provided in non-display area, in order to realize the narrow frame of display floater, and and can shown Retain test circuit area in panel, in the array base palte that the present embodiment is provided, test circuit area 1104 can be arranged on viewing area In 111.
In the present embodiment, test circuit area 1104 can be arranged on any two in the viewing area 111 of array base palte 110 Between scan line 1101.In order that test circuit area 1104 can be arranged in 110 viewing area 111 of array base palte, and while In keeping organic light emitting material 120, multiple luminescence units 121 are uniformly distributed, can be by adjusting in array base palte 110 The position of multirow pixel region 1103 or whole row pixel regions 1103 so that test circuit area 1104 can be arranged on array base palte Between adjacent rows scan line 1101 in 110.
Specifically, in the pixel region 1103 after the adjustment of array base palte 110, except adjacent with the test circuit area 1104 respectively , outside spacing between two row pixel regions 1103 of 1104 heteropleural of test circuit area, remaining adjacent rows pixel region Spacing between 1103 can be with equal, it is also possible to unequal.When except respectively it is adjacent with the test circuit area 1104, positioned at test Outside spacing between two row pixel regions 1103 of 1104 heteropleural of circuit region, the spacing between remaining adjacent rows pixel region 1103 When equal (spacing is designated as P1), can reduce making the process complexity of array base palte 110.
The spacing between two row luminescence unit 121 of arbitrary neighborhood in luminous material layer 120 is equal.Herein, arbitrary neighborhood Spacing between two row luminescence units 121 is designated as P2.
In array base palte 110 except respectively it is adjacent with the test circuit area 1104, positioned at 1104 heteropleural of test circuit area Two row pixel regions 1103 between spacing outside, spacing P1 between remaining adjacent rows pixel be less than organic light emitting material Spacing P2 between two row luminescence unit 121 of arbitrary neighborhood in 120.In the optional embodiment of the present embodiment, P1, P2 it Between meet following relation:
So arranging can both cause array base palte 110 to vacate enough space test circuit areas 1104, again will not Because the spacing P2 gap between spacing P1 and organic light-emitting units 121 between the pixel region 1103 of array base palte 110 is too big Affect to show.Setting P1, P2 is unequal so that each luminescence unit 121 in organic light emitting material is located to array base palte and puts down The orthographic projection 121a in face is not complete to the orthographic projection of array base palte place plane with each 121 corresponding pixel region 1103 of luminescence unit Full weight is closed.In order that each pixel region 1103 can provide glow current to each luminescence unit 121, pixel region 1103 with it is corresponding 121 yuan of luminous list between can be connected by lead.
In this example it is shown that the edge shape in area 111 can be circle, or polygon and ellipse etc. Deng other shapes.Do not limit herein.
The array base palte that the present embodiment is provided, by test circuit area is arranged between any two scan lines, both may be used To realize the demand of narrow frame, can realize again testing display floater using test circuit area and to display floater Malfunction elimination is carried out using test circuit area in use.
In other some technical schemes, in order to realize the narrow frame of display floater, generally can be by test circuit Area and testing cushion are arranged on the outside of display floater connection wiring area, after the detection for completing display floater, by test circuit area with And testing cushion excision.Although do so can realize the narrow frame of display floater, if if aobvious in follow-up use Show that panel breaks down, cannot just reuse test circuit and failure be detected and display floater checking, make to malfunction elimination Into difficulty.
In some optional implementations of the present embodiment, the shape of viewing area 111 can be circle.As shown in figure 1, working as When viewing area 111 is circular, viewing area 111 includes two scan lines:Scan line 1111 and scan line 1121, scan line 1111 It is adjacent with scan line 1121, and any one scan line in scan line 1111 and scan line 1121 be located to array base palte 110 The orthographic projection of plane is intersected to the orthographic projection of 110 place plane of array base palte with each data wire 1102.Test circuit area 1104 sets Put between scan line 1111 and scan line 1121.
Test circuit area 1104 is so set, test circuit area 1104 can be caused to have enough length in a second direction Allow each switch element T for being arranged in test circuit area 1104 by punching and shorter cabling just can and its Corresponding data wire 1102 connects.
Array base palte to being provided with circular viewing area, test circuit area is placed on and is intersected with pieces of data line Between two scan lines, and cause except respectively it is adjacent with the test circuit area, positioned at two row pixels of test circuit area heteropleural Outside spacing between area, the spacing between remaining adjacent rows pixel is equal;Organic corresponding with the array base palte simultaneously In optical material layer, the spacing of any two rows luminescence unit is equal.The requirement of circular display floater narrow frame can both be realized and expired Foot carries out malfunction elimination using test circuit area during circular display floater use, can reduce again making circular display surface The process complexity of plate.
Continuing with Fig. 3 is combined, Fig. 3 shows another structural representation for the display floater that the embodiment of the present application is provided.
Similar with embodiment illustrated in fig. 1, display floater 200 includes array base palte 210 and organic light emitting material 220, this Outer display floater 200 also includes packaged glass layer (not shown).
Array base palte 210 includes viewing area 211 and non-display area 212 as shown in Figure 3.Wherein non-display area 212 is surrounded Viewing area 211.
Viewing area 211 include it is a plurality of extend in a first direction, along second to arrangement scan line 2101, it is a plurality of along the Two directions extend, along first to arrangement data wire 2102, and by data wire 2102 and scan line 2101 is arranged in a crossed manner is formed Array arrangement multiple pixel regions 2103.
Also include test circuit area 2104 in viewing area 211.The multiple switch element that test circuit area 2104 includes with And multiple switch element may refer to Fig. 2 with the corresponding relation of data wire.
From unlike embodiment illustrated in fig. 1, in embodiment illustrated in fig. 3, test circuit area 2104 can be arranged on arbitrarily Between two data lines 2102.
It is understood that when test circuit area 2104 is arranged between any two data line 2102, pieces of data The switch element corresponding with test circuit area 2104 of line 2102 is required to be connected by way of punching is combined with cabling Connect.
The signal input part of each switch element group is connected with the testing cushion (not shown) for being arranged on non-display area 212.When When applying test signal to testing cushion, the signal input part of corresponding switch element group is transferred to by testing cushion.In switch unit When each switch element in part group is opened, test signal can be with incoming pieces of data line corresponding with the switch element group In 2102, to realize the test to display floater 200.When test circuit area 2104 is arranged in viewing area 211, except respectively Adjacent with the test circuit area 2104 spacing between two row pixel regions 2103 of 2104 heteropleural of test circuit area it Outward, the spacing between remaining adjacent two row pixel region 2103 can be with equal, it is also possible to unequal.When except respectively with the test circuit Outside the adjacent spacing between two row pixel regions 2103 of 2104 heteropleural of test circuit area in area 2104, remaining adjacent two When spacing (spacing between remaining adjacent two row pixel can be designated as L1) between row pixel region 2103 is equal, system can be reduced Make the process complexity of array base palte 210.
As shown in figure 3, organic light emitting material 220 includes multiple luminescence units 221, and multiple luminescence units 221 are in battle array Row arrangement.Spacing between the luminescence unit 221 of the row of arbitrary neighborhood two is equal.Between the luminescence unit 221 of the row of arbitrary neighborhood two Spacing can be designated as L2.Spacing L1 between above-mentioned remaining adjacent two row pixel region 2103 is less than organic light emitting material 220 In two row luminescence unit 221 of arbitrary neighborhood between spacing L2.In some optional embodiments of the present embodiment, L1, L2 Between meet following relation:
So arranging can both cause array base palte 210 to vacate enough space test circuit areas 2104, again will not Because the spacing L2 gap between spacing L1 and organic light-emitting units 221 between the pixel region 2103 of array base palte 210 is too big Affect to show.Setting L1, L2 is unequal so that each luminescence unit 221 in organic light emitting material 220 is to array base palte 210 The orthographic projection 221a of place plane is with each 221 corresponding pixel region 2103 of luminescence unit to 210 place plane of array base palte Orthographic projection not exclusively overlaps.Can be connected by lead between each pixel region and corresponding luminescence unit.
The display floater that the present embodiment is provided, by test circuit area is arranged between any two data line, arbitrarily One data line is by cabling switch element connection corresponding with test circuit area, it is possible to achieve display floater narrow frame Change, and malfunction elimination is carried out using test circuit area in use to display floater.
In some optional implementations of the present embodiment, the edge shape of the viewing area 211 in array base palte 210 is circle Shape.When viewing area 211 edge shape for it is circular when, viewing area 211 include it is a plurality of extend in a first direction, along second to The scan line 2101 of arrangement, it is a plurality of extend in a second direction, along first to arrangement data wire 2102, by data wire 2102 and sweep Retouch multiple pixel regions 2103 of the array arrangement of 2101 formation arranged in a crossed manner of line, and test circuit area 2104.
In the present embodiment, circular viewing area 211 includes two data lines:Data wire 2112 and scan line 2122, number It is adjacent according to line 2112 and data wire 2122, and any one data line in data wire 2112 and data wire 2122 is to array base palte The orthographic projection of 210 place planes is intersected to the orthographic projection of 210 place plane of array base palte with each data wire 2102.Test circuit area 2104 are arranged between data wire 2112 and data wire 2122.
When the viewing area 211 of array base palte 210 is circle, then organic light emitting material 220 can also be circle.Organic Optical material layer 220 can include multiple luminescence units 221, and multiple luminescence units 221 are arranged in array.What arbitrary neighborhood two was arranged sends out Spacing between light unit 221 can be with equal.
Orthographic projection from each luminescence unit 221 in organic light emitting material 220 to 210 place plane of array base palte with it is each The corresponding pixel region 2103 of individual luminescence unit 221a not exclusively overlaps to the orthographic projection of 2100 place plane of array base palte.Each picture Plain area 2103 can provide luminous signal to luminescence unit 2211 by lead.
The organic electroluminescence display panel that the present embodiment is provided, to including the array base that edge shape is circular viewing area Plate, test circuit area is placed between the two adjacent data lines intersected with each bar scan line, and is caused except difference Outside adjacent with test circuit area spacing between two row pixel regions of test circuit area heteropleural, remaining adjacent two Spacing between row pixel region is equal;In organic light emitting material corresponding with the array base palte, the row of arbitrary neighborhood two are luminous simultaneously The spacing of unit is equal.The narrow frame requirement of display floater can both be realized and met to enter aobvious panel using test circuit Row is tested and carries out malfunction elimination using test circuit area in use to display floater, can reduce again making display The process complexity of panel.
Fig. 4 is refer to, a kind of display device structure schematic diagram of the embodiment of the present application offer is provided.
As shown in figure 4, display device 300 is wrist-watch, the display device 300 includes display floater as above.Additionally, Those skilled in the art are it will be appreciated that the display device of the application can also include other in addition to including display floater Structure known to some, such as, when display floater is display panels, display device 300 is also included for display floater The back light unit of backlight is provided.For the emphasis for not obscuring the application, no longer structure known to these will be carried out further Description.It should be noted that the application display device is not limited to the wrist-watch shown in Fig. 4, can also be computer, television set, intelligence The devices such as energy wearing.
Above description is only the preferred embodiment and the explanation to institute's application technology principle of the application.People in the art Member is it should be appreciated that invention scope involved in the application, however it is not limited to the technology of the particular combination of above-mentioned technical characteristic Scheme, while should also cover in the case of without departing from the inventive concept, is carried out by above-mentioned technical characteristic or its equivalent feature Combination in any and other technical schemes for being formed.Such as features described above has similar work(with (but not limited to) disclosed herein The technical scheme that the technical characteristic of energy is replaced mutually and formed.

Claims (11)

1. a kind of display floater, it is characterised in that including array base palte, the array base palte include viewing area and around described The non-display area of viewing area;
The viewing area includes a plurality of scan line for extending in a first direction, arranging in a second direction, a plurality of to prolong in a second direction The data wire for stretch, arranging in the first direction, multiple pixel regions of array arrangement;
The viewing area also includes test circuit area, and the test circuit area includes multiple switch element, each data wire with Each switch element connects one to one.
2. display floater according to claim 1, it is characterised in that the test circuit area extends in a first direction, and It is arranged between two scan lines of arbitrary neighborhood.
3. display floater according to claim 2, it is characterised in that the viewing area is circle,
The viewing area includes two adjacent scan lines, any one scan line in two adjacent scan lines to The orthographic projection of array base palte place plane is intersected to the orthographic projection of array base palte place plane with each data wire;
The test circuit area is arranged between two adjacent scan lines.
4. display floater according to claim 1, it is characterised in that the test circuit area extends in a second direction, and It is arranged between two data line of arbitrary neighborhood.
5. display floater according to claim 4, it is characterised in that the viewing area is circle,
The viewing area includes two adjacent data wires, any one data line in two adjacent data wires to The orthographic projection of array base palte place plane is intersected to the orthographic projection of array base palte place plane with each scan line;
The test circuit area is arranged between two adjacent data wires.
6. the display floater according to claim 1-3 any one, it is characterised in that the display floater also includes transparent Cover plate and the organic light emitting material being arranged between the array base palte and the transparent cover plate;
The organic light emitting material includes and the one-to-one multiple luminescence units of the plurality of pixel region, the plurality of luminous Cell array is arranged;
Spacing described in two row of arbitrary neighborhood between luminescence unit is equal, and between arbitrary neighborhood two is arranged between the luminescence unit Away from equal;
Between described in two adjacent with the test circuit area, positioned at test circuit area heteropleural respectively rows between pixel region Outside, spacing between two row pixel region of each arbitrary neighborhood is equal and less than between two row luminescence unit of arbitrary neighborhood Away from.
7. the display floater according to 1,4 and 5 any one of claim, it is characterised in that the display floater also includes Transparent cover plate and the organic light emitting material being arranged between the array base palte and the transparent cover plate;
The organic light emitting material includes and the one-to-one multiple luminescence units of the plurality of pixel region, the plurality of luminous Cell array is arranged;
Spacing described in two row of arbitrary neighborhood between luminescence unit is equal, and between arbitrary neighborhood two is arranged between the luminescence unit Away from equal;
Except respectively it is adjacent with the test circuit area, between the two row pixel regions of test circuit area heteropleural between Outside, spacing between two row pixel region of each arbitrary neighborhood is equal and less than between two row luminescence unit of arbitrary neighborhood Away from.
8. display floater according to claim 6, it is characterised in that
9 10 < P 1 P 2 < 29 30 ;
Wherein, P1 be except respectively it is adjacent with the test circuit area, positioned at the two row pixels of test circuit area heteropleural Outside spacing between area, the spacing between two row pixel region of each arbitrary neighborhood, P2 are between two row luminescence unit of arbitrary neighborhood Spacing.
9. display floater according to claim 7, it is characterised in that
9 10 < L 1 L 2 < 29 30 ;
Wherein, L1 be except respectively it is adjacent with the test circuit area, positioned at the two row pixels of test circuit area heteropleural Outside spacing between area, the spacing between two row pixel region of each arbitrary neighborhood, L2 are between two row luminescence unit of arbitrary neighborhood Spacing.
10. display floater according to claim 1, it is characterised in that
The plurality of switch element is divided into N number of switch element group, and each switch element group includes multiple switch element;
The a plurality of data lines is divided into N number of data line group, and each data line group includes a plurality of data lines;Each data wire Group is corresponded with a switch element group;
Each in pieces of data line switch element group corresponding with the data line group in any one of data line group is opened Pass connects one to one.
11. a kind of display devices, it is characterised in that the display device includes the display described in claim 1-10 any one Panel.
CN201611204324.2A 2016-12-23 2016-12-23 Display panel and display device comprising it Active CN106601162B (en)

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CN201611204324.2A CN106601162B (en) 2016-12-23 2016-12-23 Display panel and display device comprising it

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