CN106598586A - Program upgrading method for MCU chip - Google Patents
Program upgrading method for MCU chip Download PDFInfo
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- CN106598586A CN106598586A CN201611124136.9A CN201611124136A CN106598586A CN 106598586 A CN106598586 A CN 106598586A CN 201611124136 A CN201611124136 A CN 201611124136A CN 106598586 A CN106598586 A CN 106598586A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/70—Software maintenance or management
- G06F8/71—Version control; Configuration management
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- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Stored Programmes (AREA)
Abstract
The invention discloses a program upgrading method for an MCU chip. The program upgrading method comprises the steps of 1, storing a new program in an SRAM memory; 2, when an FLASH memory is in a reprogrammable state, moving the new program from the SRAM memory to a second storage area; and 3, changing the initial address of the second storage area into a first address, and changing the initial address of a first storage area into the second address. Specific to the shortcomings of the conventional MCU chip upgrading, the program upgrading method for the MCU chip disclosed by the invention is adopted to realize program upgrading without erasing original programs in the MCU, so that upgrading reliability is improved; and in the upgrading process, an operating program is not required to be stopped, so that various accidents in a program upgrading process and risk caused by temporary replacement of the program version can be avoided, and the upgrading process is safer and more reliable.
Description
Technical field
The present invention relates to a kind of programme upgrade method for MCU chip.
Background technology
At present, MCU (Microcontroller Unit) chip, i.e. micro-control unit chip, are central processing unit
(CPU) frequency does appropriate reduction with specification, and the periphery such as internal memory, enumerator, USB, A/D conversion, UART, PLC, DMA is connect
Mouthful, or even LCD drive circuits are all incorporated on one chip, are formed the computer of chip-scale, are widely used in various necks
Domain.
In MCU chip, internal memory typically refers to built-in FLASH memory, and the program of MCU chip is typically stored in
In FLASH, as shown in Figure 1.And program, when bringing into operation, program generally has to initial address (the i.e. 0X00 from FLASH memory
Address) bring into operation.
Fig. 2 is the program escalation process in prior art to MCU chip, i.e., first wipe the original stored in FLASH memory
Program, is then loaded into new procedures in FLASH memory, that is, complete program upgrading.It upgrade when line program is entered to MCU chip
Afterwards, no matter new procedures are stored in which region of FLASH memory, CPU still starts to perform from 0X00 addresses.
The shortcoming of programme upgrade method of the prior art has：(1) when original program is wiped, once there is the exception shape such as power down
Condition, the then situation that original program and new procedures can be caused to run；(2) perform upgrading when, due to original program it is erased,
Therefore MCU chip must stop the operation of original program, and this is undoubtedly unacceptable side to the equipment that program operation can not be interrupted
Formula.
For the problem in the presence of prior art, there is provided a kind of programme upgrade method for MCU chip has important
Meaning.
The content of the invention
To solve the above problems, the present invention provides a kind of programme upgrade method for MCU chip.
The programme upgrade method for MCU chip of the present invention, the MCU chip include FLASH memory, SRAM storages
Device and CPU, the FLASH memory include the first memory block and the second memory block, and the program in the MCU chip upgrades it
Before, original program is stored in first memory block, and the first address of first memory block is the first address, second storage
The first address in area is the second address, and initial address when first address is the CPU configuration processors, methods described include：
Step one, new procedures are stored in the SRAM memory；Step 2, when the FLASH memory is in being capable of reprogram
During state, the new procedures are moved to second memory block from the SRAM memory；Step 3, by the described second storage
The first address in area is changed to first address, and the first address of first memory block is changed to second address.
Further, methods described also includes after the step 3：Step 4, reads from second memory block
The new procedures are simultaneously verified, if the first address of second memory block is changed to second address by verification failure, and
The first address of first memory block is changed to into first address.
Further, before the program upgrading in the MCU chip, be also stored with the FLASH memory upgrading
Management program, the upgrade management program perform the step one to the step 4, and methods described is before the step one
Also include：Step zero, the upgrade management program is moved to the SRAM memory, Ran Hou from the FLASH memory
The upgrade management program is performed in the CPU.
Further, depositor is provided with the controller of the FLASH memory, which is used for first memory block
Overturn with the address of second memory block, when the value of the depositor is the first value, the head of first memory block
Address is the first address, and the first address of second memory block is the second address；When the value of the depositor is second value, institute
The first address for stating the first memory block is the second address, and the first address of second memory block is the first address, in the MCU chip
In program upgrading before, the value of the depositor is described first to be worth, and the step 3 is specially：The upgrade management program
The value of the depositor is rewritten as into the second value from first value；The step 4 is specially：The updating and management journey
Sequence reads the new procedures from second memory block and is verified, if verification failure, by the value of the depositor from
The second value is rewritten as first value.
Further, the MCU chip also includes external communication interface, AHB TO APB bus converters and AHB-LITE
Bus, the step one are specially：The new procedures pass sequentially through the external communication interface, the AHB TO APB buses and turn
Parallel operation and the AHB-LITE buses are read in by the CPU, are then store in the SRAM memory.Preferably, it is described outer
Portion's communication interface includes SPI communication interface, UART communication interfaces and I2C communication interfaces.
The programme upgrade method for MCU chip of the present invention, for the deficiency of traditional MCU chip upgrading, using above-mentioned
Method so that can realize, in ROMPaq, the original program in MCU need not being wiped, improve the reliability of upgrading；And rising
During level, without the operation for shutting down procedure.Not only evade various accidents and program version in escalation process to replace temporarily
The risk that tape swapping comes, also makes escalation process more safe and reliable.
Description of the drawings
Schematic diagrams of the Fig. 1 for storage program in the FLASH memory of MCU chip in prior art；
Fig. 2 enters the schematic diagram of line program upgrading for MCU chip in prior art；
The step of Fig. 3 is method of the present invention schematic flow sheet；
Fig. 4 is the structural representation of the MCU chip that the present invention is suitable for；
Fig. 5 is the structural representation of FLASH memory in the MCU chip that the present invention is suitable for, and which show program and upgrades it
Front state；
Fig. 6 is that program when performing the flow process shown in Fig. 3 inside MCU chip moves path schematic diagram；
Fig. 7 is the schematic diagram of an example using the storage state change in FLASH memory during the method for the present invention.
Specific embodiment
Below, with reference to accompanying drawing, the programme upgrade method for MCU chip of the present invention is further described.
As shown in figure 4, the MCU chip that the present invention is suitable for includes FLASH memory 3, SRAM memory 1 and CPU 2, also wrap
Include external communication interface 6 (SPI communication interface, UART communication interfaces and I2C communication interfaces), AHB TO APB bus converters 5
With AHB-LITE buses 4.FLASH memory 3, SRAM memory 1 and CPU 2 are both connected in AHB-LITE buses 4.
As shown in figure 5, FLASH memory 3 includes the first memory block 32 and the second memory block 33.In each MCU chip
Program upgrading before, by original program be located memory block be considered the first memory block 32, another piece of memory block is considered second
Memory block 33.Before the program upgrading in each MCU chip, the first address of the first memory block 32 is the first address, and second deposits
The first address of storage area 33 is the second address.No matter before program upgrading or after program upgrading, the first address is always CPU
Initial address during 2 configuration processor.
Additionally, FLASH memory 3 also has FLASH controller 3A, depositor 31 in FLASH controller 3A, is provided with.Post
Storage 31 for overturning to the address of the first memory block 32 and the second memory block 33, the example with reference to shown in Fig. 7, i.e.,：When
When the value of depositor 31 is the first value (such as " 10 "), the first address of the first memory block 32 is the first address (such as 0x00), the
The first address of two memory blocks 33 is the second address (such as 0x10)；When the value of depositor 31 is second value (such as " 01 "), the
The first address of one memory block 32 is the second address (such as 0x10), the first address of the second memory block 33 be the first address (for example
0x00)。
Although it should be noted that turning over for the first address of the first memory block 32 and the second memory block 33 is merely illustrated in Fig. 7
Turn, but it is understood that, when the value of depositor 31 is written over, the address of upset is more than the first memory block 32 and second and deposits
The first address of storage area 33, but whole addresses of the first memory block 32 and the second memory block 33, i.e. the first memory block 32 and second
Sequence of addresses change is pressed also with the address of first address in address in memory block 33 after its first address.
Due to before the program upgrading in each MCU chip, the first address of the first memory block 32 is the first address, second
The first address of memory block 33 is the second address, therefore, before the program upgrading in each MCU chip, the value of depositor 31 is recognized
To be the first value.For example in the example depicted in fig. 7, the first value is " 10 ".
As shown in figure 3, the step of Fig. 3 is method of the present invention schematic flow sheet.With reference to Fig. 6 and Fig. 7, the method bag
Include：
Step zero S0, upgrade management program is moved to SRAM memory 1, then in CPU 2 from FLASH memory 3
Perform upgrade management program.The step of upgrade management program management data transfer path of new procedures, program are upgraded and flow process, with
And after program upgrading new procedures are compared and is verified.
Upgrade management program is first moved in SRAM and is reruned, rather than directly operation is stored in FLASH memory
Upgrade management program, its meaning is that it is possible to avoid the risk that FLASH memory in program escalation process causes extremely,
The upgrade management program being stored in when program is upgraded in FLASH memory can be avoided to be rewritten extremely.
Step one S1, upgrade management program are stored in new procedures in SRAM memory 1.Specifically, new procedures lead to successively
Cross external communication interface 6, AHB TO APB bus converters 5 and AHB-LITE buses 4 to be read in by CPU 2, be then store in
In SRAM memory 1.
Why new procedures are first temporarily stored in SRAM memory 1, its reason is in order at the purpose of programmed protection,
FLASH memory 3 generally can not be write direct from outside.If additionally, the behaviour of operating space is directly carried out to FLASH memory 3
Make, if the exception such as power down occurs in FLASH memory 3 in operation, occur that the original program in FLASH memory 3 is broken
Bad, but the state that is not also completely written to of new procedures.Therefore, first new procedures are temporarily stored in SRAM memory 1, ensure that former journey
In sequence and new procedures, at least a set of program can be operation.
Step 2 S2, when FLASH memory 3 in can reprogram state when, upgrade management program by new procedures from
SRAM memory 1 is moved to the second memory block 33 of FLASH memory 3.
The value of depositor 31 is rewritten as second from the first value (such as the 0x10 of Fig. 7) by step 3 S3, upgrade management program
Value (0x01 of such as Fig. 7), so as to the first address of the second memory block 33 is changed to the first address, and by the head of the first memory block 32
Address is changed to the second address.As, no matter before program upgrading or after program upgrading, the first address is always CPU execution
Initial address during program, therefore after step 3 S3 has been performed, start the journey for storing as CPU is performed from the first address
Sequence, that is, the new procedures stored in performing the second memory block 33.
Step 4 S4, upgrade management program read new procedures from the second memory block 33 and are verified, if verification failure,
Then the value of depositor 31 is rewritten as the first value from second value by upgrade management program again, will the second memory block 33 first address
Again the second address is changed to, and the first address of the first memory block 32 is changed to into the first address again.Due to no matter upgrading in program
Before or after program upgrading, the first address is always initial address during CPU configuration processors, therefore performs in step 4 S4
After complete, CPU is performed from the first address and is started the program of storage, the i.e. original program stored in the first memory block 32.That is, if risen
Level management program is verified to moving the new procedures in FLASH memory 3, if verification failure, illustrates FLASH memory
New procedures in 3 are wrong, therefore, the address of the first memory block 32 and the second memory block 33 is overturn by upgrade management program again,
So that CPU is able to carry out original program, to ensure the normal use of MCU chip.
The beneficial effects of the present invention is：
(1) present invention uses the upgrading of program backup type, i.e., in FLASH memory any moment it is at least a set of can
The program of operation is present.The present invention need not wipe the original program in MCU, improve the reliability of upgrading in ROMPaq；And
And in escalation process, without the operation for stopping original program.
(2) as the present invention can pass through to rewrite the value of depositor, change the first address of CPU operations, so as to change CPU
The program of operation, therefore the method for the present invention is easy to program rollback.If new procedures are pinpointed the problems in operation, then can pass through
Change the value of depositor making MCU chip return back to original program, greatly evade program version and replace the risk brought temporarily.
More than, schematic description only of the invention, it will be recognized by those skilled in the art that in the work without departing from the present invention
On the basis of making principle, various improvement can be made to the present invention, this belongs to protection scope of the present invention.
Claims (6)
1. a kind of programme upgrade method for MCU chip, the MCU chip include FLASH memory, SRAM memory and
CPU, it is characterised in that
The FLASH memory includes the first memory block and the second memory block, before the program upgrading in the MCU chip,
Original program is stored in first memory block, and the first address of first memory block is the first address, second memory block
First address be the second address, initial address when first address is the CPU configuration processors,
Methods described includes：
Step one, new procedures are stored in the SRAM memory；
Step 2, when the FLASH memory in can reprogram state when, by the new procedures from the SRAM memory
Move to second memory block；
The first address of second memory block is changed to first address by step 3, and by the first ground of first memory block
Location is changed to second address.
2. the programme upgrade method of MCU chip is used for as claimed in claim 1, it is characterised in that methods described is in the step
Also include after rapid three：
Step 4, reads the new procedures from second memory block and is verified, if verification failure, by described second
The first address of memory block is changed to second address, and the first address of first memory block is changed to first address.
3. the programme upgrade method of MCU chip is used for as claimed in claim 2, it is characterised in that in the MCU chip
Before program upgrading, be also stored with the FLASH memory upgrade management program, and the upgrade management program performs the step
Rapid one also included before the step one to the step 4, methods described：
Step zero, the upgrade management program is moved to the SRAM memory, then described from the FLASH memory
The upgrade management program is performed in CPU.
4. the programme upgrade method of MCU chip is used for as claimed in claim 3, it is characterised in that the FLASH memory
Depositor is provided with controller, which is used to overturn the address of first memory block and second memory block, when
When the value of the depositor is the first value, the first address of first memory block is the first address, the head of second memory block
Address is the second address；When the value of the depositor is second value, the first address of first memory block is the second address, institute
The first address for stating the second memory block is the first address,
Before the program upgrading in the MCU chip, the value of the depositor is the described first value,
The step 3 is specially：The value of the depositor is rewritten as described from first value by the upgrade management program
Two-value；
The step 4 is specially：The upgrade management program reads the new procedures from second memory block and carries out school
Test, if the value of the depositor is rewritten as first value from the second value by verification failure.
5. the programme upgrade method of MCU chip is used for as claimed in claim 1, it is characterised in that the MCU chip also includes
External communication interface, AHB TO APB bus converters and AHB-LITE buses,
The step one is specially：The new procedures pass sequentially through the external communication interface, the AHB TO APB buses and turn
Parallel operation and the AHB-LITE buses are read in by the CPU, are then store in the SRAM memory.
6. the programme upgrade method of MCU chip is used for as claimed in claim 5, it is characterised in that the external communication interface
Including SPI communication interface, UART communication interfaces and I2C communication interfaces.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611124136.9A CN106598586A (en) | 2016-12-08 | 2016-12-08 | Program upgrading method for MCU chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611124136.9A CN106598586A (en) | 2016-12-08 | 2016-12-08 | Program upgrading method for MCU chip |
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| CN106598586A true CN106598586A (en) | 2017-04-26 |
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ID=58597665
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| CN201611124136.9A Pending CN106598586A (en) | 2016-12-08 | 2016-12-08 | Program upgrading method for MCU chip |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101038549A (en) * | 2007-03-28 | 2007-09-19 | 北京启明星辰信息技术有限公司 | A software updating method capable of crossing system |
| CN101078993A (en) * | 2007-03-13 | 2007-11-28 | 中兴通讯股份有限公司 | Method for on-line upgrading of edition in terminal product without interrupting the operation |
| CN102354286A (en) * | 2011-09-16 | 2012-02-15 | 天津市亚安科技股份有限公司 | System for realizing reliable online remote upgrading of cloud deck |
| CN103019788A (en) * | 2012-12-14 | 2013-04-03 | 上海邮政科学研究院 | Remote online upgrading method based on CAN (Controller Area Network) bus |
| CN103677862A (en) * | 2012-09-04 | 2014-03-26 | 中兴通讯股份有限公司 | Upgrading method and device of EPLD program |
-
2016
- 2016-12-08 CN CN201611124136.9A patent/CN106598586A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101078993A (en) * | 2007-03-13 | 2007-11-28 | 中兴通讯股份有限公司 | Method for on-line upgrading of edition in terminal product without interrupting the operation |
| CN101038549A (en) * | 2007-03-28 | 2007-09-19 | 北京启明星辰信息技术有限公司 | A software updating method capable of crossing system |
| CN102354286A (en) * | 2011-09-16 | 2012-02-15 | 天津市亚安科技股份有限公司 | System for realizing reliable online remote upgrading of cloud deck |
| CN103677862A (en) * | 2012-09-04 | 2014-03-26 | 中兴通讯股份有限公司 | Upgrading method and device of EPLD program |
| CN103019788A (en) * | 2012-12-14 | 2013-04-03 | 上海邮政科学研究院 | Remote online upgrading method based on CAN (Controller Area Network) bus |
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Application publication date: 20170426 |