CN106575431A8 - 用于高度高效的图形处理单元(gpu)执行模型的方法和装置 - Google Patents

用于高度高效的图形处理单元(gpu)执行模型的方法和装置 Download PDF

Info

Publication number
CN106575431A8
CN106575431A8 CN201580045602.1A CN201580045602A CN106575431A8 CN 106575431 A8 CN106575431 A8 CN 106575431A8 CN 201580045602 A CN201580045602 A CN 201580045602A CN 106575431 A8 CN106575431 A8 CN 106575431A8
Authority
CN
China
Prior art keywords
gpu
live load
sub
load
live
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201580045602.1A
Other languages
English (en)
Other versions
CN106575431A (zh
CN106575431B (zh
Inventor
J.N.劳
P.K.兰卡
M.姆罗泽克
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of CN106575431A publication Critical patent/CN106575431A/zh
Publication of CN106575431A8 publication Critical patent/CN106575431A8/zh
Application granted granted Critical
Publication of CN106575431B publication Critical patent/CN106575431B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Image Generation (AREA)

Abstract

描述了用于在没有主机介入的情况下执行工作负荷的装置和方法。例如，装置的一个实施例包括:主机处理器；以及图形处理器单元（GPU），以响应于由所述主机处理器发布的一个或多个命令而执行分层工作负荷，所述分层工作负荷包括父工作负荷和在逻辑图形结构中互连的多个子工作负荷；以及调度器内核，其由所述GPU实现以在没有主机介入的情况下调度所述多个子工作负荷的执行，所述调度器内核用以评估对于执行所述子工作负荷所需的条件并基于所评估的条件来确定其中在所述GPU上执行所述子工作负荷的顺序；所述GPU用以以由所述调度器内核确定的顺序执行所述子工作负荷并用以在执行所述子工作负荷中的所有之后将父和子工作负荷的结果提供给所述主机处理器。
CN201580045602.1A 2014-09-26 2015-09-10 用于高度高效的图形处理单元(gpu)执行模型的方法和装置 Active CN106575431B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/498,220 2014-09-26
US14/498,220 US10521874B2 (en) 2014-09-26 2014-09-26 Method and apparatus for a highly efficient graphics processing unit (GPU) execution model
PCT/US2015/049345 WO2016048671A1 (en) 2014-09-26 2015-09-10 Method and apparatus for a highly efficient graphics processing unit (gpu) execution model

Publications (3)

Publication Number Publication Date
CN106575431A CN106575431A (zh) 2017-04-19
CN106575431A8 true CN106575431A8 (zh) 2017-07-11
CN106575431B CN106575431B (zh) 2020-05-22

Family

ID=55581807

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201580045602.1A Active CN106575431B (zh) 2014-09-26 2015-09-10 用于高度高效的图形处理单元(gpu)执行模型的方法和装置

Country Status (4)

Country Link
US (1) US10521874B2 (zh)
EP (1) EP3198551A4 (zh)
CN (1) CN106575431B (zh)
WO (1) WO2016048671A1 (zh)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10068306B2 (en) 2014-12-18 2018-09-04 Intel Corporation Facilitating dynamic pipelining of workload executions on graphics processing units on computing devices
EP3065051A1 (en) * 2015-03-05 2016-09-07 Ingo Josopait Flow control for language-embedded programming in general-purpose computing on graphics processing units
US9654753B1 (en) * 2015-09-01 2017-05-16 Amazon Technologies, Inc. Video stream processing
CN109154990B (zh) * 2016-06-03 2023-10-03 英特尔公司 卷积神经网络中的查找卷积层
US10229470B2 (en) * 2016-08-05 2019-03-12 Intel IP Corporation Mechanism to accelerate graphics workloads in a multi-core computing architecture
US10719760B2 (en) * 2017-04-09 2020-07-21 Intel Corporation Neural network scheduling mechanism
US10672175B2 (en) * 2017-04-17 2020-06-02 Intel Corporation Order independent asynchronous compute and streaming for graphics
US10304154B2 (en) 2017-04-24 2019-05-28 Intel Corporation Coordination and increased utilization of graphics processors during inference
US10580190B2 (en) * 2017-10-20 2020-03-03 Westghats Technologies Private Limited Graph based heterogeneous parallel processing system
US10467722B2 (en) * 2017-11-06 2019-11-05 Basemark Oy Combined rendering and computing resource allocation management system
CN108053361B (zh) * 2017-12-29 2021-08-03 中国科学院半导体研究所 多互连视觉处理器及采用其的图像处理方法
US10719970B2 (en) * 2018-01-08 2020-07-21 Apple Inc. Low latency firmware command selection using a directed acyclic graph
US10475152B1 (en) * 2018-02-14 2019-11-12 Apple Inc. Dependency handling for set-aside of compute control stream commands
US10853147B2 (en) * 2018-02-20 2020-12-01 Microsoft Technology Licensing, Llc Dynamic processor power management
CN108459912B (zh) * 2018-04-10 2021-09-17 郑州云海信息技术有限公司 一种末级缓存管理方法及相关装置
WO2020257976A1 (en) * 2019-06-24 2020-12-30 Intel Corporation Apparatus and method for scheduling graphics processing resources
US20210117246A1 (en) 2020-09-25 2021-04-22 Intel Corporation Disaggregated computing for distributed confidential computing environment
CN112801855B (zh) * 2021-04-14 2021-07-20 南京芯瞳半导体技术有限公司 基于图元的渲染任务调度的方法、装置及存储介质
US20230195517A1 (en) * 2021-12-22 2023-06-22 Advanced Micro Devices, Inc. Multi-Cycle Scheduler with Speculative Picking of Micro-Operations

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5119477A (en) * 1989-10-23 1992-06-02 International Business Machines Corporation Memory manager for hierarchical graphic structures
US6618117B2 (en) * 1997-07-12 2003-09-09 Silverbrook Research Pty Ltd Image sensing apparatus including a microcontroller
US7593915B2 (en) * 2003-01-07 2009-09-22 Accenture Global Services Gmbh Customized multi-media services
US7673304B2 (en) 2003-02-18 2010-03-02 Microsoft Corporation Multithreaded kernel for graphics processing unit
US20080161914A1 (en) * 2006-12-29 2008-07-03 Advanced Medical Optics, Inc. Pre-stressed haptic for accommodating intraocular lens
US8286196B2 (en) 2007-05-03 2012-10-09 Apple Inc. Parallel runtime execution on multiple processors
US8341611B2 (en) 2007-04-11 2012-12-25 Apple Inc. Application interface on multiple processors
US8040699B2 (en) * 2007-07-09 2011-10-18 Active-Semi, Inc. Secondary side constant voltage and constant current controller
US20090160867A1 (en) * 2007-12-19 2009-06-25 Advance Micro Devices, Inc. Autonomous Context Scheduler For Graphics Processing Units
US20100110089A1 (en) * 2008-11-06 2010-05-06 Via Technologies, Inc. Multiple GPU Context Synchronization Using Barrier Type Primitives
US8310492B2 (en) 2009-09-03 2012-11-13 Ati Technologies Ulc Hardware-based scheduling of GPU work
EP2383648B1 (en) 2010-04-28 2020-02-19 Telefonaktiebolaget LM Ericsson (publ) Technique for GPU command scheduling
JP5799227B2 (ja) * 2010-07-15 2015-10-21 パナソニックＩｐマネジメント株式会社 ズームレンズ系、交換レンズ装置及びカメラシステム
US9519943B2 (en) * 2010-12-07 2016-12-13 Advanced Micro Devices, Inc. Priority-based command execution
US9177742B2 (en) * 2011-10-18 2015-11-03 G & W Electric Company Modular solid dielectric switchgear
US20130124805A1 (en) 2011-11-10 2013-05-16 Advanced Micro Devices, Inc. Apparatus and method for servicing latency-sensitive memory requests
US8842122B2 (en) 2011-12-15 2014-09-23 Qualcomm Incorporated Graphics processing unit with command processor
US8707314B2 (en) 2011-12-16 2014-04-22 Advanced Micro Devices, Inc. Scheduling compute kernel workgroups to heterogeneous processors based on historical processor execution times and utilizations
US20130162661A1 (en) * 2011-12-21 2013-06-27 Nvidia Corporation System and method for long running compute using buffers as timeslices
US8928677B2 (en) * 2012-01-24 2015-01-06 Nvidia Corporation Low latency concurrent computation
US9928109B2 (en) * 2012-05-09 2018-03-27 Nvidia Corporation Method and system for processing nested stream events
DE102012211892B4 (de) * 2012-07-09 2015-03-19 Siemens Aktiengesellschaft Verfahren zur Extraktion eines Datensatzes aus einem medizinischen Bilddatensatz sowie medizinische Bildaufnahmeeinrichtung und Computerprogramm
US8884268B2 (en) * 2012-07-16 2014-11-11 Taiwan Semiconductor Manufacturing Co., Ltd. Diffusion barrier layer for group III nitride on silicon substrate
US8928678B2 (en) 2012-08-02 2015-01-06 Intel Corporation Media workload scheduler
US9633230B2 (en) * 2012-10-11 2017-04-25 Intel Corporation Hardware assist for privilege access violation checks
US10585801B2 (en) * 2012-11-26 2020-03-10 Advanced Micro Devices, Inc. Prefetch kernels on a graphics processing unit
US9799088B2 (en) * 2014-08-21 2017-10-24 Qualcomm Incorporated Render target command reordering in graphics processing
EP3191946A4 (en) 2014-09-12 2018-03-21 INTEL Corporation Facilitating dynamic parallel scheduling of command packets at graphics processing units on computing devices

Also Published As

Publication number Publication date
CN106575431A (zh) 2017-04-19
WO2016048671A1 (en) 2016-03-31
CN106575431B (zh) 2020-05-22
EP3198551A4 (en) 2018-03-28
US10521874B2 (en) 2019-12-31
US20160093012A1 (en) 2016-03-31
EP3198551A1 (en) 2017-08-02

Similar Documents

Publication Publication Date Title
CN106575431A8 (zh) 用于高度高效的图形处理单元(gpu)执行模型的方法和装置
WO2016020391A3 (en) Image analysis system using context features
EP4325424A3 (en) Coordination and increased utilization of graphics processors during inference
WO2015120243A8 (en) Application execution control utilizing ensemble machine learning for discernment
WO2014116861A3 (en) Parallel processing with proactive solidarity cells
WO2017030619A3 (en) Techniques for distributed operation of secure controllers
EP2800404A3 (en) Information providing apparatus and method thereof
JP2016532180A5 (zh)
EP2770414A3 (en) Portable device and method for operating multiapplication thereof
EP2960789A3 (en) Unified mapreduce framework for large-scale data processing
EP2778840A3 (en) Techniques for power saving on graphics-related workloads
EP2720112A3 (en) Information processing apparatus
FR2954979B1 (fr) Procede pour selectionner une ressource parmi une pluralite de ressources de traitement, de sorte que les delais probables avant defaillance des ressources evoluent de maniere sensiblement identique
EP2796991A3 (en) Processor for batch thread processing, batch thread processing method using the same, and code generation apparatus for batch thread processing
GB2565940A (en) Method and apparatus for scheduling in a non-uniform compute device
CN107408011A8 (zh) 将多个屏幕动态地合并到一个视口
EP2474897A3 (en) Display control apparatus, display control method, and program
EP2672483A3 (en) Data processing system with retained sector reprocessing
EP2816431A3 (en) Information platform for industrial automation stream-based data processing
EP2919163A3 (en) Image processing device, image processing method, and image processing program
EP3324256A3 (en) Control system and control device
EP3416046A3 (en) Scheduling tasks
EP2990086A3 (en) Program, game system, and control method
EP2799952A3 (en) Information processing system, information processing apparatus and start up control method
EP2958309A3 (en) Processing apparatus, display system, display method, and computer program

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CI01 Publication of corrected invention patent application
CI01 Publication of corrected invention patent application

Correction item: Priority

Correct: 14/498,220 2014.09.26 US

Number: 16

Volume: 33

CI02 Correction of invention patent application
CI02 Correction of invention patent application

Correction item: Priority

Correct: 14/498,220 2014.09.26 US

Number: 16

Page: The title page

Volume: 33

GR01 Patent grant
GR01 Patent grant