CN106569906A - Code write-in method and apparatus based on sparse matrix - Google Patents
Code write-in method and apparatus based on sparse matrix Download PDFInfo
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
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- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
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Abstract
The invention discloses a code write-in method and apparatus based on a sparse matrix, being able to reduce the complexity of a capacity achieving scheme. The code write-in method and apparatus based on a sparse matrix includes the steps: S1, calculating a coset leader vm corresponding to information to write, wherein m belongs f<2><k>, and m=(m1, m2, ..., mk); a (n, k) block code corresponding to m is C, and vm=(v1, v2,.., vn); S2, based on a sparse matrix H <Z><T>, calculating b, wherein bHz=[Vi1-a1,Vi2-a2, .., vis-as]; i1, i2, ... is stand for the position of stuck cells; a1, a2,.., as stand for the fixed value of stuck cells; and Hz is a (n-k)*s order matrix which is formed by extracting the i1th, i2th,..., isth lines from the verification matrix H of C; and S3, taking m' as a storage value, and writing m into a storage unit, wherein m'=vm+bH.
Description
Technical field
The present invention relates to coding techniques field, and in particular to a kind of coding wiring method and device based on sparse matrix.
Background technology
Memorizer (Memory) is a kind of memory storage devices, for preserving information, is play in modern information technologies
Key player.Memorizer is widely used in various systems, such as solid state hard disc, mobile phone, flash card, USB flash disk, panel computer, it
It is ubiquitous, and our daily life interwoveness.
However, most of storage system (such as flash memory (flash memory), phase transition storage (phase
Change memory, PCM)) because production technology all has defect：The value of some memory element is fixed in memorizer
, i.e. the storage value of these memory element do not change with the change of write value, and this kind of mistake is what we to be studied
Stuck cell mistakes.Stuck cell mistakes are constant, are hard errors.Stuck cell mistakes greatly have impact on storage
Reliability.Stuck cell mistakes will cause that memorizer yield rate is low, yields is low, short life the problems such as.
For Stuck Cell problems, a solution that researchers generally adopt is information m to needing write
It is a mapping, F:M → m ', whereinM and m ' can be denoted as m=(m1,m2,…,mk), m '=(m '1,m′2,…,m
′n) so that the value of the position corresponding with stuck cells is identical with the fixed value of stuck cells in m ', i.e.,
i1,i2,…,isThe position of stuck cells is represented,
a1,a2,…,asRepresent the fixed value of stuck cells.
The process of this mapping is exactly the process of coding write.
Information m for needing write can be mapped to m ' by traditional chnnel coding, but this is one and man-to-man mapped
Journey, m ' takes the institute's directed quantity less than n-dimensional vector on two element field spatially.
Mahdavifar and Vardy propose capacity and reach scheme to solve the problems, such as stuck cell, next will be situated between
The capacity that continues reaches scheme.
Code C is (n, a k) liner code, and its generator matrix is Gk×n, check matrix is H(n-k)×n, meanwhile, matrix H also may be used
It is counted as dual code C of yard C⊥Generator matrix.
Code C⊥All coset leaders be denoted as v1,v2,…,Although which vector is selected from each coset as coset
It doesn't matter in capital, but if to store all of coset leader, it will the exponential memory space of occupancy, therefore in order to avoid
All of coset leader is stored, we will select k coset leader using in the form of row vector as matrixElement be stored in matrixIn so that HcIn row vector linear combination can generate one comprising code C ⊥ all coset leaders set.HcWith
The linear combination of all row vectors of H can open into the n dimensional linears space on whole two element field.
Need to be coded of information bei1,i2,…,isRepresent the position of stuck cells, a1,a2,…,asTable
Show the fixed value of stuck cells, z represents the index set of stuck cells positions, and i-th is taken out from matrix H1,i2,…,is
(n-k) × s rank submatrix H of row composition matrix Hz。vm=(v1,v2,…,vn) coset leader corresponding with information is represented, also
It is to say, vm=mHC.Then, following equations are solved and tries to achieve vector
If equation (2.2) has solution, then solution is not necessarily unique, then we only need to provide a solution of vectorial b.Finally,
We are by m '=vm+ bH as storage value write storage unit, now, i-th in m '1,i2,…,isThe value of individual position is a1,
a2,…,as.So, stuck cell problems are just addressed.
It can be seen from linear algebra knowledge, system of linear equations has solution to be equivalent to the order phase of its coefficient matrix and augmented matrix
Deng.
The coefficient matrix of equation (2.2) isAugmented matrix is
Because vectorialThe institute's directed quantity all over s dimension spaces on two element field, institute can be taken
To work asDuring row full rank, equation (2.2) necessarily has solution.
Capacity reaches the main thought of decoding algorithm in scheme or syndrome decoding.Assume decoder from memorizer
Code word is readDecoding is equivalent to calculate r with regard to code C⊥Syndrome, therefore, decoding message out is exactly
rGT。
Capacity reaches and mainly have in encryption algorithm in scheme two parts, and Part I is to calculate vm=mHC, Part II
It is to solve equation the solution that (2.2) try to achieve vectorial b.
The computation complexity of Part I is O (nlogn)；Part II, capacity reaches and employ in scheme gaussian elimination
Method, therefore, the computation complexity of Part II is O (n3)。
Decoding algorithm is related to vector multiplication, can complete in complexity O (nlogn).
To sum up analyze, it is O (n that whole capacity reaches the computation complexity of scheme3)。
Capacity reaches scheme and uses coset, gives the encoding scheme of complete set, however, O (n3) complexity still
Too high, this causes this scheme to be applied to reality, it is impossible to really solve the problems, such as stuck cell from actual angle.
The content of the invention
In view of the shortcomings of the prior art and defect, the present invention provides a kind of coding wiring method based on sparse matrix
And device.
On the one hand, the embodiment of the present invention proposes a kind of coding wiring method based on sparse matrix, including：
S1, the calculating coset leader v corresponding with information m to be writtenm, wherein,M=(m1,m2,…,mk), m
Corresponding (n, k) block code is C, vm=(v1,v2,…,vn)；
S2, based on sparse matrixVector b is calculated, wherein,i1,
i2,…,isRepresent the position of stuck cells, a1,a2,…,asRepresent the fixed value of stuck cells, HzIt is the verification from C
I-th is taken out in matrix H1,i2,…,is(n-k) × s rank submatrixs of row composition；
S3, using m ' as storage value write storage unit, wherein, m '=vm+bH。
Preferably, the S2, including：
S210, from check matrixThe minimum check-node cn of selectance in corresponding Tanner figuresk；
S211, give cnkA connected variable node vntAssign cnkValue ck；
S212, judgment variable node vntValue vtWhether it is 1, if vtFor 1, then by all with variable node vntConnected
The value of check-node is all overturn, and 0 will be changed into 1,1 and is changed into 0；
S213, remove variable node vntAnd all sides being attached thereto, and remove in the Tanner figures it is all degree be changed into
0 check-node；
There is check-node to be removed if S214, judgement are known, whether the value for checking removed check-node is 0, if
The value of all removed check-nodes is 0, and judges to know that also check-node then returns to step in the Tanner figures
S210, otherwise, step S215 is jumped to if judging to know in the Tanner figures if no check-node；
S215, the value for obtaining variable node, and the vector that the value of variable node is constituted is defined as into vectorial b.
Preferably, the S2, including destructing part and solution part, wherein,
The destructing part includes：
S220, initialization y=m0, wherein, m0For check matrixThe quantity of check-node in corresponding Tanner figures；
If S221, judgement know the variable node that degree of having in the Tanner figures is 1, by what is be connected with the variable node
Check-node is labeled as y, and renewal y is y-1, removes the check-node and the side related to the check-node, and degree of removing is 0
Variable node；
S222, the variable node that whether degree of having is 1 is judged in the Tanner figures, if degree of having is 1 in the Tanner figures
Variable node, then execution step S221, otherwise, then execution step S223；
If S223, judgement are known in the Tanner figures without check-node, solution part is jumped to；
The part that solves includes：
S224, for according to each ascending check-node of labelling, to the variable node assignment being attached thereto, make
The summation for obtaining the value of the variable node being attached thereto is equal with the value of the check-node；
If S225, judging to know the variable node for having value in the variable node being attached thereto as 1, will with it is described and
Connected variable node intermediate value be that 1 value of the connected check-node of variable node all overturns, 0 will be changed into 1,1 and be changed into 0,
The variable node being attached thereto and the side related to the variable node being attached thereto are removed, and it is 0 to remove all degree
Check-node, whether the value for checking removed check-node is 0, if the value of all check-nodes is 0, performs step
Rapid S226；
If S226, judgement know the check-node that degree of having in the Tanner figures is 1, the value of the check-node is assigned to
The variable node being attached thereto, if judging to know the value of the variable node being attached thereto as 1, will be attached thereto with described
The connected all check-nodes of variable node value upset, 0 will be changed into 1,1 and be changed into 0, remove the variable being attached thereto
Node and the side related to the variable node being attached thereto, and all degree are removed for 0 check-node, check what is be removed
Whether the value of check-node is 0, if the value of all check-nodes is 0, continue in figure other degree for 1 check-node
Carry out processing until without the check-node that degree is 1 in figure, turning S227；
S227, the value for obtaining variable node, and the vector that the value of variable node is constituted is defined as into vectorial b.
On the other hand, the embodiment of the present invention proposes a kind of coding writing station based on sparse matrix, including：
First computing unit, for calculating the coset leader v corresponding with information m to be writtenm, wherein,M=
(m1,m2,…,mk), corresponding (n, the k) block codes of m are C, vm=(v1,v2,…,vn)；
Second computing unit, for based on sparse matrixVector b is calculated, wherein,
i1,i2,…,isRepresent the position of stuck cells, a1,a2,…,asRepresent the fixed value of stuck cells, HzIt is from the school of C
Test in matrix H and take out i-th1,i2,…,is(n-k) × s rank submatrixs of row composition；
Writing unit, for using m ' as storage value write storage unit, wherein, m '=vm+bH。
Preferably, second computing unit, specifically for performing following steps：
S210, from check matrixThe minimum check-node cn of selectance in corresponding Tanner figuresk；
S211, give cnkA connected variable node vntAssign cnkValue ck；
S212, judgment variable node vntValue vtWhether it is 1, if vtFor 1, then by all with variable node vntConnected
The value of check-node is all overturn, and 0 will be changed into 1,1 and is changed into 0；
S213, remove variable node vntAnd all sides being attached thereto, and remove in the Tanner figures it is all degree be changed into
0 check-node；
There is check-node to be removed if S214, judgement are known, whether the value for checking removed check-node is 0, if
The value of all removed check-nodes is 0, and judges to know that also check-node then returns to step in the Tanner figures
S210, otherwise, step S215 is jumped to if judging to know in the Tanner figures if no check-node；
S215, the value for obtaining variable node, and the vector that the value of variable node is constituted is defined as into vectorial b.
Preferably, second computing unit, specifically for performing destructing step and solution procedure, wherein,
The destructing step includes：
S220, initialization y=m0, wherein, m0For check matrixThe quantity of check-node in corresponding Tanner figures；
If S221, judgement know the variable node that degree of having in the Tanner figures is 1, by what is be connected with the variable node
Check-node is labeled as y, and renewal y is y-1, removes the check-node and the side related to the check-node, and degree of removing is 0
Variable node；
S222, the variable node that whether degree of having is 1 is judged in the Tanner figures, if degree of having is 1 in the Tanner figures
Variable node, then execution step S221, otherwise, then execution step S223；
If S223, judgement are known in the Tanner figures without check-node, solution part is jumped to；
The solution procedure includes：
S224, for according to each ascending check-node of labelling, to the variable node assignment being attached thereto, make
The summation for obtaining the value of the variable node being attached thereto is equal with the value of the check-node；
If S225, judging to know the variable node for having value in the variable node being attached thereto as 1, will with it is described and
Connected variable node intermediate value be that 1 value of the connected check-node of variable node all overturns, 0 will be changed into 1,1 and be changed into 0,
The variable node being attached thereto and the side related to the variable node being attached thereto are removed, and it is 0 to remove all degree
Check-node, whether the value for checking removed check-node is 0, if the value of all check-nodes is 0, performs step
Rapid S226；
If S226, judgement know the check-node that degree of having in the Tanner figures is 1, the value of the check-node is assigned to
The variable node being attached thereto, if judging to know the value of the variable node being attached thereto as 1, will be attached thereto with described
The connected all check-nodes of variable node value upset, 0 will be changed into 1,1 and be changed into 0, remove the variable being attached thereto
Node and the side related to the variable node being attached thereto, and all degree are removed for 0 check-node, check what is be removed
Whether the value of check-node is 0, if the value of all check-nodes is 0, continue in figure other degree for 1 check-node
Carry out processing until without the check-node that degree is 1 in figure, turning S227；
S227, the value for obtaining variable node, and the vector that the value of variable node is constituted is defined as into vectorial b.
The present invention has the advantages that：
The Part II for reaching scheme from capacity is set about, and using the openness of sparse matrix, only focused on check-node and is become
Syntopy between amount node such that it is able to reach the operation to node, reduces the computation complexity of algorithm.
Description of the drawings
Fig. 1 be row weight of the present invention be 2, row weight be 4 (10,5) linear block codes Tanner scheme；
Fig. 2 is schematic flow sheet of the present invention based on the coding embodiment of wiring method one of sparse matrix；
Fig. 3 is the schematic diagram of a concrete Tanner figures；
Fig. 4 is the schematic diagram of another concrete Tanner figures；
Fig. 5 is the figure that the embodiment deconstructions of S2 mono- are produced in Fig. 2；
Fig. 6 is the Performance comparision curve synoptic diagram of the C1 codes of check-node min algorithm and Gaussian reduction；
Fig. 7 is the Performance comparision curve synoptic diagram of the C2 codes of check-node min algorithm and Gaussian reduction；
Fig. 8 is to be disappeared based on the check-node min algorithm of C2 codes, C3 codes and C4 codes, graph division algorithms and Gauss
Remove the Performance comparision curve synoptic diagram of the C2 codes of three kinds of algorithms of method；
Fig. 9 is to be disappeared based on the check-node min algorithm of C2 codes, C3 codes and C4 codes, graph division algorithms and Gauss
Remove the Performance comparision curve synoptic diagram of the C3 codes of three kinds of algorithms of method；
Figure 10 is check-node min algorithm, the C4 codes of three kinds of algorithms of graph division algorithms and Gaussian reduction
Performance comparision curve synoptic diagram；
Figure 11 is structural representation of the present invention based on the coding embodiment of writing station one of sparse matrix.
Specific embodiment
To make purpose, technical scheme and the advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is explicitly described, it is clear that described embodiment be the present invention
A part of embodiment, rather than the embodiment of whole.Based on the embodiment in the present invention, those of ordinary skill in the art are not having
The every other embodiment obtained under the premise of creative work is made, the scope of protection of the invention is belonged to.
Sparse matrix refers to the matrix of the quantity of the element that numerical value in matrix is 0 far more than the quantity of nonzero element.Herein
All of research is all the i.e. GF (2) on two element field, so herein the nonzero element in sparse matrix is 1.Herein based on dilute
Thin matrix, and the check matrix of low density parity check code (Low Density Parity Check Code, LDPC) is sparse
, LDPC code can be also utilized when we emulate.And LDPC code is the one kind in linear block codes, so, next we will
First linear block codes is introduced.
The output of information source is a string sequences being made up of binary numeral 0 and 1, by such a string of binary data according to
Fixed length k is grouped, and each message packet is designated as u, and regular length k represents k information bit.By permutation and combination we
Understand, can there is 2 altogetherkPlant different message.Then one is done to u and maps the n-dimensional vector v, wherein n changed on two element field>K,
Thus we can be obtained by (n, a k) block code, and v is known as the code vector or code word of u.As can be seen that this 2kKind
Different message corresponds to 2kCode word is planted, therefore, this 2kThe set of individual code word constitutes the code word space of block code, only works as code
Word v and message u have one-to-one relation, and the block code just can use, if otherwise having multiple messages corresponding to same
Code word, then accurate message cannot then be translated back by this code word.So, now this 2kIndividual code word must be different.
For (n, a k) block code, when it has linear character, code word space closing can choose one group base,
The code word that all of length is n so then need not be in the encoder stored, this can substantially reduce memory space and coding is complicated
Degree, therefore the structure of liner code is a kind of preferable structure.
One (n, k) block code, and if only if its 2kIndividual code word constitutes the k dimensions in the n-dimensional vector space on two element field
During subspace, this block code is (n, a k) linear block codes.
Because liner code is a vector space, we can describe it with its one group of base.By liner code
One group of base constitutes a matrix in the form of row vector, then this matrix is properly termed as the generator matrix of liner code.If code C is two
N-dimensional vector SPACE V on first domainnA k n-dimensional subspace n, if g1,g2,…,gkOne group of linearly independent vector in for C, then code
Each code word v in C is the linear combination of this group of linearly independent vector, i.e. v=l1g1+l2g2+…+lkgk, therefore, define square
Battle array G=[g1g2…gk]TFor the generator matrix of liner code C, v=uG is met.
For a linear block codes, its code word is broken generally into two parts of message and redundancy check, this also code word be
With system structure.Wherein k positions are message part, are made up of original information bit, and remaining n-k position is then redundancy check portion
Point, be parity check bit, be also the linear of information bit and.Therefore, for each linear block codes, associated matrix
Except generator matrix also has another, that is, the parity matrix of the liner code, represented with matrix H, it meets vHT=0.
If x=x1x2…xn∈ V (n, 2), y=y1y2…yn(n, 2), (2) n represents that the n-dimensional vector on two element field is empty to V to ∈ V
Between, then
Xy=x1y1+x2y2+…+xnyn (2.1)
The inner product of referred to as x and y, is also denoted as ＜ x, y ＞ sometimes.
If C is binary (n, a k) liner code, then claimFor its antithesis
Code.
The property of dual code：
Binary (n, a k) liner code is let c be,
If the generator matrix of liner code C of property 1 is G, C⊥=x ∈ V (n, 2) | xGT=0 }；
Dual code C of property 2C⊥It is binary (n, a k) liner code；
Property 3C⊥Generator matrix H be liner code C check matrix.
Binary (n, a k) liner code is let c be, its check matrix is H, to anyDefine x syndrome be
xHT。
The process of syndrome decoding can be described as：Hypothesis receives code word x in channel receiving terminal, then calculate its syndrome
xHT, and find the coset leader a with identical syndrome therewithi, then x can be translated into c=x-ai。
One very sparse check matrix can uniquely portray a corresponding LDPC code, and check matrix to description and
Embodying the property of LDPC code has very important effect.And the Tanner of corresponding LDPC code can be drawn according to check matrix
Figure, as check matrix, Tanner figures are also a kind of basic and important representation of LDPC code.Both representations
Research to this paper algorithms, propose and analysis play the role of it is critically important, so, below we will be to both representations
It is introduced successively.
Length can be defined for the binary system LDPC code of n by the Sparse Parity-check Matrix H (m × n rank matrixes) on two element field,
Check matrix H has following property：
(1) there is γ 1 (row weight is γ), γ ＜ ＜ m per string；
(2) there is ρ 1 (row weight is ρ), ρ ＜ ＜ n per a line；
(3) 1 number (being represented with λ) between any two row in same position is not more than 1, that is to say, that λ=0 or λ
=1.
The code for meeting the check matrix definition of above-mentioned property is binary rules LDPC code.The dimension of LDPC code can be by
The order of check matrix determines, when check matrix full rank, the dimension of LDPC code is n-m, and its code check is
If sparse check matrix meets property (3), but its capable weight or row are weighed when being not constant, then be the non-rule of binary system
Then LDPC code.
Tanner figures are a kind of figure method for expressing that Tanner is introduced to effectively represent LDPC code.Although Tanner
The essence of figure is a kind of bipartite graph, but is used in LDPC code, and typically still it is called Tanner figures for we.
Tanner figures are made up of the side of two kinds of nodes and connection variety classes node, and this two classes node is respectively check-node
And variable node, CNs and VNs is denoted as respectively.Tanner figures have m check-node, corresponding with the m rows of check matrix respectively；
Tanner figures have n variable node, corresponding with the n of check matrix row respectively.The drawing rule of Tanner figures：Work as check matrix H
In element hjiValue be 1, then jth check-node be connected with i-th variable node.Therefore, the i-th row correspondence in check matrix
In the annexation of i-th variable node and all check-nodes, and the jth row in check matrix is corresponding to j-th verification section
Put the annexation with all variable nodes.From the drawing rule of Tanner figures, the side number in figure and 1 in check matrix
Quantity it is equal.
In Tanner figures, two nodes u and v are given, v is eventually passed back to through the side of a string of interactions and node from u
Sequence be referred to as path.If the Origin And Destination in path is identical, i.e. u and v is same point, then this path is called ring.
In order to make it easy to understand, a specific example will be given below illustrating：
For one, (10,5) linear block codes, its row weight is 2 to example 2.1, and row weight is 4, and corresponding check matrix H is as follows：
Then corresponding with this check matrix Tanner figures are as shown in Figure 1.
The storage value of some memory element is a fixed value in memorizer, and its state will not change, independently of write
Value, i.e., its storage value will not change with the change of write value, and the memory element for possessing such property is exactly defective
Memory element.For example, the value of a memory element is fixed to 0, then will send out when wanting and writing 1 to this memory element
Raw mistake.
After carefully testing memorizer, the information of defect, the such as position of defect and fixed value can be being obtained.Cause
This, in research process, researchers generally assume that the position of stuck cells and fixed value are during coding write
It is known, and be unknown during decoding is read.The research of this paper also will be based on this hypothesis.
Referring to Fig. 2, the present embodiment discloses a kind of coding wiring method based on sparse matrix, including：
S1, the calculating coset leader v corresponding with information m to be writtenm, wherein,M=(m1,m2,…,mk), m
Corresponding (n, k) block code is C, vm=(v1,v2,…,vn)；
S2, based on sparse matrixVector b is calculated, wherein,i1,
i2,…,isRepresent the position of stuck cells, a1,a2,…,asRepresent the fixed value of stuck cells, HzIt is the verification from C
I-th is taken out in matrix H1,i2,…,is(n-k) × s rank submatrixs of row composition；
S3, using m ' as storage value write storage unit, wherein, m '=vm+bH。
The present invention realizes that capacity reaches scheme and reaches scheme to capacity and is improved using sparse matrix.The capacity side of reaching
Case cannot be applied to reality, it is impossible to really solve the problems, such as stuck cell from actual angle.Complexity to reduce whole scheme
Degree, then must set about from the Part II of scheme.
The present invention mainly puts forth effort on and proposes that new algorithm solves the Part II that capacity is reached in scheme.With gaussian elimination
Method solves equation (2.2) and has reached the limit for obtaining correct solution, so, design new algorithm and obtain correct solution from raising
Progressive space is available on probability without any.So, designing new algorithm must focus on the calculating for reducing algorithm
In complexity, meanwhile, although the probability that new algorithm can provide a correct solution cannot surmount Gaussian reduction, also to exert
Power reduces gap therebetween.Therefore, the target for designing new algorithm is to reduce the computation complexity of algorithm and improve to obtain
The probability of correct solution, effort is closer to Gaussian reduction.
The present invention by from the angle of figure to analyze check matrix the characteristics of and design new algorithm and solve equation (2.2).In order to
Meet the consistent narration custom of coding, we will do an adjustment to equation, and be converted into
Order
Following description is all based on HtFor a check matrix, vectorial c can regard the value of one group of check-node as.
For the convenience of description, next I will provide the explanation of partial symbols：
The symbol description of table 3.1
By check matrix HtCorresponding Tanner figures can be drawn, then provides the problem of a solution of equation (2.2)
The value of given one group of check-node is changed into, the value of one group of qualified variable node is obtained, the condition for meeting is：With any school
Value and equal to this check-node the value of the connected variable node of node is tested, i.e., for any check-node cni, 1≤i≤m0,
I ∈ N, if cniDegree be k and and cniConnected variable node isSoCan
Multigroup v can be had1,v2,…,Value meet condition, but we only need to provide one group.
Because the property that ordinary channel all has, sparse matrix must also possess, so for the facility of explanation, lifting herein
Example in matrix all without very big, and matrix not necessarily meets sparse property.A specific example is given below
Son.
Example 3.1Seek one group of solution of b.
By check matrix Ht, we can draw corresponding Tanner
Figure (as shown in Figure 3).
One group of solution of b is sought, that is, is asked and is met v1+v2+v3=c1, v3=c2One group of v1,v2,v3Value.
Will not go to do linear combination to specific each equation based on the algorithm of figure, he will not change original verification
The syntopy of node and variable node.(2.2) are solved equation from the angle of figure, is substantially to provide a kind of rule, this rule
The order for processing check-node can be indicated.Process check-node and refer to the value for providing the variable node being attached thereto.
If degree of having is 1 check-node in figure, this check-node must be first processed, because the variable node being attached thereto
Only one of which, then the value of the variable node being attached thereto must with the value of this check-node it is equal could meet this verification section
Point.It is also same in equation group.Therefore, anyway design rule gives the order for processing check-node, must be preferential
Considerations are 1 check-node.
This section is based on the characteristics of spending of check-node, it is proposed that check-node min algorithm.
The check-node min algorithm of table 3.2 rule
By it is above-mentioned rule description as can be seen that in check-node min algorithm we according to the degree of check-node size
It is determined that processing the priority of check-node, less priority is spent higher.We are to spending identical in check-node min algorithm
Check-node is not distinguished, and equally, during specific to a certain check-node, we are to coupled variable node Ye Buzuo areas
Point.
The check-node min algorithm description for being above given is that directly figure is operated, in fact, we program reality
Only need to can also will not by variable node and the syntopy of check-node without using the structure of figure when existing
The work that removes on node and side is done, but can labelling.Because in each wheel operation only a variable node can be processed, that is, provide one
The value of individual variable node；After providing the value of a variable node, the value of the check-node being connected with this variable node can be updated
And their degree, and the quantity of the check-node being connected with variable node is the degree of variable node, we are denoted as ωv.So,
Each wheel has been 2 ωvSub-addition computing.We set the degree of variable node maximum in initial figure as dv, because a total n0Individual change
Amount node, so check-node min algorithm can at most carry out 2n0dvSub-addition computing, without multiplication operation.Nothing is taken advantage of in whole algorithm
Method computing, and dv＜ ＜ m0, so asymptotic analyses, the computation complexity of check-node min algorithm is O (n).
The computation complexity of check-node min algorithm will be far below Gaussian reduction, but it provides one group of correct solution
Probability is inevitable that loss, this trifle, I will provide the effect analyses of check-node min algorithm.
The check-node min algorithm rule for being above given can have corresponding operation on matrix.Corresponding matrix change
For：
(1) variable node is assigned, the value upset of check-node, without any change for matrix；
(2) variable node vn is removedtAnd all sides being attached thereto, the variable node that will be removed is corresponding in a matrix
Row leave out；
(3) check-node that all degree in figure are changed into 0 is removed, row that will be corresponding in matrix is left out.
When acyclic in figure, check-node min algorithm is equal to theorem 3.1 with Gaussian reduction effect.Effect equivalent is referred to
If Gaussian reduction can provide one group and correctly solve, then check-node min algorithm equally can also be given one group it is correct
Solution.The solution that certain two kinds of algorithms are given is not necessarily equal.
Prove：1. first process degree is 1 check-node (if not spending the check-node for 1 in figure at the very start, at it
The situation of the process of reason is equal to the figure of the check-node that degree of having at the beginning is 1, without the check-node that degree is 1 in solution to figure
Situation afterwards).This step effect is equal to solving equations, and the check-node min algorithm that equation group can be solved equally can be solved.
2. without the check-node that degree is 1 in figure.When the degree of the check-node in figure is all higher than 2, then a verification has been solved
Node degree of being not in is 1 check-node, is more not in check-node and same variable section of the individual degree of k (k >=2) for 1
The connected situation (for easy analysis, k=2 all being taken below) of point, so we are big without the degree of check-node in consideration figure
In 2 situation.
A) (1 degree is 2 → 2 situations about spending for 1) has processed a degree and has spent for 1 to occur two after 2 check-node
Check-node situation about being connected with same variable node, then these three schools before this degree is processed for 2 check-node
Testing the matrix situation of node must be
Middle null vector has been left out, row-column exchangeable.Obviously this figure has ring, sets in our topic, such case
Be not in.
B) (1 degree is 1 → 2 situation about spending for 1 for 2 → 1 degree) has processed a degree to occur after 2 check-node
Two check-nodes spent for 1, the two check-nodes arbitrarily process wherein one without being connected with same variable node, then
Individual degree spends situation about being connected with same variable node for 1 check-node to occur two after 1 check-node, then processing
This degree must be for the matrix situation of this four check-nodes before 2 check-node
Or
Middle null vector has been left out, row-column exchangeable.Obviously this figure has ring, sets in our topic, such case
Be not in.
Remaining situation is nothing but that some processes are added in the situation chain of a and b, but essence does not become.Therefore, when not having in figure
When spending the check-node for 1, check-node min algorithm can necessarily provide one group and correctly solve.
To sum up, when the Tanner figures that check matrix is generated are acyclic, check-node min algorithm and Gaussian reduction effect
It is identical.
Although when Tanner figures are acyclic, effect is equal to Gaussian reduction to check-node min algorithm, works as
When Tanner figures have ring, check-node min algorithm is just helpless.Because for degree identical check-node, check-node
Min algorithm is not distinguished, that is to say, that for there is mutually unison check-node, and whom is first processed on earth, and check-node is most
Little algorithm is not specified by, but in fact, can the order that process mutually unison check-node correct to obtain one group
Solution makes a strong impact.Below we give an example explanation.
Example 3.2The Tanner figures of matrix are as shown in Figure 4.
We can be found that (cn from Tanner figures1,vn1,cn2,vn2) and (cn3,vn4,cn4,vn5) difference cyclization.
cn1And cn4Degree be all 2, be that check-node moderate is minimum in figure, now, in check-node min algorithm,
First process cn1Or cn4It is to distinguish, but can process their order has decisive influence to obtain correct solution.
If first processing cn1, according to check-node min algorithm, v can be given1=1, v2=0；
Then cn2Degree be changed into 1, v can be given3=1；
Remaining cn3And cn4It is all identical, if however, v4,v5Meet c3, then v4 +v5=1；
And if v4,v5Meet c4, then v4+v5=0, this obvious contradiction, so cannot get one group correctly solving.Certainly, if
V at the beginning1And v2Value upset, then can obtain one group and correctly solve, but check-node min algorithm do not ensure that according to
This idea is to v1And v2Assignment, so, first process cn1One group can not necessarily be obtained correctly to solve.
If first processing cn4, then v is given4=0, v5=0；
Then cn3Degree be changed into 1, then give v2=1；
cn1Degree be changed into 1, give v1=0；
Finally give v3=1.
Even if initially giving v4=1, v5=1, we finally can still obtain one group and correctly solve, that is to say, that first locate
Reason cn4, we can necessarily obtain one group and correctly solve.
The structure of the ring in this example is still very simple, and the ring in practical application in figure is complicated more than this, because
This, solves the problems, such as that ring is most important.
Graph division algorithms are based on the characteristics of spending of variable node, and the certain rule of setting little by little deconstructs figure,
During destructing, part ring is turned on.
Graph division algorithms are broadly divided into two parts, and Part I is the destructing to figure, and provide one group of process
The order of check-node；Part II is the order of the process check-node be given according to Part I and asks with reference to remaining rule
The value of solution variable node.
Table 3.3graph division algorithmic rules
It is below will to provide a specific example to explain graph division algorithms.For the ease of embodying
Graph division algorithms for ring partial utility and with the difference of check-node min algorithm, lower example will be along use-case
3.2。
Example 3.3
Deconstruction：
(a) figure is the Tanner figures of original matrix in Fig. 5, and we can be with vn3Degree be 1, then will be with vn3Connected school
Test node cn24 are labeled as, then some are done to the node in figure and side and remove work having obtained (b) figure in Fig. 5, now (cn1,
vn1,cn2,vn2) constitute ring be opened；
(b) figure in Fig. 5, by cn13 are labeled as, are then attempted to change as (c) figure in Fig. 5；
(c) figure in Fig. 5, by cn32 are labeled as, are then attempted to change as (d) figure in Fig. 5；
(d) figure in Fig. 5, by cn4It is labeled as 1.
Then, we are just obtained one group and press new tactic check-node, and new order is：(cn4,cn3,cn1,
cn2)。
Solution procedure：
First process cn4, provide v4=0, v5=0, complete interdependent node and degree removes work (every time to having processed one
Work can be all removed after check-node, is repeated no more afterwards)；
cn3Degree become for 1, then first process cn3, provide v2=1；
cn1Degree become for 1, then process cn1, provide v1=0；
Finally provide v3=1.
It is similar with check-node min algorithm, although the graph division arthmetic statements for being given are that directly figure is carried out
Operation, but in fact, can be without using the structure of figure when our programming realizations, only need to by variable node and school
The syntopy of node is tested, the work that removes on node and side will not be also done, but can labelling.
Because graph division algorithms are broadly divided into destructing and solve two parts, to graph division
The analysis of the computation complexity of algorithm can also be divided into two parts to be carried out.
If figure can not be deconstructed completely, algorithm never proceeds to solution part, so, in order to be able to calculate
Graph division algorithms can at most carry out how many times add operation, it will be assumed that figure can be deconstructed completely and solution procedure
Can be smoothed out.
Deconstruction：
Each wheel can remove a check-node and associated side, and this is equivalent to the variable being connected with this check-node
The degree of node will all subtract 1, if the degree of this check-node is ωc, then often wheel can carry out ωcSub-addition is operated.And in original graph altogether
There is m0Individual check-node, if the maximum degree of check-node is d in original graphc, therefore, m can be at most carried out in deconstruction0dc
Sub-addition is operated, without multiplication operation.
Solution procedure：
Can occur where add operation be when the value of a variable node is given, the check-node being attached thereto
Value can be updated, and the degree of the check-node being attached thereto also accordingly can subtract 1, if the degree of this variable node is ωv, so,
The value of a variable node is often given, 2 ω can be carried outvSub-addition is operated.We set the maximum degree of variable node in initial figure
For dv, because n altogether0There is individual variable node, so solving part can at most carry out 2n0dvSub-addition computing, without multiplication operation.
In sum, graph division algorithms can at most carry out m0dc+2n0dvSub-addition is operated.Again because dc＜ ＜
n0,dv＜ ＜ m0, so asymptotic analyses, the computation complexity of graph division algorithms is O (n).
Graph division algorithms are compared to check-node min algorithm, although add operation sum has increase, always
Calculation times remain within the order of magnitude of O (n), from from the order of magnitude of computation complexity, two algorithms are without what
Difference.
In the simplicity that this trifle is described for Algorithm Analysis, I will provide another kind of form of presentation of diagram structure.
Another kind of description of the algorithm of part is deconstructed in table 3.4graph division algorithms
Lemma 3.1vnkValue must be in cnkBe given when processed.
Prove：As deg (vnkDuring)=1, it is clear that set up；
As deg (vnkDuring) >=1, it is assumed that vnkValue be first not in cnkBe given when processed, that is, work as cnkAlso
When not processed, vnkValue it is just given.
Can be drawn by the mode of solution composition, except cnkOutward, remaining and vnkThe corresponding line number of connected check-node is equal
More than k, i.e., with vnkIf be processed in processed the 3rd step that must be in solution procedure of connected check-node, might as well
If processed check-node is cnk+t, then when its is processed, deg (ck+t)=1, as deg (ck+tDuring)=1, it is clear that vnkAlso do not have
There is given value, then now vnk+tNecessarily it has been given value, i.e. vnk+tValue be not in cnk+tBe given when processed
, this and assume " vnkValue be first not in cnkBe given when processed " contradiction, so, it is assumed that it is false.
Again as it is assumed that in k can take 1,2 ..., the arbitrary value in m, so vnkValue must be in cnkProcessed
When be given.
Card is finished.
If the figure of theorem 3.2 can be deconstructed completely, the order of one group of complete check-node can be provided, then graph
Division algorithms one surely provide one group and correctly solve.
Prove：From lemma 3.1, any check-node cnkWhen processed, at least there is a variable node vnk
Also do not have given value, i.e., by giving vnkOrder we can necessarily provide one group and cnkThe value of connected variable node is expiring
Sufficient cnk.So, if figure can be deconstructed completely, the order of one group of complete check-node can be provided, then graph
Division algorithms one surely provide one group and correctly solve.
Card is finished.
After a kind of new algorithm is proposed, need to embody its performance by the Realization of Simulation.Emulation experiment can give me
The detailed data of performance with regard to new algorithm is provided, by the analysis of data and compare, it is potential that we can find algorithm
Problem and area for improvement.
We will first introduce the design of emulation experiment in this chapter, then to check-node min algorithm, graph
Division algorithms and Gaussian reduction are entered respectively on binary defect channel (Binary DefectiveChannel, BDC)
Row Monte-Carlo Simulation, and the simulation result for three algorithms is compared analysis to these three algorithms.
The design of BDC channel models and Monte-Carlo Simulation
Heegard and ElGamal considers a kind of probability channel model, and Mahdavifar and Vardy is referred to as in its paper
It is the binary defect channel of q for shortage probability, is denoted as BDC (q).
BDC channel models
Make q and have probability for shortage probability, i.e. memory element and be likely to become perfect memory element for 1-q, have probability to be q
Be likely to become stuck cell, the fixed value of wherein stuck cell hasPossibility be 0, havePossibility be 1；Make Ψ=
{ 0,1 } is binary character collection,λ is an element not in set Ψ, and z represents character setIn arbitrary unit
Element, and with following probability distribution：
Define BDC channelsFor：
In practical operation, the random number generator that we are designed with M.Matsumoto＆T.Nishimura ' Mersenne
Twister' produces a string of binary randoms number of the length for n, wherein the probability for having q per the number on position is 0, have a 1-q can
Energy property is 1.We using this string binary random number intermediate value be 1 position as stuck cell position.
For the performance of algorithm, weighed with the probability that cannot correctly solve i.e. error rate herein.The mistake of algorithm
Rate is defined as：Under the shortage probability q of a determination, algorithm can not show that the number of times of one group of correct solution accounts for the ratio of total degree.
Want calculating ratio, the end condition of the emulation of design both can be total degree, or wrong frame number.The end that we select
Only condition is to reach certain wrong frame number, because before emulation, we not can know that under certain shortage probability, it
Error rate can reach how many, along with the randomness of errors present, once regulation emulation total degree, it is more likely that mistake can be caused
Frame number is few, and error rate is floated big inaccurate.
The value of the check-node in equation (3.2) can take the n-dimensional vector on two element field, so during emulation, Wo Menke
To produce the value of the check-node of one group of non-full zero by certain rule.
Algorithm performance is emulated
In this trifle, we will be emulated from four kinds of binary system LDPC codes.The first code is code word size for 548,
Information bit length is 274 abnormal LDPC code, and the maximum row weight of this yard is 8, and maximum column weight is 11, is denoted as C1 codes；Second
Code is the regular LDPC code that code word size is 800, information bit length is 400, and the row weight of this yard is 6, and row weight is 3, is denoted as C2 codes；
The third yard is the abnormal LDPC code that code word size is 1000, information bit length is 500, and the maximum row weight of this yard is 7, maximum
Row weight is 3, is denoted as C3 codes；4th kind of code is the regular LDPC code that code word size is 3780, information bit length is 252, this yard
Row weight is 60, and row weight is 4, is denoted as C4 codes.First three code isThe code of code check, the 4th is height that code check is 0.933
The code of code check.
Check-node min algorithm simulation result and analysis
Performance comparision curve such as Fig. 6 and Fig. 7 based on the check-node min algorithm and Gaussian reduction of C1 codes and C2 codes
Shown, Fig. 6 is the Performance comparision curve of the C1 codes of check-node min algorithm and Gaussian reduction, and Fig. 7 is that check-node is minimum
The Performance comparision curve of the C2 codes of algorithm and Gaussian reduction.We can be seen that from two figures, although different codes are same
In the case of one shortage probability, the error rate of two kinds of algorithms is had nothing in common with each other, but overall trend is all consistent.In fact, I
Not only done the emulation of upper the two yards of figure, other two code is also emulated, and trend situation is consistent with this two figures, and
And the performance curve of another two code also will show in next trifle, so just no longer showing here.
From figure 7 it can be seen that during with C2 codes, when shortage probability is near 0.44, the error rate of Gaussian reduction is just
Jing is down to 10-3This order of magnitude, and the error rate of check-node min algorithm will be down to 10-3This order of magnitude, shortage probability is then
0.27 is less than, performance loss is more than 17%.
From Fig. 6 again it can be seen that compared to Gaussian reduction, check-node min algorithm performance loss nearly 17%.
Although using C1 codes, the performance loss of check-node min algorithm has certain reduction compared with C2 codes, on the whole
Difference is little, it is seen that though the performance between code and code has different, trend is consistent, and between the code of code check
Difference is simultaneously little.
Because the code of upper two figures is allCode check, so the performance boundary of algorithm is 0.5, i.e., when shortage probability is more than
0.5, Gaussian reduction and check-node min algorithm fail simultaneously.
Graph division algorithm simulatings results and analysis
Based on the check-node min algorithm of C2 codes, C3 codes and C4 codes, graph division algorithms and Gaussian reduction
Performance comparision curve as shown in Fig. 8,9 and 10, Fig. 8 is the Performance comparision curve of the C2 codes of three kinds of algorithms, and Fig. 9 is three kinds of algorithms
C3 codes Performance comparision curve, Figure 10 is the Performance comparision curve of the C4 codes of three kinds of algorithms.
Fig. 8 and Fig. 9 has still used twoThe code of code check, so the performance boundary of algorithm is 0.5.
Figure 10 be the high code check that code check is 0.933 code, so the performance boundary of algorithm is 0.066.
Although from above-mentioned three extensionals energy comparison diagram can be seen that C2 codes, C3 codes and C4 codes in code check, whether be regular LDPC
Code, code length and row rearrange go up again it is how variant, but the trend of the performance curve of each algorithm of three figures is but consistent.
From fig. 9, it can be seen that during with C3 codes, when shortage probability is near 0.44, the error rate of Gaussian reduction is down to
10-3This order of magnitude, the error rate of graph division algorithms is down to 10-3During this order of magnitude, shortage probability is attached 0.37
Closely, therefore compared to Gaussian reduction, graph division algorithm performances loss about 7%.
Also can be seen that from Fig. 8, be allThe performance loss of the C2 codes of code check similarly about 7%.
It is not difficult as seen from Figure 10, used as the C4 codes of high code check, it uses the performance loss of graph division algorithms about
1%.
In sum, it can be found that graph division algorithms have very big compared to check-node min algorithm performance
Lifting, though and have a performance loss compared to Gaussian reduction, loss is fine, especially when with high code check code, and
And graph division algorithms low compared with Gaussian reduction two orders of magnitude on computation complexity.
Referring to Figure 11, the present embodiment discloses a kind of coding writing station based on sparse matrix, including：
First computing unit 1, for calculating the coset leader v corresponding with information m to be writtenm, wherein,M=
(m1,m2,…,mk), corresponding (n, the k) block codes of m are C, vm=(v1,v2,…,vn)；
Second computing unit 2, for based on sparse matrixVector b is calculated, wherein,
i1,i2,…,isRepresent the position of stuck cells, a1,a2,…,asRepresent the fixed value of stuck cells, HzIt is from the school of C
Test in matrix H and take out i-th1,i2,…,is(n-k) × s rank submatrixs of row composition；
Writing unit 3, for using m ' as storage value write storage unit, wherein, m '=vm+bH。
Although being described in conjunction with the accompanying embodiments of the present invention, those skilled in the art can be without departing from this
Various modifications and variations are made in the case of bright spirit and scope, such modification and modification are each fallen within by claims
Within limited range.
Claims (6)
1. a kind of coding wiring method based on sparse matrix, it is characterised in that include：
S1, the calculating coset leader v corresponding with information m to be writtenm, wherein,M=(m1,m2,…,mk), m correspondences
(n, k) block code be C, vm=(v1,v2,…,vn)；
S2, based on sparse matrixVector b is calculated, wherein,i1,
i2,…,isRepresent the position of stuck cells, a1,a2,…,asRepresent the fixed value of stuck cells, HzIt is the verification from C
I-th is taken out in matrix H1,i2,…,is(n-k) × s rank submatrixs of row composition；
S3, using m ' as storage value write storage unit, wherein, m '=vm+bH。
2. method according to claim 1, it is characterised in that the S2, including：
S210, from check matrixThe minimum check-node cn of selectance in corresponding Tanner figuresk；
S211, give cnkA connected variable node vntAssign cnkValue ck；
S212, judgment variable node vntValue vtWhether it is 1, if vtFor 1, then by all with variable node vntConnected verification section
The value of point is all overturn, and 0 will be changed into 1,1 and is changed into 0；
S213, remove variable node vntAnd all sides being attached thereto, and remove the school that all degree in the Tanner figures are changed into 0
Test node；
There is check-node to be removed if S214, judgement are known, whether the value for checking removed check-node is 0, if all
The value of removed check-node is 0, and judges to know that also check-node then returns to step S210 in the Tanner figures,
Otherwise, step S215 is jumped to if no check-node if judging to know in the Tanner figures；
S215, the value for obtaining variable node, and the vector that the value of variable node is constituted is defined as into vectorial b.
3. method according to claim 1, it is characterised in that the S2, including destructing part and part is solved, wherein,
The destructing part includes：
S220, initialization y=m0, wherein, m0For check matrixThe quantity of check-node in corresponding Tanner figures；
If S221, judgement know the variable node that degree of having in the Tanner figures is 1, the verification being connected with the variable node
Vertex ticks is y, and renewal y is y-1, removes the check-node and the side related to the check-node, and degree of removing is 0 variable
Node；
S222, the variable node that whether degree of having is 1 is judged in the Tanner figures, if degree of having is 1 change in the Tanner figures
Amount node, then execution step S221, otherwise, then execution step S223；
If S223, judgement are known in the Tanner figures without check-node, solution part is jumped to；
The part that solves includes：
S224, for according to each ascending check-node of labelling, to the variable node assignment being attached thereto so that institute
The summation for stating the value of the variable node being attached thereto is equal with the value of the check-node；
If S225, judging to know the variable node for having value in the variable node being attached thereto as 1, will be with the phase therewith
Variable node intermediate value be that 1 value of the connected check-node of variable node all overturns, 0 will be changed into 1,1 and be changed into 0, remove
The variable node being attached thereto and the side related to the variable node being attached thereto, and remove the school that all degree are for 0
Node is tested, whether the value for checking removed check-node is 0, if the value of all check-nodes is 0, execution step
S226；
If S226, judgement know the check-node that degree of having in the Tanner figures is 1, the value of the check-node is assigned to therewith
Connected variable node, if judging to know the value of the variable node being attached thereto as 1, by with the change being attached thereto
The value upset of the connected all check-nodes of amount node, 0 will be changed into 1,1 and be changed into 0, remove the variable node being attached thereto
And the side related to the variable node being attached thereto, and all degree are removed for 0 check-node, check removed verification
Whether the value of node is 0, if the value of all check-nodes is 0, continues to carry out other degree in figure for 1 check-node
Process until without the check-node that degree is 1 in figure, turning S227；
S227, the value for obtaining variable node, and the vector that the value of variable node is constituted is defined as into vectorial b.
4. a kind of coding writing station based on sparse matrix, it is characterised in that include：
First computing unit, for calculating the coset leader v corresponding with information m to be writtenm, wherein,M=(m1,
m2,…,mk), corresponding (n, the k) block codes of m are C, vm=(v1,v2,…,vn)；
Second computing unit, for based on sparse matrixVector b is calculated, wherein,
i1,i2,…,isRepresent the position of stuck cells, a1,a2,…,asRepresent the fixed value of stuck cells, HzIt is from the school of C
Test in matrix H and take out i-th1,i2,…,is(n-k) × s rank submatrixs of row composition；
Writing unit, for using m ' as storage value write storage unit, wherein, m '=vm+bH。
5. device according to claim 4, it is characterised in that second computing unit, specifically for performing following step
Suddenly：
S210, from check matrixThe minimum check-node cn of selectance in corresponding Tanner figuresk；
S211, give cnkA connected variable node vntAssign cnkValue ck；
S212, judgment variable node vntValue vtWhether it is 1, if vtFor 1, then by all with variable node vntConnected verification section
The value of point is all overturn, and 0 will be changed into 1,1 and is changed into 0；
S213, remove variable node vntAnd all sides being attached thereto, and remove the school that all degree in the Tanner figures are changed into 0
Test node；
There is check-node to be removed if S214, judgement are known, whether the value for checking removed check-node is 0, if all
The value of removed check-node is 0, and judges to know that also check-node then returns to step S210 in the Tanner figures,
Otherwise, step S215 is jumped to if no check-node if judging to know in the Tanner figures；
S215, the value for obtaining variable node, and the vector that the value of variable node is constituted is defined as into vectorial b.
6. device according to claim 4, it is characterised in that second computing unit, specifically for performing destructing step
Rapid and solution procedure, wherein,
The destructing step includes：
S220, initialization y=m0, wherein, m0For check matrixThe quantity of check-node in corresponding Tanner figures；
If S221, judgement know the variable node that degree of having in the Tanner figures is 1, the verification being connected with the variable node
Vertex ticks is y, and renewal y is y-1, removes the check-node and the side related to the check-node, and degree of removing is 0 variable
Node；
S222, the variable node that whether degree of having is 1 is judged in the Tanner figures, if degree of having is 1 change in the Tanner figures
Amount node, then execution step S221, otherwise, then execution step S223；
If S223, judgement are known in the Tanner figures without check-node, solution part is jumped to；
The solution procedure includes：
S224, for according to each ascending check-node of labelling, to the variable node assignment being attached thereto so that institute
The summation for stating the value of the variable node being attached thereto is equal with the value of the check-node；
If S225, judging to know the variable node for having value in the variable node being attached thereto as 1, will be with the phase therewith
Variable node intermediate value be that 1 value of the connected check-node of variable node all overturns, 0 will be changed into 1,1 and be changed into 0, remove
The variable node being attached thereto and the side related to the variable node being attached thereto, and remove the school that all degree are for 0
Node is tested, whether the value for checking removed check-node is 0, if the value of all check-nodes is 0, execution step
S226；
If S226, judgement know the check-node that degree of having in the Tanner figures is 1, the value of the check-node is assigned to therewith
Connected variable node, if judging to know the value of the variable node being attached thereto as 1, by with the change being attached thereto
The value upset of the connected all check-nodes of amount node, 0 will be changed into 1,1 and be changed into 0, remove the variable node being attached thereto
And the side related to the variable node being attached thereto, and all degree are removed for 0 check-node, check removed verification
Whether the value of node is 0, if the value of all check-nodes is 0, continues to carry out other degree in figure for 1 check-node
Process until without the check-node that degree is 1 in figure, turning S227；
S227, the value for obtaining variable node, and the vector that the value of variable node is constituted is defined as into vectorial b.
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