CN106557352A - A kind of method for realizing the two-way execution of instruction set simulator forward and reverse - Google Patents

A kind of method for realizing the two-way execution of instruction set simulator forward and reverse Download PDF

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CN106557352A
CN106557352A CN201610906730.7A CN201610906730A CN106557352A CN 106557352 A CN106557352 A CN 106557352A CN 201610906730 A CN201610906730 A CN 201610906730A CN 106557352 A CN106557352 A CN 106557352A
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time point
time
crucial
instruction set
set simulator
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CN106557352B (en
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郑小萌
高栋栋
贾春鹏
滕俊元
虞砺琨
朱倩
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BEIJING SUNWISE INFORMATION TECHNOLOGY Co Ltd
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BEIJING SUNWISE INFORMATION TECHNOLOGY Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/362Software debugging
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)

Abstract

A kind of method for realizing the two-way execution of instruction set simulator forward and reverse, software is performed first by instruction set simulator, obtain the processor running status of the corresponding instruction set simulator of multiple crucial record time points, buffer status, internal storage state, peripheral state, then obtain outside and perform order, during positive execution, inversely performed if desired, the start time point for needing to inversely perform is obtained then, the termination time point that last use time granularity or needs are inversely performed calculates crucial record time point, and recover the processor running status of the instruction set simulator of crucial measuring point, buffer status, internal storage state, peripheral state, forward direction goes to the termination time point for needing to inversely perform, complete the two-way execution of instruction set simulator forward and reverse.

Description

A kind of method for realizing the two-way execution of instruction set simulator forward and reverse
Technical field
The present invention relates to a kind of program debugging and measuring technology, particularly one kind realize that instruction set simulator forward and reverse is two-way hold Capable method.
Background technology
Software debugging is to improve software quality with test, it is ensured that the requisite effective means of software reliability, software are surveyed The purpose of examination is to find software error, and the purpose of software debugging is Wrong localization, corrects mistake.In software debugging, test process In, generally require to make software go to the specific moment, consequently facilitating searching software issue.Generally in software test and debugging journey In program process, in order to be able to quickly position to mistake, can be in some important variant contents outputs (especially some variables Intermediate result), or before and after key variables, specific function, subprogram, the invocation of procedure, the Do statement and key portion such as loop body Position arranges breakpoint, and change and the software program state of significant variable are monitored with this.Said method can show software program Dynamic behaviour, and the error correction using software program language positioned to mistake, above-mentioned test in addition is adopted with adjustment method Instrument supports that single step or multistep are performed, and progressively shows runs software program state information.Can be with according to the status information Analysis and the implementation status for judging software program, it is determined that the position of mistake.
But under many circumstances, positive single step or multistep perform the debugging demand that can not meet software program.When Software program is performed when there is mistake, and positive single step or multistep hard execution are confirming that software program is specifically from the beginning of when There is exception, and then the cause that software program performs mistake cannot be obtained.In this case it is necessary to test continuous with tuner Breakpoint is set before errors present is performed and the software that resets is debugged again, until finding error cause, take a substantial amount of time And energy, it is therefore desirable to a kind of measuring technology for realizing the two-way execution of software program.
The content of the invention
Present invention solves the technical problem that being:Overcome the deficiencies in the prior art, there is provided one kind realizes instruction set simulator The method of the two-way execution of forward and reverse, solves software program debugging, needs to go to be less than by targeted software programs in test process Or more than the problem at current emulation moment, the software program relatively current moment can be caused compared with prior art forward or backward Perform, substantially increase the efficiency and quality of software program debugging and test.
The present invention technical solution be:A kind of method for realizing the two-way execution of instruction set simulator forward and reverse, including such as Lower step:
(1) software is performed using instruction set simulator, execution is recorded and stored in software implementation procedure and is started When the processor running status of instruction set simulator, buffer status, internal storage state, peripheral state, wherein, peripheral state includes Software perform used virtual timer, bus, interrupt control unit, FPGA, the internal data of sensor;
Every time T records and the processor running status of store instruction set simulator, buffer status, internal storage state, Peripheral state is performed up to software and is terminated, and original starting time, each record time point is designated as crucial record time point, is obtained Crucial record time point set;Described original starting time is that software performs the time for starting;Wherein, T is positive number, crucial note Record time point is the simulation time in instruction set simulator, and each key record time point can be recorded and the simulation of store instruction collection The processor running status of device, buffer status, internal storage state, peripheral state;
(2) when needing to be inversely performed, the start time point for inversely performing is needed from outside acquisition and judged, if rising Beginning time point is not crucial record time point, then judge currently to inversely perform, if carry out instruction inversely performed, choose instruction Time granularity, and then obtain choosing instruction time granularity corresponding time, be then calculated need to inversely perform it is initial when Between point and difference t for choosing instruction time granularity corresponding time ', and be designated as the termination time point for needing to inversely perform, in pass Find in key record time point set closest to and the crucial of no more than t ' records time point, proceed to step (3), wherein, instruction Time granularity is positive number;If carrying out function reverse execution, Selection of Function time granularity, and then obtain Selection of Function time grain The corresponding time is spent, the start time point time corresponding with Selection of Function time granularity for needing to inversely perform then is calculated Difference t ', and be designated as the termination time point for needing to inversely perform, find in crucial record time point set closest to and not More than the crucial record time point of t ', step (3) is proceeded to, wherein, versus time granularity is positive number;If it is inverse to carry out software function To execution, then function time granularity is chosen, and then obtain choosing the function time granularity corresponding time, be then calculated needs Difference t of the start time point for inversely performing time corresponding with function time granularity is chosen ', and be designated as needing what is inversely performed Terminate time point, find in crucial record time point set closest to and the crucial of no more than t ' records time point, proceed to step Suddenly (3), wherein, function time granularity be positive number;If start time point is crucial record time point, current initial time is read The corresponding crucial record time point of point, and proceed to step (3);When needing to carry out positive execution, using instruction set simulator pair Software is performed, and then waits new inversely performing or positive execution;
The processor running status of the corresponding instruction set simulator of crucial record time point that (3) read step (2) is obtained, Buffer status, internal storage state, peripheral state, control instruction set simulator revert to the process of the instruction set simulator for reading The simulation time of instruction set simulator is reverted to crucial note by device running status, buffer status, internal storage state, peripheral state Record time point, realization are inversely performed to specified time point, then wait new inversely performing or positive execution.
The value of described T is 5s-10s.
Described crucial record time point set also includes the time point for obtaining by the following method:
(1) need to carry out the reverse reference time point debugged and be designated as ti from outside acquisition, find in [0-ti] and most connect The crucial record time point of nearly ti;
(2) the crucial record time point for obtaining step (1) and the middle time point of ti are used as the new crucial record time New crucial record time point is added to crucial record time point set by point;
(3) when the middle time point between the new crucial record time point of selection and ti is recorded as another new key Between point or choose middle time point between 0 and new crucial record time point as another new crucial record time Point;
(4) repeat step (3) chooses multiple crucial record time points, until element number in crucial record time point set Meet and require.
Described instruction time granularity is 1-20 cpu cycles.
Described instruction time granularity is 10 cpu cycles.
Described versus time granularity is 0.01ms-0.1ms.
Described function time granularity is 0.01s-0.1s.
Present invention advantage compared with prior art is:
The inventive method is by recording Each point in time correspondence in crucial record time point set in software implementation procedure The processor running status of instruction set simulator, buffer status, internal storage state, peripheral state, can control software carry out It is positive and inversely perform, it is to avoid traditional adjustment method can only know the result of software errors and being difficult to confirm software what When start exception occur, cause the doubt problem of error cause, tuner is performed and is inversely performed phase by positive With reference to debugging method, when the quick software searched start the cause for result that is abnormal, causing terminal error to present occur, section Save plenty of time and energy.
Description of the drawings
Fig. 1 is a kind of Method And Principle flow chart for realizing the two-way execution of instruction set simulator forward and reverse of the present invention.
Specific embodiment
The present invention is directed to the deficiencies in the prior art, there is provided a kind of side for realizing the two-way execution of instruction set simulator forward and reverse Method, when solving software program debugging, needing targeted software programs to be gone to less than or greater than current emulation in test process The problem at quarter, enables the software program relatively current moment to perform forward or backward, improves software program debugging and test Efficiency and quality, a kind of method for realizing the two-way execution of instruction set simulator forward and reverse of the present invention, including record material time node State, search recently a point of record, the interval of set-point, run to the steps such as the time of formulation, below in conjunction with the accompanying drawings The inventive method is described in detail, the inventive method as shown in Figure 1 comprises the steps.
STEP.1:The state of record key point.
Software is performed using instruction set simulator, referred to when execution beginning is recorded and stored in software implementation procedure The processor running status of set simulator, buffer status, internal storage state, peripheral state are made, wherein, peripheral state includes virtually Timer, bus, interrupt control unit, FPGA, the internal data of sensor, during crucial record time point is instruction set simulator Simulation time;Every time T records and the processor running status of store instruction set simulator, buffer status, internal storage state, Original starting time, each record time point are designated as crucial record time point, obtain crucial record time point set by peripheral state Close, wherein, the value of T is 5-10s, and in the inventive method, each key record time point can be recorded and store its corresponding finger Make the processor running status of set simulator, buffer status, internal storage state, peripheral state.
In addition, the inventive method can obtain or select new crucial record time point to add to the crucial record time Point set, improves precision, illustrates below in conjunction with a kind of mode for obtaining new material time point.
Need to carry out the reverse reference time point debugged and be designated as ti from outside acquisition, find closest to ti's at [0-ti] Key record time point, current key is recorded time point and records time point as new key with the middle time point of ti, so Between new crucial record time point and ti or between 0 and new crucial record time point, repeatedly said process is obtained more afterwards More new crucial record time point, until crucial record time point set meets required precision.
STEP.2:Time granularity is set
When going to the start time point for needing to inversely perform, judged, if current start time point is not STEP.1 The crucial record time point for obtaining, then judge currently to inversely perform, when inversely performing if necessary to instruction, then access time granularity For the individual cpu cycles of general 1-20 (preferably 10), the cpu cycle corresponding times are obtained, and then obtains access time granularity The corresponding time, then it is calculated the difference of the start time point time corresponding with access time granularity for needing to inversely perform T ', and the termination time point for needing to inversely perform is designated as, find closest to and the crucial of no more than t ' records time point;If entered Line function is inversely performed, then Selection of Function time granularity (0.01ms-0.1ms), and then obtains Selection of Function time granularity correspondence Time, be then calculated the difference of start time point time corresponding with Selection of Function time granularity for needing to inversely perform T ', and the termination time point for needing to inversely perform is designated as, closest and no more than t ' is found in crucial record time point set Crucial record time point;If carrying out software function to inversely perform, function time granularity (0.01s-0.1s) is chosen, and then Obtain choosing the function time granularity corresponding time, being then calculated needs the start time point for inversely performing and choose function Difference t of time granularity corresponding time ', and the termination time point for needing to inversely perform is designated as, in crucial record time point set Find in conjunction closest to and the crucial of no more than t ' records time point;
If the crucial record time point that current start time point is obtained for STEP.1, reads current start time point correspondence Crucial record time point.
STEP.3:Resume operation state.
The key that read step (2) is obtained records the processor running status of the corresponding instruction set simulator of time point, posts Storage state, internal storage state, peripheral state, control instruction set simulator revert to the processor of the instruction set simulator for reading The simulation time of instruction set simulator is reverted to crucial record by running status, buffer status, internal storage state, peripheral state Time point, realizes for instruction set simulator returning to execution state of the software in crucial record time point in instruction set simulator.
STEP.4:Perform downwards.
Complete currently to inversely perform after state of resuming operation, when needing to inversely perform again, repeat STEP.2-STEP.3 Complete to perform, the inventive method can also carry out positive execution according to Perfect Time point or time granularity in addition.
According to aforementioned four step, you can the method for realizing the two-way execution of instruction set simulator forward and reverse.Adopting said method The button that function toolbar " is run to " in product instrument is followed successively by from left to right:Time deposits point, arranges run time, transports forward Row, backward operation, parameter setting, deposit and to manage.Being somebody's turn to do " running to " function allows analogue system to run to the moment specified, it is intended that Moment can be less than the current emulation moment, and its principle is based on regularly depositing a little, when analogue system being returned to setting first Dotted state is deposited for nearest one before quarter, reruned the specified moment, in addition, the inventive method can be used deposits a management work( Can delete or be directly loaded up existing depositing dotted state.
The content not being described in detail in description of the invention belongs to the known technology of those skilled in the art.

Claims (7)

1. a kind of method for realizing the two-way execution of instruction set simulator forward and reverse, it is characterised in that comprise the steps:
(1) software is performed using instruction set simulator, is referred to when execution beginning is recorded and stored in software implementation procedure The processor running status of set simulator, buffer status, internal storage state, peripheral state are made, wherein, peripheral state includes software Execution used virtual timer, bus, interrupt control unit, FPGA, the internal data of sensor;
Simultaneously the processor running status of store instruction set simulator, buffer status, internal storage state, peripheral hardware are recorded every time T State is performed up to software and is terminated, and original starting time, each record time point are designated as crucial record time point, key is obtained Record time point set;Described original starting time is that software performs the time for starting;Wherein, T is positive number, during crucial record Between point be the simulation time in instruction set simulator, each key record time point can be recorded and store instruction set simulator Processor running status, buffer status, internal storage state, peripheral state;
(2) when needing to be inversely performed, the start time point for inversely performing is needed from outside acquisition and judged, if during starting Between put for crucial record time point, then judge currently to inversely perform, if carry out instruction inversely performed, choose the instruction time Granularity, and then obtain choosing the instruction time granularity corresponding time, then it is calculated the start time point for needing to inversely perform Difference t of time corresponding with instruction time granularity is chosen ', and the termination time point for needing to inversely perform is designated as, in crucial note Find in record time point set closest to and the crucial of no more than t ' records time point, proceed to step (3), wherein, the instruction time Granularity is positive number;If carrying out function reverse execution, Selection of Function time granularity, and then obtain Selection of Function time granularity pair The time answered, then it is calculated the difference of the start time point time corresponding with Selection of Function time granularity for needing to inversely perform Value t ', and the termination time point for needing to inversely perform is designated as, find in crucial record time point set closest to and be not more than The crucial record time point of t ', proceeds to step (3), wherein, versus time granularity is positive number;If carrying out software function inversely to hold OK, then function time granularity is chosen, and then obtains choosing the function time granularity corresponding time, be then calculated needs reverse Difference t of the start time point of execution time corresponding with function time granularity is chosen ', and it is designated as the termination for needing to inversely perform Time point, finds in crucial record time point set closest to and the crucial of no more than t ' records time point, proceed to step (3), wherein, function time granularity be positive number;If start time point is crucial record time point, current start time point is read Corresponding crucial record time point, and proceed to step (3);When needing to carry out positive execution, using instruction set simulator to soft Part is performed, and then waits new inversely performing or positive execution;
(3) the processor running status of the corresponding instruction set simulator of crucial record time point that read step (2) is obtained, deposit Device state, internal storage state, peripheral state, control instruction set simulator revert to the processor fortune of the instruction set simulator for reading Row state, buffer status, internal storage state, peripheral state, when the simulation time of instruction set simulator is reverted to crucial record Between point, realization inversely performed to specified time point, is then waited and new inversely performed or positive perform.
2. a kind of method for realizing the two-way execution of instruction set simulator forward and reverse according to claim 1, it is characterised in that:Institute The value of the T for stating is 5s-10s.
3. a kind of method for realizing the two-way execution of instruction set simulator forward and reverse according to claim 1 and 2, its feature exist In:Described crucial record time point set also includes the time point for obtaining by the following method:
(1) need to carry out the reverse reference time point debugged and be designated as ti from outside acquisition, find closest to ti in [0-ti] Crucial record time point;
(2) the crucial record time point for obtaining step (1) records time point as new key with the middle time point of ti, will New crucial record time point is added to crucial record time point set;
(3) middle time point between new crucial record time point and ti is chosen as another new crucial record time point Or the middle time point chosen between 0 and new crucial record time point records time point as another new key;
(4) repeat step (3) chooses multiple crucial record time points, until element number meets in crucial record time point set Require.
4. a kind of method for realizing the two-way execution of instruction set simulator forward and reverse according to claim 1 and 2, its feature exist In:Described instruction time granularity is 1-20 cpu cycles.
5. a kind of method for realizing the two-way execution of instruction set simulator forward and reverse according to claim 1 and 2, its feature exist In:Described instruction time granularity is 10 cpu cycles.
6. a kind of method for realizing the two-way execution of instruction set simulator forward and reverse according to claim 1 and 2, its feature exist In:Described versus time granularity is 0.01ms-0.1ms.
7. a kind of method for realizing the two-way execution of instruction set simulator forward and reverse according to claim 1 and 2, its feature exist In:Described function time granularity is 0.01s-0.1s.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109640353A (en) * 2019-01-17 2019-04-16 Tcl移动通信科技(宁波)有限公司 A kind of bluetooth equipment test method, intelligent terminal and storage medium
CN112380133A (en) * 2020-11-20 2021-02-19 北京轩宇信息技术有限公司 Method and device for simulating instruction set simulator by using function library
WO2021109366A1 (en) * 2019-12-06 2021-06-10 国微集团(深圳)有限公司 Method and system for viewing simulation signals of digital product

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110145800A1 (en) * 2009-12-10 2011-06-16 Microsoft Corporation Building An Application Call Graph From Multiple Sources
US20130036403A1 (en) * 2011-08-03 2013-02-07 Daniel Geist Method and apparatus for debugging programs
CN104133763A (en) * 2013-05-03 2014-11-05 富泰华工业(深圳)有限公司 Program debugging system and program debugging method
CN105723346A (en) * 2013-08-19 2016-06-29 微软技术许可有限责任公司 Snapshotting executing code with a modifiable snapshot definition

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110145800A1 (en) * 2009-12-10 2011-06-16 Microsoft Corporation Building An Application Call Graph From Multiple Sources
US20130036403A1 (en) * 2011-08-03 2013-02-07 Daniel Geist Method and apparatus for debugging programs
CN104133763A (en) * 2013-05-03 2014-11-05 富泰华工业(深圳)有限公司 Program debugging system and program debugging method
CN105723346A (en) * 2013-08-19 2016-06-29 微软技术许可有限责任公司 Snapshotting executing code with a modifiable snapshot definition

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109640353A (en) * 2019-01-17 2019-04-16 Tcl移动通信科技(宁波)有限公司 A kind of bluetooth equipment test method, intelligent terminal and storage medium
CN109640353B (en) * 2019-01-17 2023-10-03 Tcl移动通信科技(宁波)有限公司 Bluetooth equipment testing method, intelligent terminal and storage medium
WO2021109366A1 (en) * 2019-12-06 2021-06-10 国微集团(深圳)有限公司 Method and system for viewing simulation signals of digital product
CN112380133A (en) * 2020-11-20 2021-02-19 北京轩宇信息技术有限公司 Method and device for simulating instruction set simulator by using function library
CN112380133B (en) * 2020-11-20 2024-05-14 北京轩宇信息技术有限公司 Method and device for simulating instruction set simulator by utilizing function library

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