CN106530668A - Miniature collector - Google Patents
Miniature collector Download PDFInfo
- Publication number
- CN106530668A CN106530668A CN201611154202.7A CN201611154202A CN106530668A CN 106530668 A CN106530668 A CN 106530668A CN 201611154202 A CN201611154202 A CN 201611154202A CN 106530668 A CN106530668 A CN 106530668A
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- Prior art keywords
- harvester
- data
- clock
- toggle switch
- fpga
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- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C19/00—Electric signal transmission systems
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a miniature signal collector, a user can control the working mode of the miniature signal collector by a panel button and dial switch, at the same time can monitor intuitively the working state of the miniature signal collector by an indicator lamp, and the miniature signal collector is easy to use. The collector is provided with a power adapter interface, and requirements of long time work can be met by power supplied by an external adapter. Signals can be stored by the miniature signal collector into internal NANDFLASH in real time, and data can be transmitted to an upper computer through a USB interface for data analysis. The miniature signal collector has the advantages of small size and convenient carrying, and the miniature signal collector can continuously work for more than 3 hours by optimization of power supply of an internal lithium battery.
Description
Technical field
A kind of the present invention relates to field of information acquisition, more particularly to micro-collection device.
Background technology
In existing signal picker, large-scale whole set equipment is belonged to greatly, for during field trial, due to equipment build
Greatly, weight weight, power consumption are high, carry inconvenient, to the test in field trial especially small space cause than it is larger not
Just.
The content of the invention
The present invention discloses a kind of micro-collection device, and small volume is easy to carry, using simple, with built-in and external two kinds
Power supply mode, longevity of service.
To achieve these goals, the present invention adopts following scheme：
A kind of micro-collection device, including acquisition module, control module and power module, the acquisition module and the control
Molding block is electrically connected；The acquisition module includes ADC and Clock management chip, and the ADC is connected with the Clock management chip,
It is preferred that connecting by parallel bus, the selection of clock and the collection of analogue signal is completed；The control module include front panel,
FPGA, NANDFLASH and USB interface；The front panel, NANDFLASH and the USB interface are electrically connected with the FPGA,
For the control of the harvester data, process, storage and transmission；The power module includes AXP power management chips and lithium
Battery, the lithium battery are electrically connected with the AXP power management chips, the AXP power management chips and the acquisition module
Electrically connect with control module, for giving other module for power supply.The ADC models are preferably TI companies ADS42LB49 chips；It is described
Clock management chip is preferably ADI companies AD9517 chips；Spartan3s of the FPGA preferably for XILINX companies is serial.
The external numeral output of the ADS42LB49 chips is exported using DDR.
The acquisition module and the control module electrical connection be specially the control module FPGA by SPI interface with
The acquisition module electrical connection, the SPI interface are that the chip AD9517 is externally provided.
The front panel is provided with multiple man-machine interaction components, and man-machine interaction component is electric with corresponding circuits respectively
Connection, for being controlled to the various mode of operations of the harvester and each working condition refers to the harvester
Show.The man-machine interaction component be preferably reset key, clock selecting toggle switch, start gather button, stop collection by
Key, drainage pattern toggle switch, sampling rate toggle switch, sampling length toggle switch, power supply indicator, battery status are indicated
Lamp, acquisition state display lamp and hard disk state indicator lamp.
The FPGA electrically connects as believing by 64bit data signals and relevant control with the NANDFLASH storage arrays
Number connection.
CY7C68013USB control chip of the USB interface using CYPRESS companies, the preferred FPGA with it is described
USB interface electric connection mode is FIFO, and the agreement of the preferred USB interface transmission data is USB2.0 agreements.
The reset key control function include reset harvester working condition, erasing NANDFLASH internal datas and
Harvester is made to be in idle condition；Be external clock when the clock selecting toggle switch is allocated to ON, when being allocated to OFF for it is internal when
Clock；It is described to start collection and start gathered data by key control harvester, and store data in NANDFLASH；The stopping
Collection stops data collection by key control harvester；The drainage pattern toggle switch is sampled for triggering when being allocated to ON, is allocated to OFF
When for fully sampled；The sampling rate toggle switch internally clock when effectively, 4 kinds of samplings may be selected according to toggle switch state
Speed, 4 kinds of sampling rates are preferably 250MSPS, 150MSPS, 100MSPS and 50MSPS；The sampling length dial-up
Switch is effective when the drainage pattern is sampled for triggering, to the data length for selecting each trigger pulse to sample when arriving,
It is preferred that providing 1024 kinds of sampling lengths；The power supply indicator electric and voltage on the harvester is normal rear bright；The battery
Status indicator lamp has three states, and when electric quantity of lithium battery is more than 30%, the battery status display lamp is green, when lithium electricity
When pond electricity is less than 30%, the battery status display lamp is redness, and when lithium battery is in charged state, the battery status refers to
Show lamp for green flicker；The acquisition state display lamp, the flicker when the harvester carries out data acquisition, when the harvester
Stop data acquisition often bright；The hard disk state indicator lamp, when the NANDFLASH residual memory spaces are more than 20%
For green, it is redness during less than 20%.
The invention discloses a kind of signal picker of miniaturization, user can by panel button and toggle switch come
The mode of operation of the harvester is controlled, while can be according to display lamp come the working condition of intuitively monitoring collection device, using letter
It is single.The harvester can power to meet the need for working long hours by external adapter equipped with power adaptor interface
Ask.The harvester can be deposited the signal for collecting into internal NANDFLASH in real time, and can be by USB interface, by data
Transmitting into host computer carries out the analysis of data.The harvester is small easy to carry, and the internal lithium battery power supply of optimization is realized
Continuous work more than 3 hours.
Description of the drawings
Fig. 1 is internal structure block diagram of the present invention.
Fig. 2 is ADC of the present invention and FPGA connection diagrams.
Fig. 3 is Clock management module connection diagram of the present invention.
Fig. 4 is front panel schematic layout pattern of the present invention.
Fig. 5 is FPGA of the present invention and front panel annexation schematic diagram.
Fig. 6 is FPAG of the present invention and NANDFLASH array connection diagrams.
Fig. 7 is FPAG of the present invention and CY7C68013 connection diagrams.
Fig. 8 is power module connection diagram of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawings the specific embodiment of the invention is described in detail.
Harvester internal structure block diagram is as shown in figure 1, be broadly divided into：Control module, acquisition module and power module.
Acquisition module includes ADC and Clock management.ADC realizes 2 passages, highest sampling using ADS42LB49 chips
The sampling functions of rate 250MSPS, 14bit precision.Clock management chip AD9517 realizes the switching of internal clocking and external clock
And the control of sample rate.
Control module includes FPGA, NANDFLASH, USB interface and front panel.FPGA by the trigger of front panel come
The selection of external clock, triggering pattern, sampling length, control of gatherer process etc. in judging.Again the working condition of harvester is led to
Cross display lamp to show.Data storage is got up by the digital data transmission that ADC is transmitted by FPGA to NANDFLASH, and sentences
The state of disconnected USB interface, coordinates host computer to be read out data.
Power management module by AXP power management chips and lithium battery group into.By power management module, when without outer
During portion's power input, harvester is powered by lithium battery, after external power source is accessed, powered by external power source, while to lithium electricity
Pond is charged.
Next the embodiment of three modules of harvester is described in detail.
1. acquisition module
Acquisition module is made up of ADC and Clock management chip.The selection of clock and the collection of analogue signal are completed mainly
Function.ADS42LB49s of the ADC from TI companies, the chip have 2 collection of simulant signal passages, and highest can support 250MSPS
Sampling rate.ADC is connected by parallel bus with FPGA, connect block diagram as shown in Fig. 2 ADS42LB49 DA0 (P/N)-
DA6 (P/N) is connected with DA0 (the P/N)-DA6 (P/N) of FPGA respectively, the ADCLK of the ADCLK (P/N) and FPGA of ADS42LB49
(P/N) it is connected.
The external numeral outputs of ADS42LB49 are exported using DDR, have data output in the rising edge and trailing edge of clock,
Thereby reduce the quantitative requirement to FPGA IO.
AD9517 of the Clock management chip using ADI companies, the selection of the achievable clock of the chip and clock frequency
Control.By the chip, harvester can realize inside and outside clock selecting and sample rate adjustable function.AD9517 is externally provided
SPI interface, FPGA can be controlled to the mode of operation of AD9517 by the interface.When using external clock, Clock management
Module is not processed to external clock, directly feeds ADC.When using internal clocking, can be according to practical situation, to sampling clock
Frequency configured.Harvester can provide 4 kinds of sampling rates by toggle switch：250MSPS、150MSPS、100MSPS
And 50MSPS.The annexation schematic diagram of AD9517 is as shown in figure 3, SCLK, CS and SDIO of AD9517 is respectively with FPGA's
SCLK, CS and SDIO connect, and the OUT1 (P/N) of AD9517 is connected with CLKIN_P, CLKIN_N of ADC, and internal clock signal is defeated
Enter the REFIN pins to AD9517, external timing signal is input to the CLKIN pins of AD9517.
2. control module
Control module mainly includes front panel, FPGA, NANDFLASH, USB interface.
Harvester the control of various mode of operations is provided by the button on front panel, toggle switch and display lamp with
And the working condition of harvester is indicated.Front-panel structure schematic layout pattern is as shown in Figure 4.
Reset key：The working condition of harvester is reset, NANDFLASH internal datas are wiped, and harvester is made in the free time
State；
Clock selecting：The selection of interior external clock is carried out by toggle switch, when ON is allocated to, is external clock, when dial
During to OFF, it is internal clocking；
Start collection：By starting gathered data by key control harvester, and store data in NANDFLASH；
Stop collection：By stopping data collection by key control harvester；
Drainage pattern：Drainage pattern is selected by toggle switch, when ON is allocated to, is triggering sampling, is touched according to outside
Rise, carry out the data acquisition of particular sample length；When OFF is allocated to, it is fully sampled, harvester continuously will enter
Row data acquisition；
Sampling rate：When sampling clock select internal clocking when, sampling rate is selected by the toggle switch, according to dial
The state of code switch, harvester can provide four kinds of sampling rates：250MSPS, 150MSPS, 100MSPS and 50MSPS；
The corresponding sampling rate table of sampling rate toggle switch state：
SW1 SW2
[ON ON]-----250MSPS
[OFF ON]----150MSPS
[ON OFF]----100MSPS
[OFF OFF]----50MSPS
Sampling length：When drainage pattern selects to sample for triggering, each trigger pulse is selected by the toggle switch
The data length sampled during arrival.According to the state of toggle switch, harvester can provide 1024 kinds of sampling lengths：8(1×8)、16
(2×8)、24(3×8)…8192(1024×8)；
The corresponding sampling length table of sampling length toggle switch state：
SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 SW9 SW10
[OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF]----8(1×8)
[OFF OFF OFF OFF OFF OFF OFF OFF OFF ON]----16(2×8)
[OFF OFF OFF OFF OFF OFF OFF OFF ON OFF]----24(3×8)
……
[ON ON ON ON ON ON ON ON ON ON]----8192(1024×8)
Power supply instruction：After on harvester, electric and voltage is normal, the display lamp is bright；
Battery status：When electric quantity of lithium battery is more than 30%, the display lamp is green, when electric quantity of lithium battery is less than 30%
When, the display lamp is red filament.When lithium battery is in charged state, the display lamp is green flicker；
Acquisition state：When harvester carries out data acquisition, the display lamp flashes, when harvester stops data acquisition,
Display lamp Chang Liang；
Disk state：When the residual memory space of NANDFLASH is more than 20%, the display lamp is green；Work as residue
When space is less than 20%, the display lamp is redness；
The Spartan3 of FPGA selection XILINX companies is serial, and the family chip small power consumption is multiple functional, is suitable to small-sized setting
It is standby to use.FPGA is responsible for gathering front panel control information state, controls the mode of operation of harvester, and collector status is passed through
Display lamp shows.The digitalized data transmission that simultaneously ADC is gathered is stored to NANDFLASH.When harvester is connect by USB
When mouth is connected with host computer, according to host computer order, by the data transfer in NANDFLASH to host computer.FPGA and front panel
Annexation it is as shown in Figure 5.
Pass through 64bit data signals between FPGA and NandFlash storage arrays and associated control signal connects, realize number
According to transmission and FLASH control function.The annexation schematic diagram of FPGA and NANDFLASH is as shown in Figure 6.
In external interface, harvester provides USB2.0 interfaces to realize the transmission of outbound data.USB interface is adopted
The CY7C68013USB control chips of CYPRESS companies, the chip provide the interface of similar FIFO using simple to PFGA,
FPGA only need to carry out the USB2.0 protocol transmissions that FIFO reading and writing skills complete data to the chip.The company of FPGA and CY7C68013
Connect schematic diagram as shown in Figure 7.
3. power module
Power module mainly completes the functions of physical supply of harvester power supply.Power module mainly by AXP power management chips with
And lithium battery group into.AXP power management chips select AXP223, and it is a chip with battery detecting function.The chip
Can automatic detection whether have external power source to be input into, if there is external power source to be input into, powered using external power source, and detect battery
State, if battery electric quantity is not enough, will be charged to battery；If being input into without external power source, using lithium battery power supply.Power supply
Module connection diagram is as shown in Figure 8.
Present invention has the advantages that：
1) it is small, low in energy consumption, easy to use；
2) there are various triggering modes；
3) sampled data adjustable length；
4) there is interior external clock to switch and sample rate adjustable function；
5) there is jumbo data storage function.
Above embodiments of the invention are described in detail, but the content have been only presently preferred embodiments of the present invention,
It is not to be regarded as the practical range for limiting the present invention.All impartial change, improvement or groups made according to the present patent application scope
Close etc., still all should belong within the patent covering scope of the present invention.
Claims (7)
1. a kind of micro-collection device, including acquisition module, control module and power module, it is characterised in that：The collection mould
Block is electrically connected with the control module；The acquisition module includes ADC and Clock management chip, the ADC and the clock pipe
Reason chip connection, is preferably connected by parallel bus, completes the selection of clock and the collection of analogue signal；The control module
Including front panel, FPGA, NANDFLASH and USB interface；The front panel, NANDFLASH and the USB interface with it is described
FPGA is electrically connected, for the control of the harvester data, process, storage and transmission；The power module includes AXP power supply pipes
Reason chip and lithium battery, the lithium battery are electrically connected with the AXP power management chips, the AXP power management chips and institute
Acquisition module and control module electrical connection is stated, for giving other module for power supply.The ADC models are preferably TI companies
ADS42LB49 chips；The Clock management chip is preferably ADI companies AD9517 chips；The FPGA is preferably XILINX
The Spartan3 of company is serial.
2. harvester according to claim 1, it is characterised in that：The external numeral output of the ADS42LB49 chips adopts DDR
Output.
3. harvester according to claim 1, its spy is being：The acquisition module and control module electrical connection are concrete
FPGA for the control module is electrically connected with the acquisition module by SPI interface, and the SPI interface is the chip
What AD9517 was externally provided.
4. harvester according to claim 1, it is characterised in that：The front panel is provided with multiple man-machine interaction components,
Man-machine interaction component is electrically connected with corresponding circuits respectively, for the various mode of operations of the harvester are controlled with
And each working condition is indicated to the harvester.The man-machine interaction is preferably reset key, clock selecting with component
Toggle switch, start gather button, stop collection button, drainage pattern toggle switch, sampling rate toggle switch, sampling length
Toggle switch, power supply indicator, battery status display lamp, acquisition state display lamp and hard disk state indicator lamp.
5. harvester according to claim 1, it is characterised in that：The FPGA is electrically connected with the NANDFLASH storage arrays
It is connected in and is connected by 64bi t data signals and associated control signal.
6. harvester according to claim 1, it is characterised in that：The USB interface is using CYPRESS companies
CY7C68013USB control chips, the preferred FPGA are FIFO with the USB interface electric connection mode, preferred described
The agreement of USB interface transmission data is USB2.0 agreements.
7. harvester according to claim 4, it is characterised in that：The reset key control function includes resetting harvester
Working condition, erasing NANDFLASH internal datas and make harvester be in idle condition；The clock selecting toggle switch is allocated to
It is external clock during ON, is internal clocking when being allocated to OFF；It is described start collection start gathered data by key control harvester, and
Store data in NANDFLASH；The stopping collection stopping data collection by key control harvester；The drainage pattern is dialled
Code switch is sampled for triggering when being allocated to ON, is fully sampled when being allocated to OFF；The sampling rate toggle switch internally clock when have
Effect, according to toggle switch state may be selected 4 kinds of sampling rates, 4 kinds of sampling rates be preferably 250MSPS, 150MSPS,
100MSPS and 50MSPS；The sampling length toggle switch is effective when the drainage pattern is sampled for triggering, to select
The data length that each trigger pulse is sampled when arriving, preferably provides 1024 kinds of sampling lengths；The power supply indicator is described
It is bright after on harvester, electric and voltage is normal；The battery status display lamp has three states, when electric quantity of lithium battery is more than 30%
Shi Suoshu battery status display lamp is green, and when electric quantity of lithium battery is less than 30%, the battery status display lamp is redness, when
When lithium battery is in charged state, the battery status display lamp is green flicker；The acquisition state display lamp, adopts when described
Storage carries out flicker during data acquisition, often bright when the harvester stops data acquisition；The hard disk state indicator lamp, works as institute
It is green to state when NANDFLASH residual memory spaces are more than 20%, is redness during less than 20%.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611154202.7A CN106530668A (en) | 2016-12-14 | 2016-12-14 | Miniature collector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611154202.7A CN106530668A (en) | 2016-12-14 | 2016-12-14 | Miniature collector |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106530668A true CN106530668A (en) | 2017-03-22 |
Family
ID=58339480
Family Applications (1)
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| CN201611154202.7A Pending CN106530668A (en) | 2016-12-14 | 2016-12-14 | Miniature collector |
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-
2016
- 2016-12-14 CN CN201611154202.7A patent/CN106530668A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101738301A (en) * | 2008-11-17 | 2010-06-16 | 北京卫星环境工程研究所 | High-capacity and high-speed parallel dynamics test data acquisition technology |
| CN101604968A (en) * | 2009-05-21 | 2009-12-16 | 北京大学深圳研究生院 | A kind of channel extensible multi-phase high-performance clock method for designing and system |
| CN101782647A (en) * | 2010-02-09 | 2010-07-21 | 南京大学 | Dynamic radar signal simulator |
| CN102455684A (en) * | 2011-10-20 | 2012-05-16 | 西安交通大学 | Dynamic characteristic on-line tester of feeding system of numerical control machine |
| CN104361143A (en) * | 2014-11-28 | 2015-02-18 | 成都龙腾中远信息技术有限公司 | Portable data acquisition card and method thereof |
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Application publication date: 20170322 |
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