CN106526476A - Power-flow current breaking capacity test synthetic circuit synchronous control device and method - Google Patents
Power-flow current breaking capacity test synthetic circuit synchronous control device and method Download PDFInfo
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Abstract
The invention provides a power-flow current breaking capacity test synthetic circuit synchronous control device and method. The device comprises a power frequency oscillation circuit as well as a power frequency oscillation startup detection unit, a trigger phase control unit and a photoelectric conversion and ignition unit connected in sequence. The device and the method can avoid the problem of time delay caused by detecting a switch-on contact or circuit current signal, improve the accuracy of time control, reduce electromagnetic coupling interference of self circuit, effectively avoid spatial electromagnetic coupling interference and conducted interference intrusion of a power supply line, ensure safe and reliable operation of the circuit, effectively avoid false triggering accidents caused by high-current electromagnetic interference at the moment of power frequency startup and shock ignition of a system and strong electromagnetic pulse spatial coupling, and improve the running reliability and safety of the system.
Description
Technical field
The present invention relates to power system anti-thunder technical field, specifically a kind of power frequency continued flow breaking capacity test synthesis loop
Sync control device and method.
Background technology
Long-term research is launched for the power frequency continued flow breaking capacity test developed country of electric power line arrester, at present
Have been developed that the large-scale experiment device of measurement circuit spark gap power frequency continued flow breaking capacity, the integrated lightning impulse of the device and power frequency
Power supply, the actual condition is struck by lightning by true simulation hanging net operation leakage conductor, but its synchronisation control means is by monolithic
What machine or PLC control system were realized to control breaker closing separating brake, cost and equipment occupation space it is huge.Need simultaneously to divide
Not Ce Shi chopper intrinsic closing time and opening time and duration of ignition etc. of igniter, need according to certain
Sequential carries out precise control execution and just can ensure that success of the test, and test failure rate is higher.Simultaneously as in synthesis loop test
The lightning impulse voltage to power frequency high voltage high-current supply with hundreds of kilovolts is needed to synchronize control, during EMC Design such as
It is a key technology that what is avoided by power frequency heavy-current magnetic field and amplitude height, climbing speed electromagnetic pulse interference quickly, past
It is past synchronization control circuit false triggering to be caused due to such electromagnetic interference and causes test failure, or even cause serious equipment fault
And personal injury.
Patent CN101025433A discloses a kind of synthetic test Synchronization Control system for primary cut-out synthetic test
System, its synchronisation control means are by gathering short circuit current, by A/D post-conversion predictive current curves, predicting short circuit current
At the zero crossing moment, so as to Synchronization Control pulse is sent before zero crossing, ignition pill gap is made to puncture action at the moment subscribed.Due to
Loop short circuit current can not be mutated, and its rising time is ms levels, synchronize control time precision by gathering short circuit current
It is not accurate enough.System is to carry out data acquisition, calculating by single-chip microcomputer or PLC control system control Low-voltage Electronic circuit to send same
, there is the shortcomings of EMC Design is difficult, and functional realiey is complicated in step control instruction.Under impacting with high pressure effect, Low-voltage Electronic
Control circuit and Control System of Microcomputer are easily interfered and fail.
Domestic manufacturer designs a kind of afterflow cut-out test loop for external series gap leakage conductor can be had
Effect carries out leakage conductor operating duty cycle test, and its lightning impulse voltage is randomly generated action time, does not carry out power frequency
Voltage triggered and surge voltage Synchronization Control are designed, it is impossible to are simulated lightning protection device and are subjected to thunderbolt in each phase place of power frequency net pressure and hit
Wear the testing experiment of power frequency continued flow breaking capacity under the conditions of flashover.
104267277 B of patent CN discloses a kind of over-pressed barrier propterty test device of over-pressure safety device and control
Method and system, its synchronisation control means be by gathering lightning impulse voltage signal triggering power electronic power device, it is real
The quick input in existing oscillation frequency loop, by oscillation frequency loop and surge voltage loop while to carry out power frequency continued flow
Breaking capacity testing experiment.The method can only simulate the work that over-pressure safety device is subjected to lightning stroke flashover in power-frequency voltage peak value
Condition, it is impossible to simulate the working condition is struck by lightning at each phase place of power-frequency voltage complete period by over-pressure safety device.
104237751 B of patent CN discloses a kind of test device of lightning protection device power frequency continued flow breaking capacity, its synchronization
Control principle is the discharging time in the ball gap distance controlling oscillation frequency loop using regulation different circuit and impulsive discharge, and which has
Have the advantages that it is safe and reliable, simple, do not disturbed by electromagnetic compatible environment, significantly improve success of the test rate.But due to which
Discharge time is controlled using the difference of arcing distance, easily by the factor shadow such as air humidity, atmospheric pressure and electrode shape
Ring, simultaneously because bubble-discharge has certain discreteness and causes lock in time control accuracy inadequate.
The content of the invention
The present invention provides a kind of power frequency continued flow breaking capacity test synthesis loop sync control device and method, can avoid leading to
The delay problem that detection combined floodgate contact or loop current signals are brought is crossed, time control accuracy is improve;Reduce itself loop
Electromagnetic coupled is disturbed, and the Conduction Interference for being prevented effectively from spatial electromagnetic coupled interference and power supply circuit is invaded, it is ensured that circuit is pacified
Full reliability service;It is prevented effectively from because system is in power frequency startup, the large-current electric magnetic disturbance of impact ignition point and strong electromagnetic pulse
Space Coupling and the false triggering accident brought occurs, improve operational reliability and the safety of system.
A kind of power frequency continued flow breaking capacity test synthesis loop sync control device, including oscillation frequency loop and connect successively
The oscillation frequency for connecing starts detector unit, phase-triggered control unit, opto-electronic conversion and igniting unit, the oscillation frequency loop
Start chopper K1, oscillation frequency electric capacity C, oscillation frequency inductance L including the oscillation frequency being connected in series;
The oscillation frequency is started detector unit and is connected with the outfan in oscillation frequency loop, is shaken for detecting power frequency
Swing the upper first voltage jump rising edge of inductance L and be converted to logic level signal needed for control circuit, and by logic electricity
Ordinary mail number is converted to optical signal, sends phase-triggered control unit to by optical fiber;
The phase-triggered control unit, the optical signal for oscillation frequency to be started detector unit output are converted to logic
High level signal, and holding high level is latched, phase-triggered control unit passes through default on the basis of logic high rising edge
Delay time, export the pulse electrical signal of a fixed pulse width, and be converted to equal with pulse width time light letter
Number, and opto-electronic conversion and igniting unit are sent to by optical fiber;
The opto-electronic conversion and igniting unit, for by the optical signal that phase-triggered control unit is exported be converted to one it is wide
The degree pulse electrical signal equal with the optical signal persistent period, by the use of the pulse electrical signal as drive signal, drive amplification isolation
Circuit produces high-voltage pulse, and high-voltage pulse is acted in surge voltage ignition pill gap, starts surge voltage loop, output impact electricity
Pressure is applied to test product two ends.
Further, the oscillation frequency starts detector unit includes oscillation frequency triggers circuit and electro-optical signal conversion electricity
Road, oscillation frequency triggers circuit include electric resistance partial pressure device, optocoupler OP1, and electric resistance partial pressure device is parallel to oscillation frequency inductance L's
Voltage scale on oscillation frequency inductance L is divided into driving optocoupler OP1 output triggerings after low-voltage signal by two ends, electric resistance partial pressure device
Signal, the trigger drive electro-optical signal change-over circuit to send optical signal.
Further, the electric resistance partial pressure device is sequentially connected in series by resistance R1, R2, R3, R4 and is formed, and resistance R4 mono- is terminated greatly
Used as low-pressure end, another terminating resistor R3 is used as high-pressure side on ground.
Further, the oscillation frequency triggers circuit 11 also includes the Transient Suppression Diode D1 in parallel with resistance R4,
The high-pressure side of the negative electrode connecting resistance bleeder mechanism of Transient Suppression Diode D1, anode connect low-pressure end, Transient Suppression Diode D1's
Negative electrode is connected to the light-emitting diodes tube anode of optocoupler OP1, and anode is connected to the light-emitting diodes tube cathode of optocoupler OP1, to prevent light
Coupling OP1 former limits are punctured by backward voltage.
Further, the electro-optical signal change-over circuit include resistance R5, R6, R7, DC source, analog line driver U2,
Light emitting diode U1, analog line driver U2 include NAND gate and audion, and the output emitter stage of optocoupler OP1 connects power supply ground,
Colelctor electrode Jing after resistance R5 pull-up as analog line driver U2 in one of NAND gate input, when oscillation frequency starts, this is defeated
Enter and be changed into low level, NAND gate another input connects DC source, and DC source is connected to light emitting diode U1 through resistance R7
Anode, be connected to the negative electrode of light emitting diode U1 through resistance R6;In U2 the colelctor electrode of audion 122 be connected to resistance R6 with
The common node of light emitting diode U1 negative electrodes, emitter stage are connected to power supply ground, when an input in U2 is low level, will drive
Built-in triode ON is moved, light emitting diode U1 sends optical signal.
Further, the phase-triggered control unit includes the photoelectric signal transformation circuit for concatenating, latches and time delay control
Circuit processed, electro-optical signal change-over circuit,
The photoelectric signal transformation circuit includes that optical signal receives head U3, resistance R8, R9, R10, R11, audion Q1, light
Signal receives the colelctor electrode Jing resistance R8 of head U3 and is pulled to+5V power supplys, transmits when oscillation frequency startup detector unit 10 is received
During the optical signal for coming, U3 output low level signals are jumped by resistance R9 to audion Q1 base stages, audion Q1 cut-offs, its colelctor electrode
High level is faded to, latch and delay control circuit are delivered to by resistance R11;
The latch and delay control circuit include high level latch cicuit and delay control circuit, high level latch cicuit
The high level signal that resistance R11 is transmitted is latched, delay control circuit receives the high level signal being latched, with high electricity
On the basis of flat rising edge, the impulse level signal of a fixed width is exported through a default delay time;
The electro-optical signal change-over circuit is for the pulse electricity according to latch and the fixed width of delay control circuit output
The ordinary mail output duration optical signal equal with impulse level signal time width.
Further, the electro-optical signal change-over circuit includes resistance R13, R14, R7, DC source, analog line driver
U4, light emitting diode U5, the light is latched and the impulse level signal of delay control circuit output is sent to analog line driver U4
One input of NAND gate, NAND gate another input connect DC source, are always high level signal, and DC source is through electricity
Resistance R14 is connected to the anode of light emitting diode U5, is connected to the negative electrode of light emitting diode U5 through resistance R13;Audion in U4
Colelctor electrode be connected to the common node of resistance R13 and light emitting diode U5 negative electrodes, emitter stage is connected to power supply ground.
Further, the opto-electronic conversion and igniting unit include photoelectric signal transformation circuit and igniting unit, the light
Electric signal conversion circuit includes that optical signal receives head U6, resistance R15, resistance R16, resistance R17, electric capacity C3, audion Q2, light letter
Number receive after head U6 receives the optical signal that phase-triggered control unit 20 sends, colelctor electrode saltus step is low level, low level signal
The base stage of audion Q2 is connected to by resistance R16, audion Q2 cut-offs are driven, the colelctor electrode saltus step of Q2 is high level, described
Igniting unit includes resistance R18, R19, R20, storage capacitor C4, metal-oxide-semiconductor Q3, pulse transformer T1, surge voltage ignition pill gap,
The logical high level signal of audion Q2 colelctor electrodes drives metal-oxide-semiconductor Q3 open-minded by resistance R18, and service time and the height for receiving are electric
Flat signal duration is equal, storage capacitor C4 primary side windings successively with pulse transformer T1, the drain electrode of metal-oxide-semiconductor Q3, metal-oxide-semiconductor
The source electrode of Q3, current-limiting resistance R19 are connected serially to power supply ground, and T1 side winding high voltage pulse of pulse transformer is connected by resistance R20
It is connected to the spray point of surge voltage ignition pill gap.
A kind of power frequency continued flow breaking capacity test synthesis loop synchronisation control means, is carried out using said apparatus, the side
Method comprises the steps:
Step one, closure oscillation frequency start chopper K1, and oscillation frequency loop starts to start;
Step 2, the oscillation frequency start detector unit and will detect upper first voltage jump of oscillation frequency inductance L
Rising edge is converted to the logic level signal needed for control circuit, and the logic level signal is converted to optical signal, passes through
Optical fiber sends phase-triggered control unit to;
The optical signal that oscillation frequency starts detector unit output is converted to and is patrolled by step 3, the phase-triggered control unit
High level signal is collected, and latches holding high level, phase-triggered control unit passes through pre- on the basis of logic high rising edge
If delay time, export the pulse electrical signal of a fixed pulse width, and be converted to the light equal with pulse width time
Signal, and opto-electronic conversion and igniting unit are sent to by optical fiber;
The optical signal that phase-triggered control unit is exported is converted to one by step 4, the opto-electronic conversion and igniting unit
The width pulse electrical signal equal with the optical signal persistent period, by the use of the pulse electrical signal as drive signal, drive amplification every
High-voltage pulse is produced from circuit, high-voltage pulse is acted in surge voltage ignition pill gap, start the output impact of surge voltage loop
Voltage is applied to test product two ends, and one time test operation terminates.
Further, the power supply that frequency vibration swings startup detector unit is button cell, and signal transmission time delay is in 100ns
It is interior;Phase-triggered control unit circuit signal delivery lag is in 200ns;When opto-electronic conversion and Firing cell circuitry signal transmission
Prolong in 100ns.
The present invention has following advantages:
1st, vibration inductive drop signal in oscillation frequency loop is caught by electric resistance partial pressure device and is used as oscillation frequency voltage
Start beginning condition, make use of oscillation frequency in oscillation frequency loop after starting breaker closing, to vibrate the spy of inductive drop mutation
Point, it is to avoid by detecting delay problem that combined floodgate contact or loop current signals are brought, improve time control accuracy.
2nd, in power frequency continued flow breaking capacity test synthesis loop, oscillation frequency starts detector unit and igniter close to conjunction
The power device in loop, in synthesis loop is tested and started, suffered strong power frequency electromagnet interference and high intensity EMP are done
Disturb the most serious.The present invention can be substantially reduced unit volume and equivalent plane by way of self-contained battery group is as control power supply
Area, without external power supply circuit, substantially reduces the interference of itself loop electromagnetic coupled, is prevented effectively from spatial electromagnetic coupling dry
Disturb the Conduction Interference intrusion with power supply circuit, it is ensured that circuit safety reliability service.
3rd, in synthesis loop, detector unit, timing control unit and the optical fiber transmission technique performed between igniting unit are substituted
Cable transmission control circuit, effectively prevent because system power frequency startup, the large-current electric magnetic disturbance of impact ignition point and
Strong electromagnetic pulse Space Coupling and the false triggering accident brought occurs, improve operational reliability and the safety of system.
4th, synchronisation control means fully relies on hardware circuit design realization, opto-electronic conversion and level conversion time delay in ns levels,
Within one complete signal flow time delay can be controlled in 500ns, it is ensured that oscillation frequency in the test of power frequency continued flow breaking capacity
Voltage all phase control accuracy.
Description of the drawings
Fig. 1 carries out power frequency continued flow blocking energy for power frequency continued flow breaking capacity test synthesis loop sync control device of the present invention
The structural representation of power test;
The schematic block circuit diagram of Fig. 2 power frequency continued flow breaking capacity test synthesis loop sync control devices of the present invention;
During Fig. 3 is of the invention, oscillation frequency starts the circuit theory diagrams of detector unit;
The circuit theory diagrams of phase-triggered control unit during Fig. 4 is of the invention;
The circuit theory diagrams of opto-electronic conversion and igniting unit during Fig. 5 is of the invention;
The result of the test figure of Fig. 6 power frequency continued flow breaking capacity test synthesis loop synchronisation control means of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawing in the present invention, the technical scheme in the present invention is clearly and completely described.
Fig. 1 is refer to, power frequency continued flow breaking capacity test synthesis loop sync control device of the present invention is one of to be implemented
Example includes that the oscillation frequency loop being sequentially connected, oscillation frequency start detector unit 10, phase-triggered control unit 20, photoelectricity and turn
Change and igniting unit 30, the oscillation frequency loop includes that the oscillation frequency being connected in series starts chopper K1, oscillation frequency electricity
Hold C, oscillation frequency inductance L.
Power frequency continued flow breaking capacity test is carried out to test product 40 using the present invention, oscillation frequency is closed first and is started chopper
K1, oscillation frequency loop start to start.
The oscillation frequency is started detector unit 10 and is connected with the outfan in oscillation frequency loop, for detecting power frequency
The vibration upper first voltage jump rising edge of inductance L is converted to the logic level signal needed for control circuit, and by the logic
Level signal is converted to optical signal, sends phase-triggered control unit 20 to by optical fiber;
The phase-triggered control unit 20, for the optical signal that oscillation frequency startup detector unit 10 is exported is converted to
Logic-high signal, and latch holding high level, phase-triggered control unit 20 on the basis of logic high rising edge, Jing
Default delay time is crossed, the pulse electrical signal of a fixed pulse width is exported, and is converted to equal with pulse width time
Optical signal, and opto-electronic conversion and igniting unit 30 are sent to by optical fiber;
The opto-electronic conversion and igniting unit 30, for the optical signal that phase-triggered control unit 20 is exported is converted to one
The individual width pulse electrical signal equal with the optical signal persistent period, by the use of the pulse electrical signal as drive signal, drive amplification
Isolation circuit produces high-voltage pulse, and high-voltage pulse is acted in surge voltage ignition pill gap 50, starts surge voltage loop, once
Test operation terminates.
Fig. 2 is refer to, the oscillation frequency starts oscillation frequency triggers circuit 11 and the electricity that detector unit 10 includes concatenating
Optical signal change-over circuit 12, the phase-triggered control unit 20 include the photoelectric signal transformation circuit 21 for concatenating, latch and prolong
When control circuit 22, electro-optical signal change-over circuit 23, the opto-electronic conversion and igniting unit 30 include that the photosignal for concatenating turns
Change circuit 31 and igniting unit 32.
Fig. 3 show oscillation frequency and starts 10 circuit theory diagrams of detector unit, and oscillation frequency starts detector unit 10 to be included
Oscillation frequency triggers circuit 11 and electro-optical signal change-over circuit 12, wherein oscillation frequency triggers circuit 11 include that electric resistance partial pressure is filled
Put, Transient Suppression Diode D1, optocoupler OP1, be sequentially connected in series by resistance R1, R2, R3, R4 and form electric resistance partial pressure device, be parallel to
The two ends of oscillation frequency inductance L in oscillation frequency loop, used as low-pressure end, another terminating resistor R3 makees the termination the earth of resistance R4 mono-
For high-pressure side (i.e. the outfan of electric resistance partial pressure device), voltage scale on oscillation frequency inductance L is divided into low pressure by resistance R4 to be believed
Number, optocoupler OP1 output triggers.Transient Suppression Diode D1 is in parallel with resistance R4, and the negative electrode of D1 connects high-pressure side, and anode connects
Low-pressure end.The negative electrode of D1 is connected to the light-emitting diodes tube anode of optocoupler OP1, and D1 anodes are connected to the light-emitting diodes tube cathode of OP1,
To prevent optocoupler OP1 former limits from being punctured by backward voltage.
The electro-optical signal change-over circuit 12 includes resistance R5, R6, R7, DC source (such as+5V power supplys), power drive
Device U2, light emitting diode U1, the output emitter stage of optocoupler OP1 connect power supply ground, and colelctor electrode is Jing after resistance R5 pull-up as work(
An input of NAND gate 121 in rate driver U2, when oscillation frequency starts, the input (the triggering letter of optocoupler OP1 outputs
Number) it is changed into low level.NAND gate 121 another input connects+5V power supplys, is always high level signal.+ 5V power supplys are through resistance R7
The anode of light emitting diode U1 is connected to, and the negative electrode of light emitting diode U1 is connected to through resistance R6;The collection of audion 122 in U2
Electrode is connected to the common node of resistance R6 and light emitting diode U1 negative electrodes, and emitter stage is connected to power supply ground.When one in U2
Be input into for low level when, built-in audion 122 will be driven to turn on, light emitting diode U1 sends optical signal.
It is button cell component that oscillation frequency starts the power supply of detector unit 10, and signal transmission time delay is in 100ns.
Fig. 4 show 20 circuit theory diagrams of phase-triggered control unit, and the phase-triggered control unit 20 includes concatenation
Photoelectric signal transformation circuit 21, latch and delay control circuit 22, electro-optical signal change-over circuit 23.
The photoelectric signal transformation circuit 21 includes that optical signal receives head U3, resistance R8, R9, R10, R11, audion Q1,
Optical signal receives the colelctor electrode Jing resistance R8 of head U3 and is pulled to+5V power supplys, passes when oscillation frequency startup detector unit 10 is received
When passing the optical signal for coming, U3 output low level signals are by resistance R9 to audion Q1 base stages, audion Q1 cut-offs, its colelctor electrode
Saltus step is delivered to latch and delay control circuit 22 by resistance R11, to high level between U3 colelctor electrodes and power supply ground simultaneously
Connection electric capacity C1, to filter high-frequency interferencing signal.
The latch and delay control circuit 22 include high level latch cicuit and delay control circuit, and high level latches electricity
The high level signal that resistance R11 is transmitted is latched by road, and delay control circuit receives the high level signal being latched, with height
On the basis of level rising edge, the impulse level signal of a fixed width is exported through a default delay time.
The electro-optical signal change-over circuit 23 starts electro-optical signal change-over circuit 12 in detector unit 10 with oscillation frequency
Circuit structure is similar to, including resistance R13, R14, R7, DC source (such as+5V power supplys), analog line driver U4, light emitting diode
U5。
The light is latched and the impulse level signal of the output of delay control circuit 22 is sent to analog line driver U4 NAND gate
An input, NAND gate another input connects+5V power supplys, is always high level signal.+ 5V power supplys connect through resistance R14
The anode of light emitting diode U5 is connected to, and the negative electrode of light emitting diode U5 is connected to through resistance R13;The colelctor electrode of audion in U4
The common node of resistance R13 and light emitting diode U5 negative electrodes is connected to, emitter stage is connected to power supply ground.
Impulse level signal drives built-in audion, triode ON time and arteries and veins through the NAND gate of analog line driver U4
Rush level signal time width equal.In current-limiting resistance R14 and analog line driver U4 under the collective effect of audion, luminous two
Pole pipe U5 lights, and its persistent period is equal with impulse level signal time width.20 circuit signal of phase-triggered control unit is passed
Time delay is passed in 200ns.
Fig. 5 show 30 circuit theory diagrams of the opto-electronic conversion and igniting unit, the opto-electronic conversion and igniting unit 30
Including photoelectric signal transformation circuit 31 and igniting unit 32.
The photoelectric signal transformation circuit 31 includes that optical signal receives head U6, resistance R15, resistance R16, resistance R17, electric capacity
C3, audion Q2, after optical signal reception head U6 receives the optical signal that phase-triggered control unit 20 sends, colelctor electrode saltus step is low
Level, low level signal are connected to the base stage of audion Q2 by resistance R16, drive the colelctor electrode of audion Q2 cut-offs, Q2 to jump
It is changed into high level.
The igniting unit 32 includes resistance R18, R19, R20, storage capacitor C4, metal-oxide-semiconductor Q3, pulse transformer T1, punching
Hit voltage ignition pill gap 50.The logical high level signal of Q2 colelctor electrodes drives metal-oxide-semiconductor Q3 open-minded by resistance R18, service time with
The high level signal persistent period for receiving is equal.Storage capacitor C4 primary side windings successively with pulse transformer T1, metal-oxide-semiconductor Q3
Drain electrode, the source electrode of metal-oxide-semiconductor Q3, current-limiting resistance R19 be connected serially to power supply ground.Storage capacitor C4 be pre-charged, when metal-oxide-semiconductor Q3 it is open-minded
When, the electric charge of storage capacitor C4 storages is released by pulse transformer T1 primary side windings, Q3 drain electrodes and source electrode, current-limiting resistance R19
To power supply ground, high voltage pulse is induced in the secondary side winding of pulse transformer T1.T1 side winding high voltage of pulse transformer
Pulse is connected to the spray point of surge voltage ignition pill gap 50 by resistance R20, produces point discharge spark, ignition pill gap air
It is ionized, starts surge voltage loop, output surge voltage is applied to 40 two ends of test product (as shown in Figure 1).Opto-electronic conversion and point
30 circuit signal delivery lag of fiery unit is in 100ns.
The power frequency continued flow breaking capacity test synthesis loop synchronisation control means of present invention design passes through electric resistance partial pressure device
Inductive drop signal is vibrated in catching oscillation frequency loop and start condition as oscillation frequency voltage starting, make use of oscillation frequency
In loop, oscillation frequency vibrates inductive drop the characteristics of be mutated after starting breaker closing, it is to avoid by detect combined floodgate contact or
The delay problem that loop current signals are brought, improves time control accuracy.By self-contained battery group as control power supply
Mode can reducing unit volume and equivalent plane area, need not external power supply, substantially reduce itself loop electromagnetic coupled do
Disturb, the Conduction Interference for being prevented effectively from spatial electromagnetic coupled interference and power supply circuit is invaded, it is ensured that circuit safety reliability service.
Optical fiber transmission technique between unit instead of cable transmission control circuit, effectively prevent because system is in power frequency startup, impact
Large-current electric magnetic disturbance and the strong electromagnetic pulse Space Coupling of ignition point and the false triggering accident brought occurs.Synchronization Control side
Method fully relies on hardware circuit design realization, and opto-electronic conversion and level conversion time delay are in ns levels, a complete signal flow
Prolong within caning be controlled in 500ns, it is ensured that oscillation frequency voltage all phase control accuracy in the test of power frequency continued flow breaking capacity.Figure
6 is to carry out a kind of result of line thunder protection device power frequency continued flow breaking capacity test using control method of the present invention.
The above, the only specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, any
Belong to those skilled in the art the invention discloses technical scope in, the change or replacement that can be readily occurred in all are answered
It is included within the scope of the present invention.Therefore, protection scope of the present invention should be defined by scope of the claims.
Claims (10)
1. a kind of power frequency continued flow breaking capacity test synthesis loop sync control device, including oscillation frequency loop, the power frequency
Oscillation circuit includes that the oscillation frequency being connected in series starts chopper K1, oscillation frequency electric capacity C, oscillation frequency inductance L, its feature
It is:Also include the oscillation frequency that is sequentially connected start detector unit (10), phase-triggered control unit (20), opto-electronic conversion and
Igniting unit (30),
The oscillation frequency is started detector unit (10) and is connected with the outfan in oscillation frequency loop, is shaken for detecting power frequency
Swing the upper first voltage jump rising edge of inductance L and be converted to logic level signal needed for control circuit, and by logic electricity
Ordinary mail number is converted to optical signal, sends phase-triggered control unit (20) to by optical fiber;
The phase-triggered control unit (20), is converted to for oscillation frequency is started the optical signal that detector unit (10) exports
Logic-high signal, and latch holding high level, phase-triggered control unit (20) on the basis of logic high rising edge,
Through default delay time, the pulse electrical signal of a fixed pulse width is exported, and is converted to and pulse width time phase
Deng optical signal, and opto-electronic conversion and igniting unit (30) are sent to by optical fiber;
The opto-electronic conversion and igniting unit (30), for the optical signal that phase-triggered control unit (20) is exported is converted to one
The individual width pulse electrical signal equal with the optical signal persistent period, by the use of the pulse electrical signal as drive signal, drive amplification
Isolation circuit produces high-voltage pulse, and high-voltage pulse is acted in surge voltage ignition pill gap (50), starts surge voltage loop, defeated
Go out surge voltage and be applied to test product (40) two ends.
2. power frequency continued flow breaking capacity test synthesis loop sync control device as claimed in claim 1, it is characterised in that:Institute
State oscillation frequency and start detector unit (10) including oscillation frequency triggers circuit (11) and electro-optical signal change-over circuit (12), power frequency
Oscillatory trigger circuit (11) includes electric resistance partial pressure device, optocoupler OP1, and electric resistance partial pressure device is parallel to the two of oscillation frequency inductance L
Voltage scale on oscillation frequency inductance L is divided into driving optocoupler OP1 outputs triggering letter after low-voltage signal by end, electric resistance partial pressure device
Number, the trigger drives electro-optical signal change-over circuit (12) to send optical signal.
3. power frequency continued flow breaking capacity test synthesis loop sync control device as claimed in claim 2, it is characterised in that:Institute
State electric resistance partial pressure device and be sequentially connected in series by resistance R1, R2, R3, R4 and formed, the termination the earth of resistance R4 mono- is used as low-pressure end, the other end
Connecting resistance R3 is used as high-pressure side.
4. power frequency continued flow breaking capacity test synthesis loop sync control device as claimed in claim 3, it is characterised in that:Institute
Stating oscillation frequency triggers circuit 11 also includes the Transient Suppression Diode D1 in parallel with resistance R4, the moon of Transient Suppression Diode D1
The high-pressure side of pole connecting resistance bleeder mechanism, anode connect low-pressure end, and the negative electrode of Transient Suppression Diode D1 is connected to sending out for optocoupler OP1
Optical diode anode, anode are connected to the light-emitting diodes tube cathode of optocoupler OP1, to prevent optocoupler OP1 former limits from being hit by backward voltage
Wear.
5. power frequency continued flow breaking capacity test synthesis loop sync control device as claimed in claim 2, it is characterised in that:Institute
Electro-optical signal change-over circuit (12) is stated including resistance R5, R6, R7, DC source, analog line driver U2, light emitting diode U1, work(
Rate driver U2 includes NAND gate (121) and audion (122), and the output emitter stage of optocoupler OP1 connects power supply ground, colelctor electrode
Jing after resistance R5 pull-up as analog line driver U2 in one of NAND gate (121) input, when oscillation frequency starts, the input
It is changed into low level, NAND gate (121) another input connects DC source, and DC source is connected to light emitting diode through resistance R7
The anode of U1, is connected to the negative electrode of light emitting diode U1 through resistance R6;In U2, the colelctor electrode of audion 122 is connected to resistance R6
With the common node of light emitting diode U1 negative electrodes, emitter stage is connected to power supply ground, when an input in U2 is low level, will
Built-in audion (122) is driven to turn on, light emitting diode U1 sends optical signal.
6. power frequency continued flow breaking capacity test synthesis loop sync control device as claimed in claim 1, it is characterised in that:Institute
State phase-triggered control unit (20) including concatenation photoelectric signal transformation circuit (21), latch and delay control circuit (22),
Electro-optical signal change-over circuit (23),
The photoelectric signal transformation circuit (21) receives head U3, resistance R8, R9, R10, R11, audion Q1, light including optical signal
Signal receives the colelctor electrode Jing resistance R8 of head U3 and is pulled to+5V power supplys, transmits when oscillation frequency startup detector unit 10 is received
During the optical signal for coming, U3 output low level signals are jumped by resistance R9 to audion Q1 base stages, audion Q1 cut-offs, its colelctor electrode
High level is faded to, latch and delay control circuit (22) are delivered to by resistance R11;
The latch and delay control circuit (22) are including high level latch cicuit and delay control circuit, high level latch cicuit
The high level signal that resistance R11 is transmitted is latched, delay control circuit receives the high level signal being latched, with high electricity
On the basis of flat rising edge, the impulse level signal of a fixed width is exported through a default delay time;
The arteries and veins of fixed width of the electro-optical signal change-over circuit (23) for being exported according to latch and delay control circuit (22)
Rush the level signal output duration optical signal equal with impulse level signal time width.
7. power frequency continued flow breaking capacity test synthesis loop sync control device as claimed in claim 6, it is characterised in that:Institute
Electro-optical signal change-over circuit (23) is stated including resistance R13, R14, R7, DC source, analog line driver U4, light emitting diode U5,
The impulse level signal that the light is latched and delay control circuit (22) is exported is sent to of analog line driver U4 NAND gate
Input, NAND gate another input connect DC source, are always high level signal, and DC source is connected to through resistance R14
The anode of light emitting diode U5, is connected to the negative electrode of light emitting diode U5 through resistance R13;The colelctor electrode connection of audion in U4
To resistance R13 and the common node of light emitting diode U5 negative electrodes, emitter stage is connected to power supply ground.
8. power frequency continued flow breaking capacity test synthesis loop sync control device as claimed in claim 1, it is characterised in that:Institute
Opto-electronic conversion and igniting unit (30) are stated including photoelectric signal transformation circuit (31) and igniting unit (32), the photosignal turns
Changing circuit (31) and head U6, resistance R15, resistance R16, resistance R17, electric capacity C3, audion Q2 being received including optical signal, optical signal connects
Receive after head U6 receives the optical signal that phase-triggered control unit 20 sends, colelctor electrode saltus step is low level, low level signal passes through
Resistance R16 is connected to the base stage of audion Q2, drives audion Q2 cut-offs, and the colelctor electrode saltus step of Q2 is high level, the igniting
Unit (32) includes resistance R18, R19, R20, storage capacitor C4, metal-oxide-semiconductor Q3, pulse transformer T1, surge voltage ignition pill gap
(50), the logical high level signal of audion Q2 colelctor electrodes drives metal-oxide-semiconductor Q3 open-minded by resistance R18, service time with receive
The high level signal persistent period it is equal, storage capacitor C4 primary side windings successively with pulse transformer T1, the leakage of metal-oxide-semiconductor Q3
Pole, the source electrode of metal-oxide-semiconductor Q3, current-limiting resistance R19 are connected serially to power supply ground, and T1 side winding high voltage pulse of pulse transformer is by electricity
Resistance R20 is connected to the spray point of surge voltage ignition pill gap (50).
9. a kind of power frequency continued flow breaking capacity test synthesis loop synchronisation control means, it is characterised in that using claim 1-8
Any one of device carry out, methods described comprises the steps:
Step one, closure oscillation frequency start chopper K1, and oscillation frequency loop starts to start;
Step 2, the oscillation frequency start detector unit (10) and will detect upper first voltage jump of oscillation frequency inductance L
Rising edge is converted to the logic level signal needed for control circuit, and the logic level signal is converted to optical signal, passes through
Optical fiber sends phase-triggered control unit (20) to;
Oscillation frequency is started the optical signal conversion that detector unit (10) is exported for step 3, the phase-triggered control unit (20)
For logic-high signal, and holding high level is latched, phase-triggered control unit (20) is with logic high rising edge as base
Standard, through default delay time, exports the pulse electrical signal of a fixed pulse width, and is converted to and pulse width time
Equal optical signal, and opto-electronic conversion and igniting unit (30) are sent to by optical fiber;
The optical signal that phase-triggered control unit (20) is exported is converted to by step 4, the opto-electronic conversion and igniting unit (30)
One width pulse electrical signal equal with the optical signal persistent period, by the use of the pulse electrical signal as drive signal, driving is put
Big isolation circuit produces high-voltage pulse, and high-voltage pulse is acted in surge voltage ignition pill gap (50), starts surge voltage loop
Output surge voltage is applied to test product (40) two ends, and one time test operation terminates.
10. power frequency continued flow breaking capacity test synthesis loop synchronisation control means as claimed in claim 9, it is characterised in that:
It is button cell that frequency vibration swings the power supply of startup detector unit (10), and signal transmission time delay is in 100ns;Phase-triggered is controlled
Unit (20) circuit signal delivery lag is in 200ns;Opto-electronic conversion and igniting unit (30) circuit signal delivery lag exist
In 100ns.
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