Background technology
Triple channel HD video encoder chip, as its interface is more, compiles for HD video with 48 interfaces
The three-channel video DAC-circuit of code device, 10 tunnels of 10 road green channel input datas, pin B0-B9 including pin for G0-G9
The 10 road red channel input datas of blue channel input data and pin R0-R9,Blanking signal control input,With
Step signal control input, VDD supply voltages, CLOCK clocks input, GND ground,Blue channel Differential Input, IOB are blue logical
Road output,Green channel Differential Input, IOG green channels output,Red channel Differential Input, IOR red channels are defeated
Go out, COMP capacitance compensations end, VREF reference voltage, RSET output amplitudes control resistance,Battery saving mode control end, wherein
DAC resolution 10, highest sampling rate are 30MSPS, output current scope 2mA~26.5mA, using 48 lead flat packages
Encapsulation, entity size 7mm × 7mm.
At present, encoder production industry at home, needs to test various encoder products, for for detecting
The quality of encoder, especially to the chip more than pin, the shortcoming of manual detection is unstable product quality, the concordance of product
And poor reliability, labor strength is big, low production efficiency, and it is difficult to there is encoder manual test, the problems such as easily erroneous judgement by accident.
Content of the invention
The technical problem to be solved is, for above-mentioned deficiency of the prior art, to disclose 3 passage high definitions
Video encoder test circuit.
The technical solution adopted for the present invention to solve the technical problems is:
A kind of 3 passage HD video encoder test circuits, including for providing the digital control defeated of test control signal
Enter circuit, the RGB data input circuit for providing RGB data, the adjustable resistance circuit that offer test output current is provided, use
Power supply in the output detection circuit of collection output voltage electric current acquisition test data and for providing running voltage;
The power supply is connected with the power interface of chip to be measured, the control input of the digital control input circuit and chip to be measured
Interface connects, and the RGB data input circuit is connected with the RGB data input interface of chip to be measured, the output detection circuit
It is connected with the signal output part of chip to be measured.
Further, the output detection circuit includes load circuit, is separately positioned on the electric current of RGB data output interface
Detector and voltage detector, shown digital control input circuit adopt relay circuit.
Further, the adjustable resistance circuit is arranged on the RSET interface and VREF interfaces of chip to be measured.
Further, the digital control input circuit adopts PLC, wherein the outfan connection of PLC
Relay circuit, shown relay circuit are arranged on the digital control incoming line of chip to be measured, including being arranged on blanking letter
First relay switch of number control input circuit, it is arranged on the second relay switch of synchronizing signal control input circuit, sets
Put battery saving mode control end the 3rd relay switch and the 4th relay switch being arranged on supply voltage circuit,
And for control clock input the 5th relay switch.
Further, the load in the output detection circuit is 50 Ω.
The beneficial effects of the present invention is:3 passage HD video encoder test circuits are by arranging digital control input
Circuit provides the test control signal of 3 passage HD video encoders, and the digital control input circuit can adopt shift knob
As the input of control signal, it would however also be possible to employ PLC is automatically controlled, by carrying out selection control to testing output
Output testing data information, by being connected to the output detection circuit of chip to be measured, includes exporting to the electrical quantity of chip to be measured
Electric current, offset error, gain error, reference voltage range, source current and standby power electric current are tested, so that it is determined that treating
Survey chip and whether there is quality problems, it is ensured that the quality safety of the chip that dispatches from the factory, improve detection efficiency.
Specific embodiment
Below in conjunction with the accompanying drawings and embodiment describes the specific embodiment of the invention:
Referring to Fig. 1 and Fig. 2, wherein Fig. 1 is 3 passage HD video encoder test circuit block diagram proposed by the present invention;Fig. 2
For 3 passage HD video encoder test circuit figure proposed by the present invention.
As depicted in figs. 1 and 2,3 passage HD video encoder test circuit, including for providing test control signal
Digital control input circuit, for provide RGB data RGB data input circuit, for provide test output current adjustable
Resistance circuit, the output detection circuit of test data is obtained and for providing running voltage for gathering output voltage electric current
Power supply;The power supply is connected with the power interface of chip to be measured, the digital control input circuit and core to be measured
The control input interface connection of piece, the RGB data input circuit is connected with the RGB data input interface of chip to be measured, described
Output detection circuit is connected with the signal output part of chip to be measured.
In the embodiment of the present invention, 3 passage HD video encoder test circuits are carried by arranging digital control input circuit
For the test control signal of 3 passage HD video encoders, the digital control input circuit can adopt shift knob as control
The input of signal processed, it would however also be possible to employ PLC is automatically controlled, by carrying out selecting controlled output to treat to testing output
Data message is surveyed, by being connected to the output detection circuit of chip to be measured, output current, mistake is included to the electrical quantity of chip to be measured
Error, gain error, reference voltage range, source current and standby power electric current is adjusted to be tested, so that it is determined that chip to be measured
Whether there is quality problems, it is ensured that the quality safety of the chip that dispatches from the factory.
Further, the output detection circuit includes load circuit, is separately positioned on the electric current of RGB data output interface
Detector and voltage detector, shown digital control input circuit adopt relay circuit.
In the embodiment of the present invention, load circuit is connected with the signal output part of chip to be measured, is collection electric current and voltage letter
Number provide tandem circuit, wherein amperometric and voltage detector is arranged on the circuit of signal output part, digital control defeated
Enter circuit to be controlled relay circuit using PLC, so as to export corresponding test information, wherein PLC
Mitsubishi PLC FX2N-48MR model can be selected.
Further, the adjustable resistance circuit is arranged on the RSET interface and VREF interfaces of chip to be measured.
In the embodiment of the present invention, adjustable resistance circuit produces temperature independent voltage using band gap reference, by turning
Change circuit and convert this voltage to stable bias current, connect between the RSET interface and VREF interfaces of chip to be measured adjustable
Resistance, exports different bias currents by the access resistance for adjusting resistance.
Further, the digital control input circuit adopts PLC, wherein the outfan connection of PLC
Relay circuit, shown relay circuit are arranged on the digital control incoming line of chip to be measured, including being arranged on blanking letter
First relay switch of number control input circuit, it is arranged on the second relay switch of synchronizing signal control input circuit, sets
Put battery saving mode control end the 3rd relay switch and the 4th relay switch being arranged on supply voltage circuit,
And for control clock input the 5th relay switch.
In the embodiment of the present invention, it is right to be switched by control relayBlanking signal control input,Synchronizing signal
Control input, CLOCK clocks input andBattery saving mode control end is controlled, and can measure output current, imbalance and miss
Difference, gain error, reference voltage range, source current and standby power electric current, test temperature are 25 DEG C, and test supply voltage is
3.3V, clock frequency fCLK=50MHz are specific as follows:
1st, output current IO is measured:Method of testing:The available high accuracy number circuit tester direct measurement of output current IO test,
The tested end of one termination, the other end are grounded.During test, outfan is hanging, output current is detected using amperometric, has
Body is divided into 3 kinds of situations.1)RSET=530 Ω;G channel current is only surveyed.2)RSET=530
Ω;3)RSET=4933 Ω.During test, input signal VI=3.3V of DAC, measurement anode output.
Numeral input logic level:Tested port be chip output IOR to be measured,
IOG、IOB.Judge scope as:1)21≤│IOR│≤28;2)15≤│IOG│≤20;3) 1.5≤│ IOB │≤2.3, when detection electricity
When flow valuve meets above-mentioned judgement scope, then illustrate for the detection meets the requirements.
2nd, offset error eoffset is tested, makes DAC input datas for full 0, measure the size of current of anode output.Adjustable resistance
RSET=560 Ω, outfan open a way, numeral input logic level:
Tested port:Outfan IOR, IOG, IOB;Judge scope:Eoffset≤± 1%FSR.
3rd, gain error egain;The offset current of DAC is first measured, and offset current is obtained for IOFFSET, then will be input into number
According to being changed to complete 1, the size of current of anode output is measured, IF is obtained, using IF-IOFFSET=IGAIN, is obtained output current
IGAIN.For preferable IFSR computational methods areWherein, VREF is the magnitude of voltage measured on pin VREF.Wherein IO is output current.Adjustable resistance RSET=560 Ω;Outfan is opened a way;Numeral input logic electricity
Flat: VI=3.3V or 0V;Tested port:Outfan IOR, IOG, IOB;
Judge scope:- 15%≤egain≤5%.
4th, reference voltage range VREF;Under the ambient temperature of regulation, measured device is accessed in test system.Apply rule
Fixed supply voltage and reference voltage;Adjustable resistance RSET=560 Ω;Outfan load resistance:RL=50 Ω;Numeral input is patrolled
Collect level:Tested port:Pin VREF;Judge scope:1.08V≤VREF
≤1.38V.
5th, source current IDD;Adjustable resistance RSET=560 Ω;Outfan load resistance:RL=50 Ω;Numeral input is patrolled
Collect level:VI=3.3V;Tested port:The supply voltage of chip to be measured draws
Foot;Judge scope:50mA≤IDD≤90mA.
6th, standby power electric current IPD;WillBattery saving mode control end pin is grounded;Adjustable resistance RSET=560 Ω;
Outfan load resistance:RL=50 Ω;Numeral input logic level:
VI=3.3V, CLOCK=3.3V;Tested port:The supply voltage pin of chip to be measured.Judge scope:IPD≤5mA.
The present invention during parking, can carry out all-around mobile inspection before and after dangerous materials accumulating vehicle handling goods before and after maintenance
Survey, improve the safety of hazardous chemical accumulating tank.
The preferred embodiment for the present invention is explained in detail above in conjunction with accompanying drawing, but the invention is not restricted to above-mentioned enforcement
Mode, in the ken that those of ordinary skill in the art possess, can be with the premise of without departing from present inventive concept
Make a variety of changes.
Many other changes and remodeling can be made without departing from the spirit and scope of the present invention.It should be appreciated that the present invention is not
It is limited to specific embodiment, the scope of the present invention is defined by the following claims.