CN106505957B - Constantly the fast step with stable common mode feedback circuit responds ping-pong amplifier - Google Patents
Constantly the fast step with stable common mode feedback circuit responds ping-pong amplifier Download PDFInfo
- Publication number
- CN106505957B CN106505957B CN201610646433.3A CN201610646433A CN106505957B CN 106505957 B CN106505957 B CN 106505957B CN 201610646433 A CN201610646433 A CN 201610646433A CN 106505957 B CN106505957 B CN 106505957B
- Authority
- CN
- China
- Prior art keywords
- fully
- amplifier
- differential
- differential amplifier
- pair
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
Abstract
A kind of ping-pong amplifier comprising two fully-differential amplifier A1 and A2, error amplifier A3 and two couples of storage CM1, CM2 and CM3, CM4.CM1 connects A1 common-mode feedback control signal with the side of CM2 and switchably connects A3 output end, and the other side switchably connect with A1 difference output end and switchably connect with ping-pong amplifier output end.Mono- input terminal of A3 connects common mode reference voltage VCM, and another input terminal is switchably connect with A1 or A2 common-mode output.A3 is periodically connected between A1 common-mode output and its common-mode feedback control signal and CM1 and CM2 is connect to form a closed circuit with A1 difference output end, forces A1 common mode output voltage equal with VCM;CM1 and CM2 compensation loop stability stores the difference of A3 output voltage Yu A1 common mode output voltage simultaneously.CM3 and CM4 act on A2 in a similar way.
Description
Technical field
The present invention relates to the fields of ping-pong amplifier in Analogous Integrated Electronic Circuits, more specifically to a kind of constantly real
The technology of now stable switched-capacitor circuit common mode feedback circuit and the step response performance for improving the amplifier.
Background technique
It is well known that cmos device can be effectively reduced by being widely used in the ping-pong amplifier technology of field of precision measurement
Input offset voltage and 1/f flicker noise.Fig. 1 show the schematic diagram of a basic ping-pong amplifier.A pair of of fully differential amplification
Device A1 and A2 respectively receive a differential input signal being made of signal INP and INN.The difference output end and a pair of switches of A1
The output end of S1 and S2 connection and A2 are connect with switch S3 and S4;One provides the Single-end output amplifier of the output of ping-pong amplifier
The differential input end of A0 connect with the output end of switch S1 and S2 and connect with the output end of switch S3 and S4, in the output of A0
The compensation capacitor CC connected between OUT and its inverting input terminal.Two fully differential nulling amplifiers A4 and A5 are used separately as handle
A1 and A2 Auto zeroing, a pair of switches S11 and S12 is connected between the difference output end of A1 and the differential input end of A4 and one is split
It closes S14 and S15 to connect between the difference output end of A2 and the differential input end of A5, two storages C3, C4 and A4 are defeated
Enter end connection and the connection of storage C5, C6 and A5 input terminal.
Ping-pong amplifier further includes an error amplifier A3.An input terminal of A3 is connect with predetermined common-mode reference voltage VCMR
It is switchably connect with the common-mode output of A1 and A2 with another input terminal of A3.Output end of a pair of switches S5 and S6 in A1
It is connected between the input terminal of A3, so that when the switch is closed, the common-mode voltage of A1 is applied on A3.Equally, a pair of
Switch S7 and S8 is connected between the output end of A1 and the input terminal of A3, so that when the switch is closed, the common mode electricity of A2
Pressure is applied on A3.The output end of A3 connect with a pair of switches S9 and S10, and the another both sides of the switch are total to A1 and A2 respectively
The connection of mould feedback control input terminal.A pair of of storage CM1 and CM2 also respectively with the common-mode feedback control signal of A1 and A2
Connection, CM1 connect ground connection with the other end of CM2.
During ping-pong operation, due to the common mode of two paths the fully-differential amplifier A1 and A2 by clock cycle switching
Output voltage has differences the output that will lead to ripple and burr, and according to Fig. 1, the switch is controlled by a control circuit
(not shown), in running, the input terminal of error amplifier A3 is connect periodically with the common-mode output of A1 and the output of A3
End is connect with the common-mode feedback control signal of A1.Such configuration just forms a closed circuit and the common mode of A1 is forced to export electricity
It presses equal with VCMR;The output voltage of error amplifier A3 is stored in the storage electricity connecting with the common mode of A1 control feedback input end
In container CM1.Equally, the input terminal of error amplifier A3 and output end are anti-with the common-mode output of A2 and common mode periodically respectively
Control signal connection is presented, to force the common mode output voltage of A2 equal with VCMR and the output voltage of error amplifier A3 is deposited
Storage is on the storage CM2 that the common-mode feedback control signal with A2 is connect.
When switch S11, S12 and S13 are closed when A1 carries out Auto zeroing using A4 and when switch S14, S15 and S16 are closed
Close A2 using A5 carry out Auto zeroing when, and when switch S1, S2 and S17 be closed differential input signal INP and INN by A1 after with
When being amplified by output amplifier A0 and when switch S3, S4 and S18 are closed differential input signal INP and INN by A2 after by defeated
When amplifier A0 amplifies out, since CM1 and CM2 is only connected between the common-mode feedback control signal of A1 and A2 and ground connection, CM1
Although equal with VCMR holding with common mode output voltage that voltage that CM2 is stored can constantly adjust A1 and A2, it is total
Cmfb circuit is open loop.
It can be seen that, according to Fig. 1, principle is that A1 and two paths of A2 share the first of common mode feedback circuit from above
Stage gain, so that the common mode output voltage of A1 and A2 is equal.But prior art has in the mode of storage common-mode voltage
Disadvantage, the stability such as common mode feedback circuit are problematic.When step signal inputs, since A1 and A2 work is in respective amplification week
The circuit that A1 and A2 are configured when the phase can not continuous control common mode output voltage, the step response of ping-pong amplifier is slower.
Summary of the invention
The present invention provides a kind of ping-pong amplifier for overcoming above-mentioned problem and method.It is constantly total with stable switching capacity
Cmfb circuit achieves that quick step continuously to adjust the common mode output voltage of fully-differential amplifier in table tennis framework
Response.
The novel ping-pong amplifier includes: a pair of of storage CM1 and CM2, and the both ends of one side connect jointly
The common-mode feedback control signal of one fully-differential amplifier A1 and the switchably output of one error amplifier A3 of connection jointly
End, the both ends of the other side switchably connect respectively with the difference output end of A1 and switchably respectively with ping-pong amplifier
Output end OUTP connected with OUTN;It further include another pair the storage CM3 and CM4 equally configured, the both ends of one side
The common-mode feedback control signal of another fully-differential amplifier A2 is connected jointly and switchably connects the output end of A3 jointly,
The both ends of its other side switchably connect respectively with the difference output end of A2 and switchably respectively with output end OUTP and
OUTN connection.An input terminal of error amplifier A3 connects predetermined common mode reference voltage VCM, another input terminal switchably with
The A1 of one ping-pong amplifier type configuration is connected with the common-mode output of the amplifier in A2.
In running, the input terminal of A3 is periodically connect with the common-mode output of A1 and the output end of A3 and A1 are total to
Mould feedback control input terminal is connected with the both ends of the side of CM1, CM2, and the both ends of the other side of CM1, CM2 are respectively with A1's
Difference output end connection.Such configuration just forms the common mode feedback circuit of a closed circuit, and the common mode of A1 is forced to export electricity
It presses equal with VCM;CM1 and CM2 compensation common mode feedback circuit stability simultaneously store A3 output voltage and A1 common mode it is defeated
The difference of voltage out.
Common-mode output and common-mode feedback control in running, in the input terminal and output end and A1 for being periodically turned off A3
When the connection of input terminal processed but A1 are not at the amplification period, keep the both ends of the other side of CM1 and CM2 respectively with A1's
Difference output end connection.Such configuration just forms a common mode feedback circuit from closed loop.
In running, periodically differential input signal INP and INN are amplified in A1 and amplified Differential Input is believed
Number supply output end OUTP and OUTN when, disconnect CM1 and CM2 the other side both ends and A1 difference output end connection,
It is switched to and is connect respectively with output end OUTP and OUTN simultaneously.Such configuration just forms a common mode feedback circuit from closed loop;
Meanwhile CM1 and CM2 be switched to connect with output end OUTP and OUTN avoid to the difference output end of A1 and output end OUTP and
It is had an impact when institute's configuration circuit operates between OUTN.
Similarly, in running, A3 periodically with the common-mode output of A2 and common-mode feedback control signal and
The both ends of the side of CM3, CM4 connect, and the both ends of the other side of CM3, CM4 are connect with the difference output end of A2 respectively.This
The configuration of sample just forms the common mode feedback circuit of a closed circuit, and forces the common mode output voltage of A2 equal with VCM;CM3 and
The stability of CM4 compensation common mode feedback circuit stores the difference of the output voltage of A3 and the common mode output voltage of A2 simultaneously.It is transporting
In work, when the connection but A2 for being periodically turned off A3 and A2 and CM3, CM4 are not at the amplification period, keep CM3 and
The both ends of the other side of CM4 are connect with the difference output end of A2 respectively.Such configuration just forms a common-mode feedback from closed loop
Circuit.In running, periodically differential input signal INP and INN are amplified in A2 and amplified differential input signal
When supplying output end OUTP and OUTN, the both ends of the other side of CM3 and CM4 and the connection of A2 difference output end, same are disconnected
When be switched to and connect respectively with output end OUTP and OUTN.Such configuration just forms a common mode feedback circuit from closed loop;Together
When, CM3, CM4 be switched to connect with output end OUTP and OUTN avoid to the difference output end and output end OUTP of A2 and
It is had an impact when institute's configuration circuit operates between OUTN.
Storage CM1 and CM2 and CM3 and CM4 in each duty cycle of A1 and A2, constantly with A1 and A2 structure
At common mode feedback circuit and compensate for the stability of loop;Its voltage stored constantly adjusts the common mode output of A1 and A2
Voltage, so that the common mode output voltage of A1 and A2 is equal with common mode reference voltage VCM holding.Constantly in adjustment table tennis framework
The common mode output voltage of fully-differential amplifier A1 and A2 can further improve the performance of the ping-pong amplifier, including further
Reduce its output ripple and burr;Especially when step signal input when, due to A1 and A2 in the respective amplification period with stabilization
Common mode feedback circuit continuously adjust its common mode output voltage, the ping-pong amplifier can be realized quick step and ring
It answers.
The present invention preferably uses in the ping-pong amplifier with Auto zeroing and copped wave configuration, further improves amplifier
Performance.Since copped wave table tennis Auto zeroing amplifier makees chopping operation, storage CM1 and CM2 and CM3 and CM4 are according to complete
The difference amplifier Auto zeroing period and amplification the period be switched to respectively connect with the difference output end of A1 and A2 and with output
End OUTP connect with OUTN, thus avoidable to being configured between the difference output end and output end OUTP and OUTN of A1 and A2
Influence when chopping switch circuit makees chopping operation to offset voltage, further improves the performance of ping-pong amplifier.
Hereinafter, will be described in more detail in conjunction with attached drawing to the present invention, further characteristics and advantages pair of the invention as a result,
It is obvious in those skilled in the art.
Detailed description of the invention
Fig. 1 show the schematic diagram of prior art table tennis Auto zeroing amplifier.
Fig. 2 show ping-pong amplifier and its switched-capacitor CMFB circuit diagram of the invention.
Fig. 3 show the timing diagram of the work of ping-pong amplifier and its switched-capacitor CMFB circuit of the invention.
Fig. 4 show the schematic diagram of the preferred embodiment of copped wave table tennis Auto zeroing amplifier of the invention.
Fig. 5 show the timing diagram of the work of copped wave table tennis Auto zeroing amplifier of the invention.
Specific embodiment
Fig. 2 show the schematic diagram of a ping-pong amplifier and its switched-capacitor CMFB circuit 21, shows the present invention
Principle.A pair of of fully-differential amplifier A1 and A2 respectively receives a differential input signal being made of signal INP and INN.A1's
Difference output end is connect with a pair of switches S1 and S2 and the output end of A2 is connect with switch S3 and S4;The output end of switch S2 and S4
The output end for being joined together to form the output OUTP and S1 and S3 of ping-pong amplifier is joined together to form output OUTN.
One control circuit (not shown) controls S1 ~ S4 so that OUTP and OUTN are alternately attached to the output end of A1 and the output end of A2
Between.
Ping-pong amplifier further includes an error amplifier A3.An input terminal of A3 and scheduled common mode reference voltage VCM connect
It connects and is switchably connect with the common-mode output of A1 and A2 with another input terminal of A3.Output end of a pair of switches S5 and S6 in A1
It is connected between the input terminal of A3, so that when the switch is closed, the common mode output voltage of A1 is applied on A3;Equally,
A pair of switches S7 and S8 is connected between the output end of A1 and the input terminal of A3, so that when the switch is closed, A2's is total to
Mould output voltage is applied on A3.The output end of error amplifier A3 is connect with a pair of switches S9 and S10, and another the two of the switch
Side is connect with the common-mode feedback of A1 and A2 control CMFB input terminal respectively.
Ping-pong amplifier further includes two couples of storage CM1 and CM2 and CM3 and CM4.The two of the first side of CM1 and CM2
The CMFB input terminal of the common connection A1 in end.A pair of switches S11 and S12 are respectively in the both ends of second side of CM1 and CM2 and the difference of A1
Divide between output end and connect, so that when the switch is closed, the common mode output voltage of A1 is applied to the second of CM1 and CM2
The both ends of side;Also, a pair of switches S15 and S16 are respectively at the both ends of second side of CM1 and CM2 and output end OUTP and OUTN
Between connect so that when the switch is closed, the common mode output voltage of A1 is applied to CM1 by the switch S1 and S2 being closed
With the both ends of second side of CM2.Equally, the both ends of the first side of another pair storage CM3 and CM4 connect A2's jointly
CMFB input terminal.A pair of switches S13 and S14 connect between the both ends of second side of CM3 and CM4 and the difference output end of A2 respectively
It connects, so that when the switch is closed, the common mode output voltage of A2 is applied to the both ends of second side of CM3 and CM4;Also,
A pair of switches S17 and S18 are connected between the both ends of second side of CM3 and CM4 and output end OUTP and OUTN respectively, so that
When the switch is closed, the common mode output voltage of A2 is applied to second side of CM3 and CM4 by the switch S3 and S4 that are closed
Both ends.
Fig. 3 show a timing diagram for showing working procedure.In running, using the timing cycle in four stages.Fully differential
Amplifier A1 calibrates itself common mode output voltage in the first stage (Φ 1): the difference output end of A1 is connected by S5 and S6 and A3
It connects and the output end of A3 passes through the connection of the both ends of the CMFB input terminal of S9 and A1 and the first side of CM1, CM2;Make switch S1,
S2, S15 and S16 are disconnected and switch S11 and S12 closure, so that the both ends of second side of CM1 and CM2 are defeated with the difference of A1 respectively
Outlet connection.When connecing above be configured so that, the output of error amplifier A3 is with desired common mode output voltage VCM and A1 reality
Difference between the common mode output voltage on border and change, A1 and S5/S6, A3 and S9 and form one with S11/S12 and CM1/CM2
The common mode feedback circuit of closed circuit, to force the common mode output voltage of A1 equal with VCM;Storage CM1 and CM2 storage
The difference of the common mode output voltage of the output voltage and A1 of A3 compensates the stability of common mode feedback circuit simultaneously.
At second stage (Φ 2), disconnect switch S5, S6 and S9, so that A1 can make other operations with configuration circuit.It keeps
Switch S1, S2, S15 and S16 are disconnected and switch S11 and S12 closure, so that A1, S11/S12 and CM1/CM2 form one from closed loop
Common mode feedback circuit.
In phase III (Φ 3) and fourth stage (Φ 4), keeps switch S5, S6 and S9 to disconnect and close switch S1 and S2
It closes, so that A1 amplifies differential input signal INP and INN and the signal amplified is supplied output end OUTP and OUTN.Make out
It closes S11 and S12 disconnection and switch S15 and S16 is closed, connect respectively with output end OUTP and OUTN so that CM1 and CM2 are switched to
It connects.When connecing above be configured so that, A1, S1/S2, S15/S16 and CM1/CM2 form a common mode feedback circuit from closed loop, together
When avoid and had an impact when configuration circuit makees other operations between difference output end and output end OUTP and OUTN to A1.
With A1 on the contrary, in Φ 1 and Φ 2, make switch S7, S8 and S10 disconnection and switch S3 and S4 closure, so that A2 is poor
The amplification of point input signal and the signal amplified is supplied output end OUTP and OUTN.Switch S13 and S14 is set to disconnect and switch
S17 and S18 is closed, so that A2, S3/S4, S17/S18 and CM3/CM4 form a common mode feedback circuit from closed loop, is avoided simultaneously
To having an impact when configuration circuit makees other operations between the difference output end and output end OUTP and OUTN of A2.In Φ 3,
A2 calibrates the common mode output voltage of itself: being closed switch S7, S8 and S10, the output of error amplifier A3 is total to what is required
Difference between the actual common mode output voltage of mould output voltage VCM and A2 and change;Disconnect switch S3, S4, S17 and S18
It is closed with switch S13 and S14, so that A2 forms a closed circuit with S7/S8, A3 and S10 and with S13/S14 and CM3/CM4
Common mode feedback circuit, to force the common mode output voltage of A2 equal with VCM;Storage CM3 and CM4 store A3 output electricity
Pressure and the difference of A2 common mode output voltage compensate the stability of common mode feedback circuit simultaneously.In Φ 4, make switch S7, S8 and S10
It disconnects, so that A2 can make other operations with configuration circuit.Switch S3, S4, S17 and S18 disconnection and switch S13 and S14 is kept to close
It closes, so that A2, S13/S14 and CM3/CM4 form a common mode feedback circuit from closed loop.
The process is cyclically repeated regularly to make storage CM1 and CM2 and CM3 and CM4 complete poor
Divide in each duty cycle of amplifier A1 and A2 and constantly constitutes stable common mode feedback circuit with A1 and A2.CM1 to CM4 institute
The voltage of storage constantly adjusts the common mode output voltage of A1 and A2, so that the common mode output voltage and common-mode reference of A1 and A2
Voltage VCM keeps equal.Fully-differential amplifier A1 and A2 in table tennis framework are constantly adjusted with stable common mode feedback circuit
Common mode output voltage can further improve the performance of the ping-pong amplifier, the output including further decreasing ping-pong amplifier
The ripple and burr for holding OUTP and OUTN to occur;Especially when step signal inputs, the ping-pong amplifier be can be realized fastly
The step response of speed.
Each switch shown in Fig. 2 is controlled with respective control signal.The control signal is by executing above-mentioned working procedure
Control circuit 22 generate.For being familiar with the technical staff of timing circuit, the design of the control circuit is well-known.
It is only to show the principle of the present invention shown in Fig. 2.One practical ping-pong amplifier further includes Auto zeroing and copped wave behaviour
Work energy.Fig. 4 show the preferred embodiment of copped wave table tennis Auto zeroing amplifier 31 comprising Auto zeroing and chopping switch
Circuit.Copped wave table tennis Auto zeroing amplifier generally includes an output amplifier A0, has a Single-end output OUT to provide table tennis
The output of amplifier.The differential input end of A0 connect with the output end of switch S1 and S2 and connects with the output end of switch S3 and S4
It connects.Compensation capacitor CM0 is connected between the output OUT and its inverting input terminal of output amplifier A0.
A pair of switches S19 and S20 is connected between the differential input end of one end INP and A1 of differential input signal, so that
In when the switch is closed, one end INP of differential input signal supplies the input terminal of A1.A1 uses fully differential nulling amplifier
A4 carries out Auto zeroing, and A4 differential input end is connected by the output end of a pair of switches S23 and S24 and A1, a pair of of storage
C5 and C6 is connect with the differential input end of A4 respectively, and the output end of A4 and the output end of A1 are connected using the configuration of negative-feedback.A1
Chopping switch circuit include: a pair of switches S27 and S28 that link with switch S1 and S2 respectively in differential input signal INP and
It is connected between INN and the differential input end of A1;A pair of switches S29 and S30 are respectively differential input signal INP's and INN and A1
Differential input end divides to connect in the connection for the pattern intersected, and with a pair of switches S31 and S32 of switch S29 and S30 linkage
Not in the differential input end of the difference output end of A1 and output amplifier A0 to connect in the connection for the pattern intersected.
Equally, a pair of switches S21 and S22 is connected between the differential input end of one end INP and A2 of differential input signal.
The output end of A2 is connect by S25 and S26 with the input terminal of a fully differential nulling amplifier A5 and storage C7 and C8
It is connect with the input terminal of A5 and the output end of the output end of A5 and A2 is connected using the configuration of negative-feedback.It links with switch S3 and S4
A pair of switches S33 and S34 connected between differential input signal INP and INN and the differential input end of A2 respectively, a pair of switches
S35 and S36 respectively in the differential input end of differential input signal INP and INN and A1 to connect in the connection for the pattern intersected, with
And a pair of switches S37 and S38 to link with switch S35 and S36 is respectively in the difference of the difference output end of A2 and output amplifier A0
Divide input terminal to connect in the connection for the pattern intersected.
Fig. 5 show a timing diagram for showing working procedure.Using the timing cycle in four stages.In the 1st stage (Φ 1),
A1 calibrates the common mode output voltage VCM1 of itself: switch S5, S6 and S9 are closed, so that the common mode output voltage VCM1 and mistake of A1
The input terminal of poor amplifier A3 connects and CMFB input terminal and storage CM1, the CM2 connection of the output end of A3 and A1.It opens
S19, S20, S11 and S12 is closed to be closed.The common mode feedback circuit of a closed circuit is formed, thus to force VCM1 and VCM phase
Deng;Storage CM1 and CM2 compensate the stability of common mode feedback circuit, while storing the output voltage of A3 and the common mode of A1
The difference of output voltage is to continue to keep VCM1 equal with VCM in common mode feedback circuit.
A1 carries out Auto zeroing at second stage (Φ 2): keeping switch S19 and S20 closure, disconnects switch S5, S6 and S9
It is closed with switch S23 and S24, so that the input terminal of the output end of A1 and A4 connect;The error voltage of generation is stored in C5 and C6
In, A4 receives stored voltage and converts it into a pair of electric current for being used as the output Auto zeroing A1.Keep switch S11 with
S12 closure, thus forms a common mode feedback circuit from closed loop.
When A1 calibrate the common mode output voltage of itself in Φ 1 and Φ 2 respectively and when by Auto zeroing, A2, which is in, amplifies the period simultaneously
Make chopping operation.During Φ 1, switch S33, S34, S3 and S4 are closed, to cause differential input signal INP and INN by A2
After to be amplified by output amplifier A0.During Φ 2, make switch S33, S34, S3 and S4 disconnection and S35, S36, S37 and S38 quilt
Closure, to cause differential input signal INP and INN to continue by A1 after to be amplified by output amplifier A0.In Φ 1 and Φ 2, make
Switch S13 and S14 is disconnected and switch S17 and S18 is closed, so that CM3 and CM4 are switched to the difference with output amplifier A0 respectively
Input terminal connection, thus forms a common mode feedback circuit from closed loop, while avoiding A2 when making chopping operation to offset voltage
It has an impact.
In Φ 3 and Φ 4, role is opposite.In Φ 3, switch S7, S8 and S10 are closed, so that the common mode of A2
Output voltage VCM2 is connect with the input terminal of error amplifier A3 and the CMFB input terminal and storage capacitance of the output end of A3 and A2
Device CM3, CM4 connection.Switch S21, S22, S13 and S14 are closed.The common mode feedback circuit of a closed circuit is thus formed,
To force VCM2 equal with VCM;Storage CM3 and CM4 compensate the stability of common mode feedback circuit, while storing the defeated of A3
Voltage continues to keep VCM2 equal with VCM in common mode feedback circuit with the difference of the common mode output voltage of A2 out.In Φ 4
In, keep switch S21 and S22 closure, make switch S7, S8 and S10 disconnection and switch S25 and S26 be closed so that A2 Auto zeroing with
And it is stored in the error voltage generated in C7 and C8, the electric current of such Auto zeroing is just constantly applied to the output end of A2.It protects
Switch S13 and S14 closure are held, a common mode feedback circuit from closed loop is thus formed.
When A2 calibrates the common mode output voltage of itself in Φ 3 and Φ 4 respectively and when by Auto zeroing, A1 is in the amplification period simultaneously
Make chopping operation.During Φ 3, switch S27, S28, S1 and S2 are closed, to cause differential input signal INP and INN by A1
After to be amplified by A0.During Φ 4, it is closed switch S27, S28, S1 and S2 disconnection and S29, S30, S31 and S32, so that
Continue differential input signal INP and INN by A1 after to be amplified by A0.In Φ 3 and Φ 4, make switch S11 and S12 disconnection and
Switch S15 and S16 is closed, and is connect respectively with the differential input end of A0 so that CM1 and CM2 are switched to, and it is self-closing thus to form one
The common mode feedback circuit of ring, while A1 being avoided to have an impact when making chopping operation to offset voltage.
Storage CM1 and CM2 and CM3 and CM4 in this way in each duty cycle of A1 and A2 constantly
Stable common mode feedback circuit is constituted with A1 and A2 to adjust the common mode output electricity of fully-differential amplifier A1 and A2 in table tennis framework
Pressure further improves the performance of copped wave table tennis Auto zeroing amplifier, including further decreases its output ripple and burr;Especially
When step signal input, A1 and A2 continuously adjust its common mode in the respective amplification period with stable common mode feedback circuit
Output voltage, the copped wave table tennis Auto zeroing amplifier can be realized quick step response.
Each switch shown in Fig. 4 is by corresponding control signal control.The control signal is followed by executing above-mentioned timing
The control circuit 32 of ring generates.The design of such control circuit is well-known for the technical staff for being familiar with timing circuit
's.
Although having revealed that and describing specific embodiment of the present invention, for those skilled in the art,
A variety of remodeling and replacement can be made.Therefore, the present invention is only limited by the range of appended claims.
Claims (5)
1. a kind of method for constantly realizing stable switched-capacitor CMFB circuit in ping-pong amplifier, the table tennis
Amplifier includes: first pair of storage (CM1 and CM2), and the both ends of one side connect the first fully-differential amplifier jointly
(A1) common-mode feedback control signal and the switchably output end of connection error amplifier (A3) jointly, the other side
Both ends switchably connect respectively with the difference output end of first fully-differential amplifier (A1) and switchably respectively with
The difference output end (OUTP and OUTN) of the ping-pong amplifier connects and second pair of storage (CM3 and CM4),
The both ends of side connect the common-mode feedback control signal of the second fully-differential amplifier (A2) jointly and switchably connect jointly
Connect the output end of the error amplifier (A3), the both ends of the other side switchably respectively with second fully-differential amplifier
(A2) difference output end connection and switchably respectively with the difference output end of the ping-pong amplifier (OUTP and OUTN)
Connection, and
Error amplifier (A3) amplification exports the differential variation between its two input terminal, and it is pre- that one input end connection receives one
Fixed common mode reference voltage VCM, another input terminal switchably with described first configured with a ping-pong amplifier type and
Two fully-differential amplifiers (A1 is connected with the common-mode output of the amplifier in A2), and
Each first and second fully-differential amplifier (A1 and A2) respectively has differential input end, difference output end and has altogether
Mould feedback control input terminal, and being configured makes respective common mode output voltage be applied to respective common-mode feedback control with one
The voltage of input terminal and change;
This method comprises:
Periodically by the error amplifier (A3) the common mode output voltage of first fully-differential amplifier (A1) with
When difference amplification output between common mode reference voltage VCM is the first calibration voltage, first calibration voltage is applied
Institute is applied in the common-mode feedback control signal of first fully-differential amplifier (A1), while first calibration voltage
The both ends of the side of first pair of storage (CM1 and CM2) are stated, and first pair of storage (CM1 and CM2)
The both ends of the other side are connect with the difference output end of first fully-differential amplifier (A1) respectively, so that described first is complete poor
Divide amplifier (A1) and the error amplifier (A3) and first pair of storage (CM1 and CM2) to interconnect to constitute
The stability of common mode feedback circuit and first pair of storage (CM1 and CM2) compensation loop and storage described first
Difference between calibration voltage and the common mode output voltage of first fully-differential amplifier (A1), and
Periodically the input terminal of the error amplifier (A3) and the first fully-differential amplifier (A1) common mode are being exported
The connection at end disconnect and the output end the error amplifier (A3) and first fully-differential amplifier (A1) and with institute
The connection for stating first pair of storage (CM1 and CM2) disconnects but first fully-differential amplifier (A1) is not at amplification week
When phase, the both ends of the other side of first pair of storage (CM1 and CM2) are kept complete poor with described first respectively
Divide the difference output end connection of amplifier (A1), so that first fully-differential amplifier (A1) and first pair of storage electricity
Container (CM1 and CM2) constitutes the common mode feedback circuit from closed loop, and
In the differential input signal (INP for periodically amplifying the ping-pong amplifier by first fully-differential amplifier (A1)
And INN) and amplified differential input signal supply the difference output end (OUTP and OUTN) of the ping-pong amplifier when
It waits, the connection of first pair of storage (CM1 and CM2) and the first fully-differential amplifier (A1) difference output end
It disconnects and is switched to and is connect respectively with the difference output end of the ping-pong amplifier (OUTP and OUTN), so that described the
One fully-differential amplifier (A1) and first pair of storage (CM1 and CM2) constitute the common mode feedback circuit from closed loop;And
And
Periodically by the error amplifier (A3) the common mode output voltage of second fully-differential amplifier (A2) with
When difference amplification output between common mode reference voltage VCM is the second calibration voltage, second calibration voltage is applied
Institute is applied in the common-mode feedback control signal of second fully-differential amplifier (A2), while second calibration voltage
The both ends of the side of second pair of storage (CM3 and CM4) are stated, and second pair of storage (CM3 and CM4)
The both ends of the other side are connect with the difference output end of second fully-differential amplifier (A2) respectively, so that described second is complete poor
Divide amplifier (A2) and the error amplifier (A3) and second pair of storage (CM3 and CM4) to interconnect to constitute
The stability of common mode feedback circuit and second pair of storage (CM3 and CM4) compensation loop and storage described second
Difference between calibration voltage and the common mode output voltage of second fully-differential amplifier (A2), and
Periodically the input terminal of the error amplifier (A3) and the second fully-differential amplifier (A2) common mode are being exported
The connection at end disconnect and the output end the error amplifier (A3) and second fully-differential amplifier (A2) and with institute
The connection for stating second pair of storage (CM3 and CM4) disconnects but second fully-differential amplifier (A2) is not at amplification week
When phase, the both ends of the other side of second pair of storage (CM3 and CM4) are kept complete poor with described second respectively
Divide the difference output end connection of amplifier (A2), so that second fully-differential amplifier (A2) and second pair of storage electricity
Container (CM3 and CM4) constitutes the common mode feedback circuit from closed loop, and
Periodically amplifying the differential input signal (INP and INN) by second fully-differential amplifier (A2), simultaneously handle is put
When differential input signal after big supplies difference output end (OUTP and the OUTN) of the ping-pong amplifier, described second
The connection of storage (CM3 and CM4) and the second fully-differential amplifier (A2) difference output end is disconnected and switched
To being connect respectively with the difference output end of the ping-pong amplifier (OUTP and OUTN), so that second fully-differential amplifier
(A2) common mode feedback circuit from closed loop is constituted with second pair of storage (CM3 and CM4).
2. according to the method described in claim 1, it is characterized in that the method also includes first and second fully differentials to put
Big device (A1 and A2) periodically amplifies the differential input signal (INP and INN) and amplified differential input signal is supplied
To the ping-pong amplifier difference output end (OUTP and OUTN) when, to first and second fully-differential amplifier (A1 and
A2) make chopping operation.
3. according to the method described in claim 2, it is characterized in that the method also includes:
First and second switches (S27 and S28), it is complete poor with described first in the differential input signal (INP and INN) respectively
Divide between the differential input end of amplifier (A1) and connect, the third and fourth switch (S29 and S30) is defeated in the difference respectively
Enter signal (INP and INN) with the differential input end of first fully-differential amplifier (A1) to connect in the connection for the pattern intersected
It connects, and
5th and the 6th switch (S1 and S2), respectively the difference output end of first fully-differential amplifier (A1) with it is described
It is connected between the difference output end (OUTP and OUTN) of ping-pong amplifier, the 7th and the 8th switch (S31 and S32) exists respectively
The difference output end of first fully-differential amplifier (A1) and the difference output end (OUTP and OUTN) of the ping-pong amplifier
To be connected in the connection of the pattern of intersection,
Periodically amplify the differential input signal (INP and INN) in first fully-differential amplifier (A1) and amplification
When differential input signal afterwards supplies difference output end (OUTP and the OUTN) of the ping-pong amplifier, periodically described
One, the second, the 5th and the 6th switch (S27, S28, S1 and S2) be also turned on or disconnect, and periodically the third,
Four, the 7th with the 8th switch (S29, S30, S31 are simultaneously switched off or are connected with S32), with formed
To chopping operation made by first fully-differential amplifier (A1);And
9th and the tenth switch (S33 and S34), it is complete poor with described second in the differential input signal (INP and INN) respectively
Divide between the differential input end of amplifier (A2) and connects, the 11st and the 12nd switch (S35 and S36), respectively in the difference
The differential input end of point input signal (INP and INN) and second fully-differential amplifier (A2) is with the connection for the pattern intersected
Middle connection, and
13rd and the 14th switch (S3 and S4), respectively the difference output end of second fully-differential amplifier (A2) with
Connected between the difference output end (OUTP and OUTN) of the ping-pong amplifier, the 15th and sixteenmo close (S37 and S38),
It is respectively in the difference output end (OUTP of the difference output end of second fully-differential amplifier (A2) and the ping-pong amplifier
And OUTN) to be connected in the connection of the pattern of intersection,
Periodically amplify the differential input signal (INP and INN) in second fully-differential amplifier (A2) and amplification
When differential input signal afterwards supplies difference output end (OUTP and the OUTN) of the ping-pong amplifier, periodically described
Nine, the ten, the 13rd and the 14th switch (S33, S34, S3 and S4) be also turned on or disconnect, and periodically described the
11, the 12nd, the 15th with sixteenmo close (S35, S36, S37 are simultaneously switched off or are connected with S38), with formed
To chopping operation made by second fully-differential amplifier (A2).
The Auto zeroing amplifier 4. a kind of copped wave is rattled comprising
First and second fully-differential amplifiers (A1, A2) and its Auto zeroing circuit
With the chopping switch circuit of the fully-differential amplifier (A1, A2)
Configuration forms a ping-pong amplifier, the differential input end of Single-end output amplifier (A0) and first and second fully differential
The output end of amplifier (A1 and A2) alternately connects, to export scale-up version
Alternately it is applied to first and second fully-differential amplifier (A1 and A2) differential input end
Differential input signal (INP, INN),
Its feature further includes the switched-capacitor CMFB circuit and error amplifier of the fully-differential amplifier (A1, A2)
(A3), in which:
First fully-differential amplifier (A1) and its Auto zeroing circuit include: with differential input end, difference output end and one
The first fully-differential amplifier (A1) of common-mode feedback control signal, differential input end pass through the tenth pair of switch (S19 and S20)
It switchably connect respectively with one end of the differential input signal (INP) and the first fully differential nulling amplifier (A4),
Differential input end by the 12nd pair of switch (S23 and S24) switchably respectively with first fully-differential amplifier (A1)
Difference output end connection, and the difference output end of the first fully differential nulling amplifier (A4) is with the pattern of negative-feedback and institute
State the first fully-differential amplifier (A1) difference output end connection, and with the first fully differential nulling amplifier (A4) difference
The third that input terminal is separately connected to storage (C5 and C6),
Second fully-differential amplifier (A2) and its Auto zeroing circuit include: with differential input end, difference output end and one
The second fully-differential amplifier (A2) of common-mode feedback control signal, differential input end by the tenth a pair of switches (S21 and
S22 it) switchably connect respectively with one end of the differential input signal (INP) and the second fully differential nulling amplifier
(A5), differential input end by the tenth three pairs of switching (S25 and S26) switchably respectively with second fully-differential amplifier
(A2) difference output end connection, and the difference output end of the second fully differential nulling amplifier (A5) is with the type of negative-feedback
Formula is connect with the difference output end of second fully-differential amplifier (A2), and with the second fully differential nulling amplifier
(A5) the 4th pair of storage (C7 and C8) that differential input end is separately connected,
The chopping switch circuit of first fully-differential amplifier (A1) includes: the 14th pair of switch (S27 and S28), difference
It is connected between the differential input signal (INP and INN) and the differential input end of first fully-differential amplifier (A1), the
15 pairs of switches (S29 and S30), respectively in the differential input signal (INP and INN) and first fully-differential amplifier
(A1) differential input end in the connection for the pattern intersected to connect and a pair of switches (S1 and S2), respectively described
It is connected between the difference output end of first fully-differential amplifier (A1) and the differential input end of the output amplifier (A0), the tenth
Six pairs of switches (S31 and S32) are amplified in the difference output end of first fully-differential amplifier (A1) and the output respectively
The differential input end of device (A0) to be connected in the connection for the pattern intersected,
The chopping switch circuit of second fully-differential amplifier (A2) includes: the 17th pair of switch (S33 and S34), difference
It is connected between the differential input signal (INP and INN) and the differential input end of second fully-differential amplifier (A2), the
18 pairs of switches (S35 and S36), respectively in the differential input signal (INP and INN) and second fully-differential amplifier
(A2) differential input end in the connection for the pattern intersected to connect and second pair of switch (S3 and S4), respectively described
It is connected between the difference output end of second fully-differential amplifier (A2) and the differential input end of the output amplifier (A0), the tenth
Nine pairs of switches (S37 and S38) are amplified in the difference output end of second fully-differential amplifier (A2) and the output respectively
The differential input end of device (A0) to be connected in the connection for the pattern intersected,
The switched-capacitor CMFB circuit of first fully-differential amplifier (A1) include: first pair of storage (CM1 and
CM2), the both ends of one side connect the common-mode feedback control signal of first fully-differential amplifier (A1) jointly and lead to
The first switch (S9) for crossing the 5th split Central Shanxi Plain switchably connects the output end of the error amplifier (A3) jointly, another
The both ends of side pass through the 6th pair of switch (S11 and S12) the switchably difference with first fully-differential amplifier (A1) respectively
Output end connects and by the 8th pair of switch (S15 and S16) the switchably difference with the output amplifier (A0) respectively
Input terminal connection,
The switched-capacitor CMFB circuit of second fully-differential amplifier (A2) include: second pair of storage (CM3 and
CM4), the both ends of one side connect the common-mode feedback control signal of second fully-differential amplifier (A2) jointly and lead to
The second switch (S10) for crossing the 5th split Central Shanxi Plain switchably connects the output end of the error amplifier (A3) jointly, another
The both ends of side pass through the 7th pair of switch (S13 and S14) the switchably difference with second fully-differential amplifier (A2) respectively
Point output end connects and by the 9th pair of switch (S17 and S18) the switchably difference with the output amplifier (A0) respectively
Divide input terminal connection, and
Error amplifier (A3) amplification exports the differential variation between its two input terminal, and one input end connection one is scheduled
Common mode reference voltage VCM, another input terminal by three pairs of switching (S5 and S6) switchably respectively with first fully differential
The difference output end of amplifier (A1) connect and by the 4th pair of switch (S7 and S8) switchably respectively with described second entirely
The difference output end of difference amplifier (A2) connects;
Above-mentioned first pair to the 19th pair switch is formed by switching network, and (S1 to S38), each switch is by corresponding control
Signal control processed, the control signal are generated by the control circuit (32) of execution timing cycle,
The control circuit and switch network are configured so that input one end to cause the error amplifier (A3) periodically
It is connect with the common-mode output of first fully-differential amplifier (A1) and its output end and first fully-differential amplifier
Common-mode feedback control signal (A1) and first pair of storage (CM1 is connected with the both ends of the side of CM2), and
The both ends of the other side of first pair of storage (CM1 and CM2) respectively with first fully-differential amplifier (A1)
Difference output end connection, so that first fully-differential amplifier (A1) and the error amplifier (A3) and first pair described
Storage (CM1 and CM2) periodically constitutes closed circuit, so that the common mode of first fully-differential amplifier (A1)
Output voltage is equal to common mode reference voltage VCM, and first pair of storage (CM1 and CM2) compensation common-mode feedback electricity
The stability on road stores the output voltage of the error amplifier (A3) and the common mode of first fully-differential amplifier (A1) simultaneously
The difference of output voltage, and
The control circuit and switch network be further arranged so that first fully-differential amplifier (A1) periodically
When carrying out Auto zeroing using the first fully differential nulling amplifier (A4), input terminal and institute the error amplifier (A3)
The connection for stating the first fully-differential amplifier (A1) common-mode output disconnect and the output end of the error amplifier (A3) and
The connection of first fully-differential amplifier (A1) and first pair of storage (CM1 and CM2) disconnects, and described the
The both ends of the other side of a pair of of storage (CM1 and CM2) keep the difference with first fully-differential amplifier (A1) respectively
The connection of point output end so that first fully-differential amplifier (A1) and first pair of storage (CM1 and CM2) after
It is continuous to constitute closed circuit, and make the common mode output voltage holding and common mode reference voltage of first fully-differential amplifier (A1)
VCM is equal, and
The control circuit and switch network are further arranged so that first fully-differential amplifier (A1) is periodically put
Amplified differential input signal is simultaneously supplied the output amplifier (A0) by the big differential input signal (INP and INN)
When differential input end, the chopping switch circuit of first fully-differential amplifier (A1) makees chopping operation, and described first
The connection of storage (CM1 and CM2) and the first fully-differential amplifier (A1) difference output end is disconnected, is switched simultaneously
To being connect respectively with the differential input end of the output amplifier (A0), so that first fully-differential amplifier (A1) and institute
It states first pair of storage (CM1 and CM2) to continue to constitute closed circuit, and makes first fully-differential amplifier (A1)
Common mode output voltage persistently keeps equal with common mode reference voltage VCM, while avoiding influence of the chopping operation to offset voltage;And
And
The control circuit and switch network are further arranged so that input one end of the error amplifier (A3) is periodical
Ground is connect with the common-mode output of second fully-differential amplifier (A2) and its output end amplifies with second fully differential
The common-mode feedback control signal of device (A2) and second pair of storage (CM3 is connected with the both ends of the side of CM4), and
And the both ends of the other side of second pair of storage (CM3 and CM4) respectively with second fully-differential amplifier (A2)
Difference output end connection so that second fully-differential amplifier (A2) and the error amplifier (A3) and described second
Closed circuit is periodically constituted to storage (CM3 and CM4), so that the second fully-differential amplifier (A2's) is total to
Mould output voltage is equal to common mode reference voltage VCM, and second pair of storage (CM3 and CM4) compensates common-mode feedback
The stability of circuit stores the output voltage of the error amplifier (A3) and being total to for the second fully-differential amplifier (A2) simultaneously
The difference of mould output voltage, and
The control circuit and switch network be further arranged so that second fully-differential amplifier (A2) periodically
When carrying out Auto zeroing using the second fully differential nulling amplifier (A5), input terminal and institute the error amplifier (A3)
The connection for stating the second fully-differential amplifier (A2) common-mode output disconnect and the output end of the error amplifier (A3) and
The connection of second fully-differential amplifier (A2) and second pair of storage (CM3 and CM4) disconnects, and described the
The both ends of the other side of two pairs of storages (CM3 and CM4) keep the difference with second fully-differential amplifier (A2) respectively
The connection of point output end so that second fully-differential amplifier (A2) and second pair of storage (CM3 and CM4) after
It is continuous to constitute closed circuit, and make the common mode output voltage holding and common mode reference voltage of second fully-differential amplifier (A2)
VCM is equal, and
The control circuit and switch network are further arranged so that second fully-differential amplifier (A2) is periodically put
Amplified differential input signal is simultaneously supplied the output amplifier (A0) by the big differential input signal (INP and INN)
When differential input end, the chopping switch circuit of second fully-differential amplifier (A2) makees chopping operation, and described second
The connection of storage (CM3 and CM4) and the second fully-differential amplifier (A2) difference output end is disconnected, is switched simultaneously
To being connect respectively with the differential input end of the output amplifier (A0), so that second fully-differential amplifier (A2) and institute
It states second pair of storage (CM3 and CM4) to continue to constitute closed circuit, and makes second fully-differential amplifier (A2)
Common mode output voltage persistently keeps equal with common mode reference voltage VCM, while avoiding influence of the chopping operation to offset voltage.
The Auto zeroing amplifier 5. copped wave according to claim 4 is rattled, it is characterised in that:
Described 6th pair, the 9th pair and the tenth pair switch of the switching network (S1~S38) is configured to first switch group, described
Second pair, third second switch group, described 12nd pair, the tenth are configured to, the first switch of the 17th pair and the 5th centering
Eight pairs and the 19th pair switches are configured to third switching group, and described 7th pair, the 8th pair and the tenth a pair of switches are configured to the 4th
Switching group, the second switch of described first pair, the 4th pair, the 14th pair and the 5th centering are configured to the 5th switching group, and described
13 pairs, the 15th pair and the 16th pair switches are configured to the 6th switching group;
The control circuit (C32) is configured to control the switching network with the timing cycle in four stages, so that:
The first stage of the circulation, first and second switching group is closed, other switching groups then disconnect, the mistake described in this way
Poor amplifier (A3) is connected to first fully-differential amplifier (A1) and first pair of storage (CM1 and CM2) structure
At closed circuit force first fully-differential amplifier (A1) common mode output voltage be equal to common mode reference voltage VCM, with
And second fully-differential amplifier (A2) amplifies the differential input signal (INP and INN) and amplified Differential Input
Signal supplies the output end of the copped wave table tennis Auto zeroing amplifier and makees copped wave to second fully-differential amplifier (A2)
Operation, simultaneously second fully-differential amplifier (A2) are continued composition to storage (CM3 and CM4) with described second and are closed
Closing circuit forces the common mode output voltage of second fully-differential amplifier (A2) persistently to keep and common mode reference voltage VCM phase
Deng,
In the second stage of the circulation, the first switch group remains closed, third switching group is closed, other switching groups then
It disconnects, the first fully-differential amplifier (A1) described in this way and the first fully differential nulling amplifier (A4) constitute closed loop, lose
Adjust voltage storage to the third in storage (C5 and C6), the first fully differential nulling amplifier (A4) receives
The voltage of storage is simultaneously converted into a pair of electric current for being used as the output Auto zeroing first fully-differential amplifier (A1), with
And first fully-differential amplifier (A1) and first pair of storage (CM1 and CM2) continue the closed circuit constituted
The common mode output voltage of first fully-differential amplifier (A1) is forced to keep equal with common mode reference voltage VCM and described
Second fully-differential amplifier (A2) continues to amplify the differential input signal (INP and INN) and amplified Differential Input is believed
The output end of number supply copped wave table tennis Auto zeroing amplifier and copped wave behaviour is made to second fully-differential amplifier (A2)
Make, second fully-differential amplifier (A2) and second pair of storage (CM3 and CM4) continue the closure constituted simultaneously
Circuit forces the common mode output voltage of second fully-differential amplifier (A2) persistently to keep equal with common mode reference voltage VCM,
In the phase III of the circulation, the 4th and the 5th switching group is closed, other switching groups then disconnect, described in this way
Error amplifier (A3) is connected to second fully-differential amplifier (A2) and second pair of storage (CM3 and CM4)
The closed circuit of composition forces the common mode output voltage of second fully-differential amplifier (A2) to be equal to common mode reference voltage VCM,
And the first fully-differential amplifier (A1) amplification differential input signal (INP and INN) is simultaneously defeated amplified difference
Enter signal to supply the output end of the copped wave table tennis Auto zeroing amplifier and cut first fully-differential amplifier (A1)
Wave operation, first fully-differential amplifier (A1) and first pair of storage (CM1 and CM2) continue composition simultaneously
Closed circuit forces the common mode output voltage of first fully-differential amplifier (A1) persistently to keep and common mode reference voltage VCM phase
Deng,
In the fourth stage of the circulation, the 4th switching group remains closed, the 6th switching group is closed, other switching groups then
It disconnects, the second fully-differential amplifier (A2) described in this way and the second fully differential nulling amplifier (A5) constitute closed loop, lose
Adjust voltage storage into the 4th pair of storage (C7 and C8), the second fully differential nulling amplifier (A5) receives
The voltage of storage is simultaneously converted into a pair of electric current for being used as the output Auto zeroing second fully-differential amplifier (A2), with
And second fully-differential amplifier (A2) and second pair of storage (CM3 and CM4) continue the closed circuit constituted
The common mode output voltage of second fully-differential amplifier (A2) is forced to keep equal with common mode reference voltage VCM and described
First fully-differential amplifier (A1) continues to amplify the differential input signal (INP and INN) and amplified Differential Input is believed
The output end of number supply copped wave table tennis Auto zeroing amplifier and copped wave behaviour is made to first fully-differential amplifier (A1)
Make, first fully-differential amplifier (A1) and first pair of storage (CM1 and CM2) continue the closure constituted simultaneously
Circuit forces the common mode output voltage of first fully-differential amplifier (A1) persistently to keep equal with common mode reference voltage VCM.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610646433.3A CN106505957B (en) | 2016-08-09 | 2016-08-09 | Constantly the fast step with stable common mode feedback circuit responds ping-pong amplifier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610646433.3A CN106505957B (en) | 2016-08-09 | 2016-08-09 | Constantly the fast step with stable common mode feedback circuit responds ping-pong amplifier |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106505957A CN106505957A (en) | 2017-03-15 |
CN106505957B true CN106505957B (en) | 2018-12-25 |
Family
ID=58289985
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610646433.3A Active CN106505957B (en) | 2016-08-09 | 2016-08-09 | Constantly the fast step with stable common mode feedback circuit responds ping-pong amplifier |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106505957B (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110233610B (en) * | 2019-05-08 | 2022-08-05 | 思瑞浦微电子科技(苏州)股份有限公司 | Chopper sequential circuit |
JP7440255B2 (en) * | 2019-12-12 | 2024-02-28 | 日清紡マイクロデバイス株式会社 | Amplifier |
CN113872542B (en) * | 2021-09-28 | 2023-09-05 | 中国电子科技集团公司第二十四研究所 | Self-zeroing amplifying circuit and method for improving gain stability of amplifying circuit |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1575544A (en) * | 2001-09-04 | 2005-02-02 | 模拟设备股份有限公司 | Auto-zeroed ping-pong amplifier with low transient switching |
CN1582528A (en) * | 2001-09-04 | 2005-02-16 | 模拟设备股份有限公司 | Ping-pong amplifier with auto-zeroing and clipping |
US7358805B2 (en) * | 2006-05-23 | 2008-04-15 | Industrial Technology Research Institute | Fully differential sensing apparatus and input common-mode feedback circuit thereof |
CN103825565A (en) * | 2012-11-16 | 2014-05-28 | 上海华虹宏力半导体制造有限公司 | Operational amplifier |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7821333B2 (en) * | 2008-01-04 | 2010-10-26 | Texas Instruments Incorporated | High-voltage differential amplifier and method using low voltage amplifier and dynamic voltage selection |
US20140176239A1 (en) * | 2012-12-24 | 2014-06-26 | Lsi Corporation | Adaptive control mechanisms to control input and output common-mode voltages of differential amplifier circuits |
-
2016
- 2016-08-09 CN CN201610646433.3A patent/CN106505957B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1575544A (en) * | 2001-09-04 | 2005-02-02 | 模拟设备股份有限公司 | Auto-zeroed ping-pong amplifier with low transient switching |
CN1582528A (en) * | 2001-09-04 | 2005-02-16 | 模拟设备股份有限公司 | Ping-pong amplifier with auto-zeroing and clipping |
US7358805B2 (en) * | 2006-05-23 | 2008-04-15 | Industrial Technology Research Institute | Fully differential sensing apparatus and input common-mode feedback circuit thereof |
CN103825565A (en) * | 2012-11-16 | 2014-05-28 | 上海华虹宏力半导体制造有限公司 | Operational amplifier |
Also Published As
Publication number | Publication date |
---|---|
CN106505957A (en) | 2017-03-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106505957B (en) | Constantly the fast step with stable common mode feedback circuit responds ping-pong amplifier | |
EP1428314B1 (en) | Ping-pong amplifier with auto-zeroing and chopping | |
CN1575544B (en) | Auto-zeroed ping-pong amplifier with low transient switching | |
EP2301151B1 (en) | Cmos amplifier with integrated tunable band-pass function | |
CN101917169B (en) | High-bandwidth low-power consumption frequency-compensation three-stage operational amplifier | |
CN103856174B (en) | Circuit based on multimode operational amplifier | |
CN103107790B (en) | Programmable gain amplifier | |
CN102195652A (en) | A sample-and-hold amplifier | |
CN103051298A (en) | Programmable gain amplification circuit and programmable gain amplifier | |
CN105490649B (en) | Instrument amplifier | |
JP2005502253A5 (en) | ||
CN113726298A (en) | Fully-differential two-stage operational amplifier circuit | |
CN109921756B (en) | Fully-differential transconductance operational amplifier | |
CN107947748A (en) | Variable gain amplifier | |
JP5456896B2 (en) | Switching amplifier circuit configuration and switching amplification method | |
Fan et al. | Input characteristics of a chopped multi-path current feedback instrumentation amplifier | |
Huijsing et al. | Low-voltage low-power opamp based amplifiers | |
CN101764579A (en) | Gain-adjustable audio power amplifier circuit | |
CN202918248U (en) | Audio frequency amplifier | |
CN204168255U (en) | Current multiplexing type feedforward compensation Full differential operational amplifier | |
CN203660996U (en) | Fully differential operational amplifier with high speed and high gain | |
CN107786185A (en) | Phase interpolator | |
KR20050082434A (en) | Output device of vacuum tube power amplifier | |
CN107276544A (en) | Programmable amplifier circuit | |
CN101873102A (en) | Up-conversion frequency mixer with high linearity and suitable for low-voltage work |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |