CN106505127A - The method for solving stress between quantum trap infrared detector array and reading circuit - Google Patents
The method for solving stress between quantum trap infrared detector array and reading circuit Download PDFInfo
- Publication number
- CN106505127A CN106505127A CN201610949366.2A CN201610949366A CN106505127A CN 106505127 A CN106505127 A CN 106505127A CN 201610949366 A CN201610949366 A CN 201610949366A CN 106505127 A CN106505127 A CN 106505127A
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- Prior art keywords
- infrared detector
- substrate
- reading circuit
- thinning
- quantum well
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- 238000000034 method Methods 0.000 title claims abstract description 29
- 239000000463 material Substances 0.000 claims abstract description 37
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 238000002955 isolation Methods 0.000 claims abstract description 20
- 238000005530 etching Methods 0.000 claims abstract description 13
- 239000003292 glue Substances 0.000 claims abstract description 8
- 230000007797 corrosion Effects 0.000 claims abstract description 6
- 238000005260 corrosion Methods 0.000 claims abstract description 6
- 230000000694 effects Effects 0.000 claims abstract description 4
- 238000007711 solidification Methods 0.000 claims abstract description 4
- 230000008023 solidification Effects 0.000 claims abstract description 4
- 239000007788 liquid Substances 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 6
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 4
- 238000002360 preparation method Methods 0.000 claims description 3
- 239000002253 acid Substances 0.000 claims description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 2
- 235000011114 ammonium hydroxide Nutrition 0.000 claims description 2
- 239000007864 aqueous solution Substances 0.000 claims description 2
- 238000001312 dry etching Methods 0.000 claims description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 2
- 239000000843 powder Substances 0.000 claims description 2
- 238000012876 topography Methods 0.000 claims description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 2
- 238000001039 wet etching Methods 0.000 claims description 2
- 238000002156 mixing Methods 0.000 claims 1
- 238000005498 polishing Methods 0.000 claims 1
- 230000035882 stress Effects 0.000 abstract description 6
- 230000008646 thermal stress Effects 0.000 abstract description 5
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 5
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
- H01L31/1844—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
A kind of method for solving stress between quantum trap infrared detector array and reading circuit, comprises the steps：Multiple quantum well infrared detector material is made on a substrate；Etched according to preset space length downwards on multiple quantum well infrared detector material, form the isolation channel between multiple pixels, in etching depth to substrate；In posts are made on the multiple quantum well infrared detector material after etching isolation channel；One reading circuit is seated on In posts, makes multiple quantum well infrared detector material and reading circuit pass through In pole interconnections；In the circumfusion glue of In posts, the effect of glue is interconnection solidification；Substrate is thinning for the first time；Substrate is polished, second thinning；Continue corrosion substrate, thinning for the third time, until exposing the isolation channel on substrate, each pixel is completely isolated, completes to prepare.The present invention can make completely isolated between pixel, significantly more efficient release thermal stress.
Description
Technical field
The invention belongs to technical field of semiconductor device, particularly relates to a kind of solution quantum trap infrared detector array and reading
The method for going out stress between circuit.
Technical background
Quantum trap infrared detector is one of focus for studying in terms of detector in recent years.Its principle is using different band gap
Wide bandgap material alternating growth, formed quantum well structure, using SQW in sub-band transition, make Infrared Detectors.Logical
Overregulate the component of trap width, barrier height, i.e. III-V, it is possible to the position of subband in quantum well, and then adjust
The response wave length of section detector.Using the growth technique that III-V material is ripe, it is easy to accomplish large area array and multi-color detection.
Quantum trap infrared detector array must be interconnected with Si reading circuits when working, and is worked at low temperature.Due to amount
There is thermal mismatching with Si reading circuits in the GaAs materials used by sub- trap infrared detector, thermal stress can cause device at low temperature
Serious deterioration and failure, therefore reduce and solve material between thermal stress be improve device reliability important technology it
One.
Content of the invention
It is an object of the invention to, there is provided stress between a kind of solution quantum trap infrared detector array and reading circuit
Method, by isolation channel deep etching the repeatedly thinning method in the back side, can accurate thinning GaAs materials, make the material thickness be
10-15 microns, tend to flexibility, reduce thermal mismatching；Completely isolated between pixel, significantly more efficient release thermal stress is made simultaneously.
The present invention provides a kind of method for solving stress between quantum trap infrared detector array and reading circuit, including such as
Lower step：
Step 1：Multiple quantum well infrared detector material is made on a substrate；
Step 2：Etched according to preset space length downwards on multiple quantum well infrared detector material, formed between multiple pixels
Isolation channel, in etching depth to substrate；
Step 3：In posts are made on the multiple quantum well infrared detector material after etching isolation channel；
Step 4：One reading circuit is seated on In posts, passes through multiple quantum well infrared detector material and reading circuit
In pole interconnections；
Step 5：In the circumfusion glue of In posts, the effect of glue is interconnection solidification；
Step 6：Substrate is thinning for the first time；
Step 7：Substrate is polished, second thinning；
Step 8：Continue corrosion substrate, thinning for the third time, until expose isolation channel on substrate, each pixel completely every
From completing to prepare.
The invention has the beneficial effects as follows, by deep etching isolation channel and substrate thinning on quantum trap infrared detector array
Mode, make pixel completely isolated, effectively the thermal stress between release material for detector and reading circuit material, reduce device
Deterioration, improves the reliability of device.
Description of the drawings
In order to further illustrate the present invention technology contents, below in conjunction with drawings and Examples to the detailed description of the invention such as
Afterwards, wherein：
Fig. 1 is method of the present invention flow chart；
Fig. 2-Fig. 5 is the structural representation of preparation method of the present invention.
Specific embodiment
Fig. 1 is refer to, and combines reference picture 2- Fig. 5, the invention provides a kind of solve quantum trap infrared detector array
The method of stress, comprises the steps between reading circuit：
Step 1：Multiple quantum well infrared detector material 11 is made on a substrate 12, and the substrate 12 is GaAs substrates,
Described multiple quantum well infrared detector material 11 is made up of mqw material and corresponding conductive layer, wherein MQW material
Expect for the one kind in GaAs/AlGaAs MQWs, InGaAs/AlGaAs MQWs or have two kinds concurrently, wherein MQW
In material, the thickness and component of various materials can be actually needed the wave band of detection according to Infrared Detectors and adjust, wherein conductive layer
For the GaAs materials for adulterating, the method for the making multiple quantum well infrared detector material 11 is using MBE or MOCVD epitaxy
Method.
Step 2：Etched according to preset space length downwards on multiple quantum well infrared detector material 11, formed multiple pixels it
Between isolation channel 21, in etching depth to substrate 12, the etching depth of described isolation channel 21 is 10-15 microns, described quarter
Erosion isolation channel 21, the method for using dry etching；
Step 3：In posts 31, wherein In posts are made on the multiple quantum well infrared detector material 11 after etching isolation channel 21
31 preparation method is using evaporation or electric plating method；
Step 4：One reading circuit 33 is seated on In posts 31, multiple quantum well infrared detector material 11 is made and is read electricity
Road 33 is interconnected by In posts 31, and the material of described reading circuit 33 is Si：
Step 5：In the circumfusion glue 32 of In posts 31, the effect of glue 32 is interconnection solidification；
Step 6：Thinning for the first time for thinning for the first time for substrate 12, described substrate 12, it is the method using mechanical lapping,
The aqueous solution of the lapping liquid for using for alumina powder, the matched proportion density for adjusting aluminum oxide and water can adjust thinning speed, the
12 remaining thickness of organic semiconductor device is 75-85 microns；
Step 7：Substrate 12 is polished, second thinning, 12 second of described substrate is thinning, is thrown using chemical machinery
The method of light, can remove the damage of mechanical lapping, and second 12 remaining thickness of organic semiconductor device is 30-40 microns；
Step 8：Continue corrosion substrate 12, thinning for the third time, until exposing the isolation channel 21 on substrate 12, each pixel is complete
Full isolation, described 12 third time of substrate are thinning, the method for using wet etching, and which is using acid or ammoniacal liquor and hydrogen peroxide
Mixture as corrosive liquid, the proportioning for adjusting corrosive liquid can adjust speed and the surface topography of corrosion, for the third time thinning lining
12 remaining thickness of bottom is 10-15 microns, completes to prepare.
After multiple quantum well infrared detector material 11 is made on wherein described substrate 12, by isolation channel 21 by MQW
Infrared detector material 11 is divided into multiple detector pixels, and each pixel is being electrically completely self-contained, does not share
Electrode.
Particular embodiments described above, has been carried out to the purpose of the present invention, technical scheme and beneficial effect further in detail
Describe in detail bright, it should be understood that the foregoing is only the present invention specific embodiment, be not limited to the present invention, all
Within the spirit and principles in the present invention, any modification, equivalent substitution and improvements that is done etc. should be included in the protection of the present invention
Within the scope of.
Claims (8)
1. a kind of method for solving stress between quantum trap infrared detector array and reading circuit, comprises the steps：
Step 1：Multiple quantum well infrared detector material is made on a substrate；
Step 2：Etched according to preset space length downwards on multiple quantum well infrared detector material, formed between multiple pixels every
In groove, etching depth to substrate；
Step 3：In posts are made on the multiple quantum well infrared detector material after etching isolation channel；
Step 4：One reading circuit is seated on In posts, makes multiple quantum well infrared detector material and reading circuit pass through In posts
Interconnection；
Step 5：In the circumfusion glue of In posts, the effect of glue is interconnection solidification；
Step 6：Substrate is thinning for the first time；
Step 7：Substrate is polished, second thinning；
Step 8：Continue corrosion substrate, thinning for the third time, until exposing the isolation channel on substrate, each pixel is completely isolated, complete
Into preparation.
2. the method for solving stress between quantum trap infrared detector array and reading circuit according to claim 1, its
Described in isolation channel etching depth be 10-15 microns.
3. the method for solving stress between quantum trap infrared detector array and reading circuit according to claim 1, its
Described in substrate on make multiple quantum well infrared detector material after, by isolation channel by multiple quantum well infrared detector material point
Multiple detector pixels are cut into, each pixel is being electrically completely self-contained, does not have the electrode for sharing.
4. the method for solving stress between quantum trap infrared detector array and reading circuit according to claim 1, its
Described in reading circuit material be Si.
5. the method for solving stress between quantum trap infrared detector array and reading circuit according to claim 1, its
Described in etching isolation channel, the method for using dry etching.
6. the method for solving stress between quantum trap infrared detector array and reading circuit according to claim 1, its
Described in substrate for the first time thinning, be the method using mechanical lapping, the aqueous solution of the lapping liquid for using for alumina powder is adjusted
The matched proportion density of section aluminum oxide and water can adjust thinning speed, and the remaining thickness of first time organic semiconductor device is 75-85 microns.
7. the method for solving stress between quantum trap infrared detector array and reading circuit according to claim 1, its
Described in substrate second thinning, be the method using chemically mechanical polishing, the damage of mechanical lapping can be removed, second
The remaining thickness of organic semiconductor device is 30-40 microns.
8. the method for solving stress between quantum trap infrared detector array and reading circuit according to claim 1, its
Described in substrate third time thinning, the method that uses wet etching, its are the mixing using acid or ammoniacal liquor with hydrogen peroxide
Thing can adjust speed and the surface topography of corrosion as corrosive liquid, the proportioning for adjusting corrosive liquid, and third time organic semiconductor device is remaining
Thickness be 10-15 microns.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610949366.2A CN106505127A (en) | 2016-10-26 | 2016-10-26 | The method for solving stress between quantum trap infrared detector array and reading circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610949366.2A CN106505127A (en) | 2016-10-26 | 2016-10-26 | The method for solving stress between quantum trap infrared detector array and reading circuit |
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| Publication Number | Publication Date |
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| CN106505127A true CN106505127A (en) | 2017-03-15 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201610949366.2A Pending CN106505127A (en) | 2016-10-26 | 2016-10-26 | The method for solving stress between quantum trap infrared detector array and reading circuit |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101587873A (en) * | 2008-05-21 | 2009-11-25 | 福葆电子股份有限公司 | Reduce the dielectric layer structure and the manufacture method thereof of stress |
| CN102122309A (en) * | 2010-12-16 | 2011-07-13 | 河南科技大学 | Structural optimization method for large-array infrared detector containing bottom filling glue |
| CN201927607U (en) * | 2010-06-11 | 2011-08-10 | 中国科学院上海技术物理研究所 | Photovoltaic mercury-cadmium-tellurium infrared focal plane integrated with antireflection coating |
| CN103746046A (en) * | 2013-11-29 | 2014-04-23 | 上海蓝光科技有限公司 | Large-size patterned substrate chip fabrication method |
| CN104018214A (en) * | 2014-06-10 | 2014-09-03 | 广州市众拓光电科技有限公司 | Rectangular patterned Si substrate AlN template for GaN semiconductor material epitaxy and preparation method of rectangular patterned Si substrate AlN template |
| CN105551945A (en) * | 2015-12-16 | 2016-05-04 | 华进半导体封装先导技术研发中心有限公司 | Method for reducing interface stress in wafer bonding process |
-
2016
- 2016-10-26 CN CN201610949366.2A patent/CN106505127A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101587873A (en) * | 2008-05-21 | 2009-11-25 | 福葆电子股份有限公司 | Reduce the dielectric layer structure and the manufacture method thereof of stress |
| CN201927607U (en) * | 2010-06-11 | 2011-08-10 | 中国科学院上海技术物理研究所 | Photovoltaic mercury-cadmium-tellurium infrared focal plane integrated with antireflection coating |
| CN102122309A (en) * | 2010-12-16 | 2011-07-13 | 河南科技大学 | Structural optimization method for large-array infrared detector containing bottom filling glue |
| CN103746046A (en) * | 2013-11-29 | 2014-04-23 | 上海蓝光科技有限公司 | Large-size patterned substrate chip fabrication method |
| CN104018214A (en) * | 2014-06-10 | 2014-09-03 | 广州市众拓光电科技有限公司 | Rectangular patterned Si substrate AlN template for GaN semiconductor material epitaxy and preparation method of rectangular patterned Si substrate AlN template |
| CN105551945A (en) * | 2015-12-16 | 2016-05-04 | 华进半导体封装先导技术研发中心有限公司 | Method for reducing interface stress in wafer bonding process |
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Application publication date: 20170315 |