CN106470023A - Neurn simulation circuit - Google Patents
Neurn simulation circuit Download PDFInfo
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- CN106470023A CN106470023A CN201510508806.6A CN201510508806A CN106470023A CN 106470023 A CN106470023 A CN 106470023A CN 201510508806 A CN201510508806 A CN 201510508806A CN 106470023 A CN106470023 A CN 106470023A
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Abstract
The embodiment of the present invention provides a kind of neurn simulation circuit, including：The input V of the first circuit, its first end and protoneuron circuitinIt is connected, the outfan V of the second end and protoneuron circuitoutIt is connected；Electric capacity C1, its first end is connected with the 3rd end of the first circuit, and the second end is connected to the ground；Second circuit, its input is connected with the 3rd end of the first circuit, the outfan V of outfan and protoneuron circuitoutIt is connected, the voltage for the first end in electric capacity C1 is in the conduction state higher than during voltage threshold；Switch transistor T 1, its input is connected with the 3rd end of the first circuit, and outfan is connected to the ground, the outfan V of control end and protoneuron circuitoutIt is connected.The neurn simulation circuit of the embodiment of the present invention can simulate the threshold property of theca cell.
Description
Technical field
The present invention relates to circuit field, and more specifically, it is related to a kind of neurn simulation circuit.
Background technology
Memristor (Memristor) is the 4th kind of basic circuit elements in addition to resistance, electric capacity, inductance,
For representing the relation between magnetic flux and the quantity of electric charge.Memristor has the unit (Europe same with resistance
Nurse), it is provided simultaneously with non-volatile, and only in the case that electric current flows through, memristor value just can change.
With the deep development of the research to memristor, memristor be used for simulate biological nervous system memory and
Computing function.
As shown in figure 1, in prior art, neurn simulation circuit generally comprise two neuron circuits (or
Claim neuronal cell circuit) and the resistive memristor as Synaptic junction between the two, wherein each
Neuron circuit includes：Pumping signal end P, Synaptic junction end M, buffer (phase inverter N2 and anti-
Phase device N3), control signal phase inverter N1, the first transmission gate T1 and the second transmission gate T2.Wherein,
The outfan of buffer connects to pumping signal end P, and the input of buffer connects to the second transmission gate T2
Signal end；The input of control signal phase inverter N1 connects to pumping signal end P, the first transmission gate
The positive control end S of the positive control end S of T1 and the second transmission gate T2, outfan connects to the first transmission gate
The negative control end S ' of the negative control end S ' of T1 and the second transmission gate T2；The first described transmission gate T1's
One signal end connects to voltage source, and another signal end connects to Synaptic junction end M, and positive control end S is even
It is connected to pumping signal end P, negative control end S ' connects to the outfan of control signal phase inverter N1；Second
One signal end of transmission gate T2 connects to the input of buffer, and another signal end connects to synapse
Connection end M, positive control port S connect to pumping signal end P, and negative control end S ' connects to control signal
The outfan of phase inverter N1.
The operation principle of the neurn simulation circuit in Fig. 1 is as follows：When two neuron circuits are connected to respectively simultaneously
From pumping signal when, respectively to respective pumping signal produce stress signal, this stress can pass through signal
Metal contact wires apply it on the memristor that is attached thereto, when former and later two pumping signals encourage simultaneously
When, will form, on memristor, the voltage difference being allowed to occur resistive, during beginning, resistance is larger, with excitation
Persistent period and resistance is gradually reduced, that is, the weight of Synaptic junction from the beginning less becomes weight increase
Greatly, until one of pumping signal disappears.After pumping signal terminates, the resistance of memristor keeps constant.
And the resistance of memristor reduces the relatedness increasing between two neuron circuits, be equivalent to antropology
Practise cognitive process.
The cell membrane of neuronal cell has electric capacity, referred to as membrane capacitance, and membrane capacitance has threshold property, that is,
When neuronal cell receives the threshold value that pumping signal exceedes membrane capacitance, neuronal cell just can be by excitement
Other neuronal cells are transferred to by synapse, but the neuron in the neurn simulation circuit in Fig. 1 connects
After receiving pumping signal, memristor will be acted at once so as to produce pressure reduction it is impossible to fine topotype
The threshold property of paraneuron cell.
Content of the invention
The embodiment of the present invention provides a kind of neurn simulation circuit, can simulate the threshold property of membrane capacitance.
In a first aspect, providing a kind of neurn simulation circuit, described neurn simulation circuit includes protoneuron
Circuit, described protoneuron circuit is used for being connected by memristor ME circuit first with nervus opticus, and
Transmit signal, described first nerves between described protoneuron circuit and described nervus opticus unit circuit
First circuit includes：First circuit, the first end of described first circuit is defeated with described protoneuron circuit
Enter to hold VinIt is connected, the outfan V of the second end of described first circuit and described protoneuron circuitout
It is connected, described first circuit is in described outfan VoutFor in the conduction state during low level, described defeated
Go out to hold VoutIt is in cut-off state during for high level；Electric capacity C1, the first end of described electric capacity C1 with described
3rd end of the first circuit is connected, and second end of described electric capacity C1 is connected to the ground；Second circuit, described
The input of second circuit is connected with the 3rd end of described first circuit, the outfan of described second circuit with
The outfan V of described protoneuron circuitoutIt is connected, described second circuit is used in described electric capacity C1
The voltage of first end be in cut-off state, the of described electric capacity C1 when being less than default voltage threshold
The voltage of one end is higher than in the conduction state during voltage threshold, and after the conducting of described second circuit, described
Outfan VoutIt is upgraded to high level from low level；Switch transistor T 1, the input of described switch transistor T 1 and institute
The 3rd end stating the first circuit is connected, and the outfan of described switch transistor T 1 is connected to the ground, described switching tube
The control end of T1 and the outfan V of described protoneuron circuitoutIt is connected, and described switch transistor T 1 exists
Described outfan VoutFor turning on during high level, in described outfan VoutFor ending during low level.
In conjunction with a first aspect, in a kind of implementation of first aspect, described neurn simulation circuit also wraps
Include Sudden-touch circuit, the input V of described Sudden-touch circuit and described protoneuron circuitinIt is connected, described
Sudden-touch circuit includes：Switching tube M, the input of described switching tube M and power supply VccIt is connected, described open
The control end closing pipe M is used for receiving the output signal of described nervus opticus unit circuit；Described memristor ME,
The input of described memristor ME is connected with the outfan of described switching tube M, described memristor ME
Outfan and described protoneuron circuit input VinIt is connected；Switching tube Ms, described switching tube
The input of Ms is connected with the outfan of described switching tube M, the outfan of described switching tube Ms with ground
It is connected, the outfan V of the control end of described switching tube Ms and described protoneuron circuitoutIt is connected,
And described switching tube Ms is in the outfan V of described protoneuron circuitoutFor turning on during high level,
The outfan V of described protoneuron circuitoutFor ending during low level；Described protoneuron circuit is also
Including：Switch transistor T 2, the input of described switch transistor T 2 and power supply VpullIt is connected, described switching tube
The outfan of T2 and the input V of described protoneuron circuitinIt is connected, the control of described switch transistor T 2
End processed and the outfan V of described protoneuron circuitoutIt is connected, wherein, in described protoneuron electricity
The outfan V on roadoutDuring for high level, described switch transistor T 2 and described switching tube Ms turn on, described
Power supply VpullThe electric current of output is from the input V of described protoneuron circuitinFlow out, recall through described
Resistance device ME and described switching tube Ms flow direction ground is so that the resistance of described memristor ME increases.
Any one in conjunction with first aspect or its above-mentioned implementation, in another kind of realization side of first aspect
In formula, described neurn simulation circuit also includes described nervus opticus unit circuit, described nervus opticus unit circuit
With described protoneuron circuit there is identical structure, the outfan of described nervus opticus unit circuit with described
The control end of the switching tube M in Sudden-touch circuit is connected, and described nervus opticus unit circuit is as front neuron
Circuit, transmits institute by described Sudden-touch circuit to the described protoneuron circuit as rear neuron circuit
State the signal that the outfan of nervus opticus unit circuit produces.
Any one in conjunction with first aspect or its above-mentioned implementation, in another kind of realization side of first aspect
In formula, described neurn simulation circuit includes described protoneuron circuit and described nervus opticus unit circuit exists
Interior multiple neuron circuits, described neurn simulation circuit is multiple prominent also including described Sudden-touch circuit
Electric shock road, the plurality of neuron circuit in described neurn simulation circuit passes through the plurality of Sudden-touch circuit
Connect, form neutral net.
Any one in conjunction with first aspect or its above-mentioned implementation, in another kind of realization side of first aspect
In formula, described protoneuron circuit also includes：Control end Ictrl, described control end IctrlWith described first
The first end of circuit is connected, for described electric capacity C1 input current.
Any one in conjunction with first aspect or its above-mentioned implementation, in another kind of realization side of first aspect
In formula, described first circuit includes：Switch transistor T 3, the input of described switch transistor T 3 and described first
The input V of neuron circuitinIt is connected, the of the outfan of described switch transistor T 3 and described electric capacity C1
One end is connected；Phase inverter N1, the input of described phase inverter N1 is defeated with described protoneuron circuit
Go out to hold VoutIt is connected, the outfan of described phase inverter N1 is connected with the control end of described switch transistor T 3.
Any one in conjunction with first aspect or its above-mentioned implementation, in another kind of realization side of first aspect
In formula, described second circuit includes：Phase inverter N2, the input of described phase inverter N2 and described electric capacity
The first end of C1 is connected；Phase inverter N3, the input of described phase inverter N3 and described phase inverter N2
Outfan be connected, the outfan V of the outfan of described phase inverter N3 and described protoneuron circuitout
It is connected, described voltage threshold is the conduction threshold of described phase inverter N2 and the conducting of described phase inverter N3
Higher value in threshold value.
In the embodiment of the present invention, the input of protoneuron circuit charges for electric capacity C1, as electric capacity C1
When both end voltage exceedes voltage threshold, second circuit conducting is so that the outfan of protoneuron circuit
VoutIt is upgraded to high level from low level that is to say, that the electric current working as input makes electric capacity C1 both end voltage
After exceeding voltage threshold, the outfan of neuron circuit just can produce response, phase to the input of input
When in the role serving as membrane capacitance using electric capacity C1, simulate the threshold property of theca cell.
Brief description
In order to be illustrated more clearly that the technical scheme of the embodiment of the present invention, below will be in the embodiment of the present invention
The accompanying drawing of required use be briefly described it should be apparent that, drawings described below be only this
The accompanying drawing of some embodiments of invention.
Fig. 1 is the schematic circuit of neurn simulation circuit of the prior art.
Fig. 2 is the schematic circuit of the neurn simulation circuit of the embodiment of the present invention.
Fig. 3 is the graph of a relation of electric capacity C1 voltage and protoneuron circuit output voltage.
Fig. 4 is the frequency relation with the pulse signal of protoneuron circuit output for the electric current of control end Ictrl
Figure.
Fig. 5 is the schematic circuit of the neurn simulation circuit of the embodiment of the present invention.
Fig. 6 is the schematic circuit of the neurn simulation circuit of the embodiment of the present invention.
Fig. 7 is the schematic circuit of the neurn simulation circuit of the embodiment of the present invention.
Fig. 8 is the exemplary plot of the connected mode between the neuron circuit of the embodiment of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out
Clearly and completely describe it is clear that described embodiment is a part of embodiment of the present invention, and not
It is whole embodiments.
Fig. 2 is the schematic circuit of the neurn simulation circuit of the embodiment of the present invention.Neural mould in Fig. 2
Intend circuit 20 and include protoneuron circuit 21, protoneuron circuit 21 can pass through memristor ME
Circuit first with nervus opticus is connected, and passes between protoneuron circuit 21 and nervus opticus unit circuit
Delivery signal, protoneuron circuit 21 includes：
First circuit 22, the first end of the first circuit 22 and the input V of protoneuron circuit 21in
It is connected, the second end of the first circuit 22 and the outfan V of protoneuron circuit 21outIt is connected, first
Circuit 22 is in the outfan V of protoneuron circuit 21outFor in the conduction state during low level,
The outfan V of one neuron circuit 21outIt is in cut-off state during for high level；
Electric capacity C1, the first end of electric capacity C1 is connected with the 3rd end of the first circuit 22, and the of electric capacity C1
Two ends are connected to the ground；
Second circuit 23, the input of second circuit 23 is connected with the 3rd end of the first circuit 22, and second
The outfan of circuit 23 and the outfan V of protoneuron circuit 21outIt is connected, second circuit 23 is used
It is in cut-off state when the voltage of the first end in electric capacity C1 is less than default voltage threshold, in electric capacity
The voltage of the first end of C1 is higher than in the conduction state during voltage threshold, and after second circuit 23 conducting,
The outfan V of described protoneuron circuit 21outIt is upgraded to high level from low level；
Switch transistor T 1, the input of switch transistor T 1 is connected with the 3rd end of the first circuit 22, switching tube
The outfan of T1 is connected to the ground, the outfan of the control end of switch transistor T 1 and protoneuron circuit 21
VoutIt is connected, and switch transistor T 1 is in the outfan V of protoneuron circuit 21outFor turning on during high level,
Outfan V in protoneuron circuit 21outFor ending during low level.
In the embodiment of the present invention, the input of protoneuron circuit 21 introduces input current, is electric capacity
C1 charges, and when electric capacity C1 both end voltage exceedes voltage threshold, second circuit 23 turns on so that the
The outfan V of one neuron circuit 21outIt is upgraded to high level from low level that is to say, that working as input
After electric current makes electric capacity C1 both end voltage exceed voltage threshold, the outfan of neuron circuit just can be right
The input of input produces response, is equivalent to the role serving as membrane capacitance using electric capacity C1, simulates film
The threshold property of cell；Outfan V when protoneuron circuit 21outWhen being changed into high level, first
Circuit 22 ends, enter refractory stage (biologically refer to biology a certain stimulation is reacted after, one
In fixing time, even if giving again to stimulate, also do not react.Output has been made to become in referred to input
High level, the first circuit 22 exports the impact that protoneuron circuit 21 is no longer influenced by inputting after blocking).
Additionally, the outfan V when protoneuron circuit 21outWhen being changed into high level, switch transistor T 1 is led
Logical, electric capacity C1 discharges over the ground so that electric capacity C1 both end voltage reduces, when electric capacity C1 both end voltage is low
When the voltage threshold that second circuit 23 sets, second circuit 23 blocks, protoneuron circuit 21
Outfan VoutIt is changed into low level, repeat said process, the outfan V of protoneuron circuit 21out
The pulse signal that just can be interlocked with certain rate-adaptive pacemaker low and high level.Fig. 3 shows electric capacity C1 two
Terminal voltage (Vcap) and protoneuron circuit 21 outfan VoutThe relation of the voltage of output, from figure
The 3 outfan V that can be seen that protoneuron circuit 21outWith the discharge and recharge of electric capacity C1, with one
Determine the outside output pulse signal of frequency.
It should be understood that the embodiment of the present invention is not construed as limiting to the concrete structure of the first circuit 22, for example,
One circuit 22 can include switching tube Q, the input of this switching tube Q and protoneuron circuit 21
Input VinIt is connected, the outfan of this switching tube Q is connected with the first end of electric capacity C1, this switch
The control end of pipe Q and the input V of protoneuron circuit 21outIt is connected, when protoneuron circuit
21 outfan VoutDuring for low level, switching tube Q turns on, when the output of protoneuron circuit 21
End VoutDuring for high level, switching tube Q ends.
Or, the first circuit 22 may include：Switch transistor T 3, the input of switch transistor T 3 and the first god
Input V through first circuit 21inIt is connected, the first end phase of the outfan of switch transistor T 3 and electric capacity C1
Even；The outfan V of phase inverter N1, the input of phase inverter N1 and protoneuron circuit 21outPhase
Even, the outfan of phase inverter N1 is connected with the control end of switch transistor T 3.That is, switch transistor T 3
Control end be that during high level, switch transistor T 3 is ended, the control end of switch transistor T 3 is switching tube during low level
T3 turns on, but due to there being the presence of phase inverter N1, as the outfan V of protoneuron circuit 21out
During for high level, the control end actually input of switch transistor T 3 is low level, and switch transistor T 3 is ended；
Outfan V when protoneuron circuit 21outDuring for low level, the control end of switch transistor T 3 is actually
Input is high level, and switch transistor T 3 turns on.
It should be understood that the embodiment of the present invention is not construed as limiting to the concrete structure of second circuit 23, for example,
Two circuit 23 may include：Phase inverter N2, the first end phase of the input of phase inverter N2 and electric capacity C1
Even；Phase inverter N3, the input of phase inverter N3 is connected with the outfan of phase inverter N2, phase inverter
The outfan of N3 and the outfan V of protoneuron circuit 21outIt is connected, voltage threshold is phase inverter
Higher value in the conduction threshold of the conduction threshold of N2 and phase inverter N3 (can select the anti-of same size
Phase device N2 and phase inverter N3, makes their voltage threshold identical).That is, it is possible to use anti-phase
The threshold property of device realizes the setting of above-mentioned voltage threshold, why is to maintain using two phase inverters
The first end of circuit holding capacitor C1 and the outfan V of protoneuron circuit 21outLow and high level one
Cause (being reversely equivalent to constant twice), realize the voltage threshold characteristics of circuit using two phase inverters
Circuit structure is simple, but it should be recognized that the circuit being capable of threshold circuit function is a lot, above
Be merely illustrative, in practice can also using other be capable of circuit voltage threshold characteristics electricity
Road is as second circuit 23.
It should be understood that the high level of protoneuron circuit 21 output and low level can be with respect in advance
For the voltage threshold of setting, that is, this high level is higher than this voltage threshold, and low level is less than this voltage threshold
Value.
Alternatively, as an embodiment, protoneuron circuit 21 may also include：Control end Ictrl,
Control end IctrlIt is connected with the first end of the first circuit 22, for electric capacity C1 input current.As Fig. 2
Shown, control end IctrlThe electric current of input can charge for electric capacity C1, by changing control end IctrlInput
Electric current size, can change the charging rate of electric capacity C1, and the changing of the charging rate of electric capacity C1
Change can lead to the change of the frequency of the pulse signal of the outfan of protoneuron circuit 21.Specifically,
Fig. 4 shows control end IctrlSize of current and protoneuron circuit 21 outfan VoutOutput
The relation of pulse signal frequency, from fig. 4, it can be seen that linear approximate relationship therebetween, and pulse
Signal frequency is with control end IctrlThe increase of electric current and increase.
It should be understood that protoneuron circuit 21 can be connected with other neuron circuits by Sudden-touch circuit,
This Sudden-touch circuit can be a memristor, or comprises the structure of memristor, thus working as protoneuron
When circuit 21 and other neuron circuits transmission signal, memristor passes through to change itself resistance, Neng Gougai
Become the dependency of adjacent neuron circuit, thus realizing the simulation of neurocyte.Alternatively, as one
Embodiment, as shown in figure 8, neuron circuit (for example, the protoneuron electricity in the embodiment of the present invention
Road and nervus opticus unit circuit) between can be using connecting in the way of as shown in Figure 8, directly to pass through to recall
Resistance device connects.Certainly, protoneuron circuit can also comprise the prominent of memristor by as shown in Figure 5
Electric shock road is connected with nervus opticus unit, is described in detail with reference to Fig. 5.
Alternatively, as an embodiment, as shown in figure 5, neurn simulation circuit 20 may also include prominent
Electric shock road 24, Sudden-touch circuit 24 can be with the input V of protoneuron circuit 21inIt is connected, synapse electricity
Road 24 may include：Switching tube M, the input of switching tube M and power supply VccIt is connected, switching tube M's
Control end is used for receiving the output signal of nervus opticus unit circuit；Memristor ME, memristor ME's is defeated
Enter end to be connected with the outfan of switching tube M, the outfan of memristor ME and protoneuron circuit 21
Input VinIt is connected；The outfan of switching tube Ms, the input of switching tube Ms and switching tube M
It is connected, the outfan of switching tube Ms is connected to the ground, the control end of switching tube Ms is electric with protoneuron
The outfan V on road 21outIt is connected, and switching tube Ms is in the outfan V of protoneuron circuitoutFor height
Electric conducts, in the outfan V of protoneuron circuitoutFor ending during low level；Protoneuron
Circuit 21 may also include：Switch transistor T 2, the input of switch transistor T 2 and power supply VpullIt is connected, switch
The outfan of pipe T2 and the input V of protoneuron circuit 21inIt is connected, the control of switch transistor T 2
End and the outfan V of protoneuron circuit 21outIt is connected, wherein, defeated in protoneuron circuit
Go out to hold VoutDuring for high level, switch transistor T 2 and switching tube Ms turn on, power supply VpullThe electric current of output
Input V from protoneuron circuitinFlow out, flow to ground through memristor ME and switching tube Ms,
The resistance making memristor ME increases.
It should be understood that in the embodiment of the present invention, before Sudden-touch circuit 24 is arranged on protoneuron circuit 21
End, the input V with protoneuron circuit 21inIt is connected, when the control end of switching tube M receives
During the high level of other neuron circuits output, switching tube M turns on, power supply VccThe electric current flowing out is positive
By memristor ME so that the resistance of memristor ME reduces, the Memory Process of biology can be simulated；
When protoneuron circuit output high level, can Reverse Turning Control switching tube Ms turn on, power supply VccStream
The electric current going out flows to ground through switching tube Ms, and from VpullThe electric current flowing out is reverses through memristor ME
Flow to ground with switching tube Ms, the resistance of memristor ME increases, and can simulate the forgetting process of biology.
The neurn simulation circuit of the embodiment of the present invention, can simulate the learning and memory process of people, also can simulate
Biological Memory Process, moreover it is possible to the biological forgetting process of simulation, improves the intelligence spy of neurn simulation circuit
Property.
Alternatively, as an embodiment, neurn simulation circuit 20 may also include nervus opticus unit circuit
25, nervus opticus unit circuit 25 can have identical structure, nervus opticus unit with protoneuron circuit 21
The outfan of circuit 25 can be connected with the control end of the switching tube M in Sudden-touch circuit 24, nervus opticus
First circuit 25 can be as front neuron circuit, by Sudden-touch circuit 24 to as the of rear neuron circuit
One neuron circuit 21 transmits the signal that the outfan of nervus opticus unit circuit 25 produces.
It should be understood that the nervus opticus unit circuit 25 in the embodiment of the present invention passes through Sudden-touch circuit 24 and first
Neuron circuit 21 is connected, and now, nervus opticus unit circuit 25 is equivalent to front neuron circuit, and second
Neuron circuit 21 is equivalent to rear neuron circuit, the big I of resistance of the memristor in Sudden-touch circuit 24
Characterize the dependency between this front neuron circuit and rear neuron circuit.Current neural unit circuit is refreshing backward
During through first circuit transmissioning signal, the resistance of the memristor ME in Sudden-touch circuit 24 reduces, in front and back nerve
The dependency of first circuit increases, and is equivalent to simulation man memory process；When after neuron circuit from Vpull
When reverse current is flowed out at end, the resistance of memristor ME increases, and the dependency of neuron circuit reduces in front and back,
Be equivalent to the forgetting process of simulation people.
Further, neurn simulation circuit 20 may also include protoneuron circuit 21 and nervus opticus unit
In interior multiple neuron circuits, neurn simulation circuit 20 may also include Sudden-touch circuit 24 and exists circuit 25
Interior multiple Sudden-touch circuit, the multiple neuron circuits in neurn simulation circuit 20 are by multiple synapses electricity
Road connects, and forms neutral net.
Specifically, referring to Fig. 6, in figure 6, front neuron circuit and rear neuron circuit may each be
Neuron circuit as shown in Figure 2.From fig. 6, it can be seen that due to front neuron circuit and rear neuron
The structure of circuit is identical, can continue to connect other synapses on the basis of in front and back's neuron circuit structure
Neuron circuit, neurn simulation circuit is extended to neutral net.Specifically, Fig. 7 shows the present invention
A kind of possible structure of the neurn simulation circuit of embodiment.In neurn simulation circuit shown in Fig. 7,
Front neuron circuit and rear neuron circuit may each be neuron circuit as shown in Figure 2.Can from Fig. 7
To find out, the neuron circuit of the embodiment of the present invention and Sudden-touch circuit are not only able to be sequentially connected with (for example,
Multiple neuron circuits and Sudden-touch circuit interlock and join end to end) additionally it is possible to arranged in parallel is (for example, multiple
Front neuron circuit is connected with neuron circuit after an identical by respective synapse).Therefore, originally
Neurn simulation circuit in inventive embodiments has very strong extensibility, being capable of shape according to the actual needs
Become various forms of complicated neutral nets.Comparatively speaking, in the nerve of prior art as shown in Figure 1
In analog circuit, due to memristor connect be neuron circuit M end, and the P of neuron circuit
What end connected is pumping signal it is impossible to connect new synapse, leads to the poor expandability of neurn simulation circuit.
It should be understood that the switching tube of the embodiment of the present invention can be but not limited to metal-oxide semiconductor (MOS)
(Metal Oxide Semiconductor, MOSFET), insulated gate bipolar transistor (Insulated
Gate Bipolar Transistor, IGBT), integrated gate commutated thyristor (Integrated Gate
Commutated Thyristors, IGCT) or silicon controlled rectifier (SCR) (Silicon Controlled Rectifier,
SCR) any combination of constant power device or above-mentioned different capacity device.
In several embodiments provided herein it should be understood that disclosed system, device and
Method, can realize by another way.For example, device embodiment described above is only shown
Meaning property, for example, the division of described unit, only a kind of division of logic function, actual can when realizing
There to be other dividing mode, for example multiple units or assembly can in conjunction with or be desirably integrated into another
System, or some features can ignore, or do not execute.Another, shown or discussed each other
Coupling direct-coupling or communication connection can be the INDIRECT COUPLING of device or unit by some interfaces
Or communication connection, can be electrical, mechanical or other forms.
The described unit illustrating as separating component can be or may not be physically separate, make
For the part that unit shows can be or may not be physical location, you can with positioned at a place,
Or can also be distributed on multiple NEs.Can select according to the actual needs part therein or
The whole unit of person is realizing the purpose of this embodiment scheme.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit
In or unit is individually physically present it is also possible to two or more units are integrated in one
In individual unit.
The above, the only specific embodiment of the present invention, but protection scope of the present invention is not limited to
In this, any those familiar with the art the invention discloses technical scope in, can be easily
Expect change or replacement, all should be included within the scope of the present invention.Therefore, the protection of the present invention
Scope should described be defined by scope of the claims.
Claims (7)
1. a kind of neurn simulation circuit is it is characterised in that described neurn simulation circuit includes first nerves
First circuit, described protoneuron circuit is used for being connected by memristor ME circuit first with nervus opticus,
And transmit signal, described first god between described protoneuron circuit and described nervus opticus unit circuit
Include through first circuit：
The input V of the first circuit, the first end of described first circuit and described protoneuron circuitin
It is connected, the outfan V of the second end of described first circuit and described protoneuron circuitoutIt is connected, institute
State the first circuit in described outfan VoutFor in the conduction state during low level, in described outfan Vout
It is in cut-off state during for high level；
Electric capacity C1, the first end of described electric capacity C1 is connected with the 3rd end of described first circuit, described electricity
The second end holding C1 is connected to the ground；
Second circuit, the input of described second circuit is connected with the 3rd end of described first circuit, described
The outfan of second circuit and the outfan V of described protoneuron circuitoutIt is connected, described second circuit
For the first end in described electric capacity C1 voltage be less than default voltage threshold when be in cut-off state,
In the conduction state when the voltage of the first end of described electric capacity C1 is higher than voltage threshold, and described the
After two circuit turn-ons, described outfan VoutIt is upgraded to high level from low level；
Switch transistor T 1, the input of described switch transistor T 1 is connected with the 3rd end of described first circuit, institute
The outfan stating switch transistor T 1 is connected to the ground, the control end of described switch transistor T 1 and described protoneuron
The outfan V of circuitoutIt is connected, and described switch transistor T 1 is in described outfan VoutLead during for high level
Logical, in described outfan VoutFor ending during low level.
2. neurn simulation circuit as claimed in claim 1 is it is characterised in that described neurn simulation is electric
Road also includes Sudden-touch circuit, the input V of described Sudden-touch circuit and described protoneuron circuitinIt is connected,
Described Sudden-touch circuit includes：
Switching tube M, the input of described switching tube M and power supply VccIt is connected, described switching tube M's
Control end is used for receiving the output signal of described nervus opticus unit circuit；
Described memristor ME, the outfan phase of the input of described memristor ME and described switching tube M
Even, the input V of the outfan of described memristor ME and described protoneuron circuitinIt is connected；
Switching tube Ms, the input of described switching tube Ms is connected with the outfan of described switching tube M,
The outfan of described switching tube Ms is connected to the ground, and the control end of described switching tube Ms is refreshing with described first
Outfan V through first circuitoutIt is connected, and described switching tube Ms is defeated in described protoneuron circuit
Go out to hold VoutFor turning on during high level, in the outfan V of described protoneuron circuitoutDuring for low level
Cut-off；
Described protoneuron circuit also includes：
Switch transistor T 2, the input of described switch transistor T 2 and power supply VpullIt is connected, described switch transistor T 2
Outfan and described protoneuron circuit input VinIt is connected, the control end of described switch transistor T 2
Outfan V with described protoneuron circuitoutIt is connected, wherein, in described protoneuron circuit
Outfan VoutDuring for high level, described switch transistor T 2 and described switching tube Ms turn on, described power supply
VpullThe electric current of output is from the input V of described protoneuron circuitinFlow out, through described memristor
ME and described switching tube Ms flow direction ground is so that the resistance of described memristor ME increases.
3. neurn simulation circuit as claimed in claim 2 is it is characterised in that described neurn simulation is electric
Road also includes described nervus opticus unit circuit, described nervus opticus unit circuit and described protoneuron circuit
There is identical structure, the switching tube M in the outfan and described Sudden-touch circuit of described nervus opticus unit circuit
Control end be connected, described nervus opticus unit circuit as front neuron circuit, by described Sudden-touch circuit
Defeated to the described protoneuron circuit transmission described nervus opticus unit circuit as rear neuron circuit
Go out the signal that end produces.
4. neurn simulation circuit as claimed in claim 3 is it is characterised in that described neurn simulation is electric
Multiple neuron circuits including described protoneuron circuit and described nervus opticus unit circuit for the road,
Multiple Sudden-touch circuit also including described Sudden-touch circuit for the described neurn simulation circuit, described neurn simulation
The plurality of neuron circuit in circuit is connected by the plurality of Sudden-touch circuit, forms neutral net.
5. the neurn simulation circuit as any one of claim 1-4 is it is characterised in that described
Protoneuron circuit also includes：
Control end Ictrl, described control end IctrlIt is connected with the first end of described first circuit, for described
Electric capacity C1 input current.
6. the neurn simulation circuit as any one of claim 1-5 is it is characterised in that described
First circuit includes：
The input of switch transistor T 3, the input of described switch transistor T 3 and described protoneuron circuit
VinIt is connected, the outfan of described switch transistor T 3 is connected with the first end of described electric capacity C1；
The outfan of phase inverter N1, the input of described phase inverter N1 and described protoneuron circuit
VoutIt is connected, the outfan of described phase inverter N1 is connected with the control end of described switch transistor T 3.
7. the neurn simulation circuit as any one of claim 1-6 is it is characterised in that described
Second circuit includes：
Phase inverter N2, the input of described phase inverter N2 is connected with the first end of described electric capacity C1；
Phase inverter N3, the input of described phase inverter N3 is connected with the outfan of described phase inverter N2,
The outfan of described phase inverter N3 and the outfan V of described protoneuron circuitoutIt is connected, described electricity
Pressure threshold value is larger in the conduction threshold of described phase inverter N2 and the conduction threshold of described phase inverter N3
Value.
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| CN201510508806.6A CN106470023A (en) | 2015-08-18 | 2015-08-18 | Neurn simulation circuit |
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| CN201510508806.6A CN106470023A (en) | 2015-08-18 | 2015-08-18 | Neurn simulation circuit |
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