CN106465539A

CN106465539A - Circuit board, power storage device, battery pack, and electronic device

Info

Publication number: CN106465539A
Application number: CN201580023310.8A
Authority: CN
Inventors: 长居高石; 熊谷浩之
Original assignee: Sony Corp
Current assignee: Murata Northeast China; Murata Manufacturing Co Ltd
Priority date: 2014-05-22
Filing date: 2015-05-13
Publication date: 2017-02-22
Anticipated expiration: 2035-05-13
Also published as: US10231339B2; CA2947519C; CN106465539B; US20170150605A1; WO2015177988A1; JP2016001717A; JP6476871B2; CA2947519A1

Abstract

An electronic apparatus is provided, including a substrate, a conductive land formed on a surface of the substrate, an electronic component including an electrode, at least one insulating protrusion formed on the land in an overlapping region between the land and the electrode in plan view, and a solder that bonds the electronic component to the land, the solder being formed between the electrode and the land in the overlapping region in a normal direction to the surface of the substrate.

Description

Circuit board, power storage device, set of cells and electronic equipment

The cross reference of related application

This application claims on May 22nd, 2014 submit to Japanese earlier patent application JP 2014-105963 and in The rights and interests of the Japanese earlier patent application JP 2015-002590 that on January 8th, 2015 submits to, by being cited each of which Full content is hereby incorporated by.

Technical field

This technology is related to circuit board, power storage device, set of cells and electronic equipment.

Background technology

In the electronic device equipped with circuit board, in this circuit board, part (such as integrated circuit or resistor) and leading Body wiring (such as thin and narrow copper) is intimate contact with one another by the joint by solder bonds on dielectric substrate materials.? With regard to the technology of circuit board described in PTL 1 and PTL 2.

List of references list

Patent documentation

PTL 1：Japanese Unexamined Patent application disclosure the 2003-318332nd

PTL 2：Japanese Unexamined Patent application disclosure the 2013-175590th

Content of the invention

Technical problem

In the circuit board it is necessary to improve the long-term reliability of solder bonds.

Expect to provide the circuit board of the long-term reliability that can improve solder bonds, and include the electric power of this circuit board and deposit Storage equipment, set of cells and electronic equipment.

Technical scheme

In one embodiment, provide electronic installation, this electronic installation includes：Substrate；Conductive welding disk, is formed at substrate Surface on；Electronic unit, including electrode；At least one projection that insulate, forms between pad in plan view and electrode On pad in overlapping region；And solder, electronic unit is bound to pad by this solder, in the normal direction of substrate surface Overlapping region in, this solder is formed between electrode and pad.

In another embodiment, electronic installation includes：Substrate；Conductive welding disk, this pad is formed at the surface of substrate On, this pad includes exposing the cut out portion of a part for following substrate；Electronic unit, including electrode；And solder, by electronics Part is bound to pad.In this embodiment, in the cut out portion in the normal direction of the substrate surface of pad, solder shape Become between electrode and substrate.In addition, in plan view, at least a portion of cut out portion is in the weight between pad and electrode In folded region.

In another embodiment, electronic installation includes：Substrate；Conductive welding disk, forms on a surface of a substrate；Electrode Or terminal, electronic unit is electrically connected；At least one projection that insulate, is formed at overlapping between pad and electrode in plan view On pad in region；And solder, electrode or terminal be bound to pad by this solder, and this solder is formed as intervention therebetween.

In another embodiment, electronic installation includes：Substrate；Conductive welding disk, this pad is formed at the surface of substrate On, this pad includes cut out portion or recess；Electrode or terminal, electrically connect electronic unit；And solder, this solder is by the ministry of electronics industry Part is bound to pad, and in the cut out portion of the pad in the normal direction of substrate surface or recess, this solder is formed as intervening Therebetween.

The technique effect of the present invention

According to the embodiment of this technology, the long-term reliability of solder bonds can be improved.

Brief description

[Figure 1A] Figure 1A is the schematic plan view of the profile instance illustrating the first embodiment according to this technology.

[Figure 1B] Figure 1B is the schematic cross sectional view of the line IB-IB intercepting along Figure 1A.

[Fig. 2A] Fig. 2A is the schematic plan view of the variation of shape of the front end illustrating pad.

[Fig. 2 B] Fig. 2 B is the schematic plan view of the variation of shape of the front end illustrating pad.

[Fig. 3 A] Fig. 3 A is the schematic plan view illustrating the position relationship between electrode and the front end of pad.

[Fig. 3 B] Fig. 3 B is the schematic plan view illustrating the position relationship between electrode and the front end of pad.

[Fig. 3 C] Fig. 3 C is the schematic plan view illustrating the position relationship between electrode and the front end of pad.

[Fig. 4 A] Fig. 4 A is the profile instance of the first example of the circuit board illustrating the first embodiment according to this technology Schematic plan view.

[Fig. 4 B] Fig. 4 B is the schematic cross sectional view of the line IVB-IVB intercepting along Fig. 4 A.

[Fig. 4 C] Fig. 4 C is the schematic cross sectional view of the line IVC-IVC intercepting along Fig. 4 A.

[Fig. 5] Fig. 5 is the schematic cross sectional view of the variation of the arrangement illustrating silk layer.

[Fig. 6 A] Fig. 6 A is the profile instance of the second example of the circuit board illustrating the first embodiment according to this technology Schematic plan view.

[Fig. 6 B] Fig. 6 B is the schematic cross sectional view of the line VIB-VIB intercepting along Fig. 6 A.

[Fig. 6 C] Fig. 6 C is the schematic cross sectional view of the line VIC-VIC intercepting along Fig. 6 A.

[Fig. 7] Fig. 7 is the size value of the electrode of the list of the size illustrating exemplary electronic part and each electronic unit List schematic diagram.

[Fig. 8 A] Fig. 8 A is the schematic cross sectional view of the part illustrating circuit board.

[Fig. 8 B] Fig. 8 B is the schematic plan view of the part illustrating circuit board.

[Fig. 9 A] Fig. 9 A is that the signal of the profile instance of the circuit board illustrating the second embodiment according to this technology is mild-natured Face figure.

[Fig. 9 B] Fig. 9 B is the schematic cross sectional view of the line IXB-IXB intercepting along Fig. 9 A.

[Figure 10 A] Figure 10 A is the schematic of the profile instance of the circuit board illustrating the second embodiment according to this technology Plane graph.

[Figure 10 B] Figure 10 B is the schematic cross sectional view of the line XB-XB intercepting along Figure 10 A.

[Figure 11 A] Figure 11 A is the schematic of the profile instance of the circuit board illustrating the 3rd embodiment according to this technology Plane graph.

[Figure 11 B] Figure 11 B is the schematic cross sectional view of the line XIB-XIB intercepting along Figure 11 A.

[Figure 11 C] Figure 11 C is the schematic cross sectional view of the line XIC-XIC intercepting along Figure 11 A.

[Figure 12 A] Figure 12 A is the schematic of the profile instance of the circuit board illustrating the 3rd embodiment according to this technology Plane graph.

[Figure 12 B] Figure 12 B is the schematic cross sectional view of the line XIIB-XIIB intercepting along Figure 12 A.

[Figure 13] Figure 13 is the axonometric chart of the outward appearance illustrating power storage device.

[Figure 14] Figure 14 is the exploded perspective view of the profile instance illustrating simple set of cells.

[Figure 15 A] Figure 15 A is the schematic perspective view of the outward appearance illustrating simple set of cells.

[Figure 15 B] Figure 15 B is the schematic perspective view of the outward appearance illustrating simple set of cells.

Specific embodiment

(overview of this technology)

First, in order to more fully understand this technology, by the overview of description this technology.In above-mentioned PTL 1, (Japan is uncensored Patent application publication text the 2003-318332nd) in describe, install electronic unit when occur in solder bonds ask Topic.For example, on substrate install electronic unit when in solder bonds produced problem as follows.

After by solder printing on the pad of mounting circuit boards, when installing electronic unit, by solder bonds electricity Subassembly, for example, applies solder during printing, installation electronic unit, and subsequently heats solder in reflow furnaces.

By heated and melting solder combine by way of so that by heating melting Printing Paste, due to moistening and Capillarity, the soldering paste of fusing is distributed the electrode to pad and electronic unit, and solder is coolrf and solidified.In solder bonds When, when the thickness of the soldering paste applying is such as 100 microns, due to the weight of electronic unit and the fusing of solder, thickness drops Low, and after heating and fusing, the thickness of the solder joining portion under the electrode of electronic unit is about 30 microns.

In electronic circuit board, in environment under active usage conditions, due to thermal coefficient of expansion and the part of substrate , stress in solder joining portion in difference between thermal coefficient of expansion, and therefore, tension force.When tension buildup, In the heart crack occurs in border surface between solder joining portion or in solder joining portion, and crack is spread and leads to solder to be tied Fracture in conjunction portion.Therefore, solder bonds loss conductivity, and there is no combined function.

On the contrary, the method as the crack avoiding in solder joining portion or fracture is it is proposed that following method：Wherein, increase is applied Plus soldering paste thickness to increase the thickness of the solder joining portion under the electrode of electronic unit (in order to reduce due to expanding and shrinking Stress and tension force).

However, when the thickness of the soldering paste applying increases, just the pressure of the electronic unit of installation can crush solder.Due to this Individual reason, the part extrusion of solder causes soldered ball between the pad under the electrode and electrode of electronic unit, or solder It is distributed in around on the substrate of pad.When there is excessive solder, there is circuit pattern by bridging and can may occur in which short-circuit load Melancholy.When heating in reflow furnaces, electronic unit is to sinking, and is difficult to maintain the solder joining portion under the electrode of electronic unit Thickness.

For these reasons, in the related, in order to prevent due to stress and tension force (its be due to expand and shrink and Produce) and the crack in the solder that causes or fracture so that ratio under pad and the electrode of electronic unit stayed by relatively large solder More difficult.Accordingly, it is difficult to prevent the crack that produced due to the use condition of change for many years or Repeat-heating and cooling or Fracture.

Hereinafter, the embodiment of this technology will be described with reference to the drawings.To be described in the following order.Run through real Apply the accompanying drawing of mode, identical or corresponding component will be assigned with same reference numerals.

1. first embodiment (example of circuit board)

2. second embodiment (example of circuit board)

3. the 3rd embodiment (example of circuit board)

4. another embodiment (example of modification)

5. application example

Corresponding embodiment described herein is the preferred embodiment of this technology, and the content of this technology is not limited to this A little embodiments.The effect describing in this manual is example, and nonrestrictive.It should be noted that exist being different from The effect of shown effect.

<1. first embodiment>

Profile instance by the circuit board according to the first embodiment of this technology for the description.By by the ministry of electronics industry of such as IC Part is arranged on including configuration circuit plate on the substrate of printed wiring board.In this manual, circuit board refers to pacify thereon Substrate equipped with corresponding component, i.e. include the whole substrate of installing component.

Figure 1A is the schematic plan view of the profile instance of the circuit board illustrating the first embodiment according to this technology.Figure 1B is the schematic cross sectional view of the line IB-IB intercepting along Figure 1A.In Figure 1A and Figure 1B, the component of not shown such as substrate. In figure ia, not shown solder.

As shown in FIG. 1A and 1B, it is formed at conductive pattern (such as, the island of the conductor being made up of the material of such as Copper Foil Shape pattern) in a pair of pad 11 formed on the circuit card 1.A pair of pad 11 is set to be separated from each other, and pad 11 utilizes Solder 13 is joined respectively to be arranged on a pair of electrodes 22 at the two ends of electronic unit 21.

Pad 11 includes the front end 11a on the both sides that are respectively opposite each other.Front end 11a is directed towards another pad 11 relatively and dashes forward The part rising.Front end 11a has for example, rectangular planar shape.The shape of front end 11a is not limited to above-mentioned shape.For example, front end The flat shape of 11a can be as shown in Figure 2 A triangular shaped, or can be such as triangular shaped or rectangular shape Polygonal shape.As shown in Figure 2 B, the flat shape of front end 11a can be shape (the such as semicircle shape including curve Shape).

Two groups of a pair of insulation projections 12 are formed on the circuit card 1, so that in the normal direction respectively from the surface of pad 11 Projection.On the normal to a surface direction of pad 11, a pair of insulation projection 12 be formed at the overlapping region of electrode 22 in, and This pair of insulation projection is formed as separating with least a portion of the front end 11a of the pad 11 inserting therebetween.

Insulation projection 12 is arranged in four corners under a pair of electrodes 22.That is, an insulation of a pair of insulation projection 12 Projection 12 is formed under one end of an electrode 22, and another insulation projection 12 is formed under the other end of an electrode 22. Similarly, an another insulation projection 12 to insulation projection 12 is formed under one end of another electrode 22, and another insulation Projection 12 is formed under the other end of another electrode 22.By using insulation projection 12, (this insulation projection is arranged in a pair of electrodes In four corners under 22) support electrode 22, electronic unit 21 can be stably attached to substrate via solder 13.

Solder 13 is inserted between insulation projection 12 and electrode 22, and insulate projection 12 and electrode 22 pass through solder respectively 13 combinations.A pair of the stepped portion being occurred due to the difference in height between insulation projection 12 and the surface of pad 11 is exhausted due to a pair Edge projection 12 and be formed with insertion front end 11a therebetween.Therefore, it is ensured that lower surface in electrode 22 after solder fusing The thickness of the solder 13 and pad 11 between, and therefore, it is possible to allow a large amount of solders 13 to stay lower surface and the weldering of electrode 22 Between disk 11.For example, the thickness being inserted in the solder 13 between the lower surface of electrode 22 and the surface of pad 11 can be for example, 70 microns or bigger, and it is highly preferred that 80 microns or bigger.Therefore, it is possible to improve the long-term reliability of solder.By being formed Insulation projection 12, the amount of the solder being crushed due to the weight of electronic unit 21 is reduced, and therefore, it is possible to prevent going out of soldered ball Existing.

Preferably, at least a portion of the front end 11a of pad 11 be present on the normal to a surface direction of pad 11 with In the overlapping region of electrode 22.In this case, for example, as shown in figs. 3 a and 3 c, whole front end 11a may be present in weldering On the normal to a surface direction of disk 11 with the overlapping region of electrode 22 in, and as shown in Figure 3 B, the one of the front end 11a of pad 11 Part may be present on the normal to a surface direction of pad 11 with the overlapping region of electrode 22 in.

Insulation projection

Insulation projection 12 is made up of insulant.Insulation projection 12 may include single insulating barrier, or may include by insulating Two or more insulating barriers that material is made.When the projection that insulate includes two or more insulating barrier, at least two or multiple layers Can be the insulating barrier being made up of identical type material, or at least two or multiple layers can be made up of different kinds material Insulating barrier.

The thickness d of insulation projection 12 preferably as 40 microns of lower limit or bigger, and it is highly preferred that 50 microns or Bigger.When limiting the upper limit, preferably 100 microns or less of its thickness, and it is highly preferred that 80 microns or less.Assume The thickness d of insulation projection 12 falls within the above-described range, and therefore, it is possible to allow more substantial solder to stay pad 11 and electrode Between 22 lower surface.Therefore, it is possible to prevent the crack in solder and fracture.It is prominent that the thickness d of insulation projection 12 refers to insulation Rise 12 by the use of pad 11 surface as reference surface maximum gauge.

The concrete configuration example of circuit board

Multiple concrete configuration examples by description circuit board 1.Hereinafter, by the first example (its of description circuit board 1 In, insulation projection 12 includes two insulating barriers being made up of different kinds material) and circuit board 1 the second example (wherein, absolutely Edge projection 12 includes single insulating barrier).The configuration of circuit board 1 is not limited to as described below those.

First example

Fig. 4 A is the signal of the profile instance of the first example of the circuit board illustrating the first embodiment according to this technology Property plane graph.Fig. 4 B is the schematic cross sectional view of the line IVB-IVB intercepting along Fig. 4 A.Fig. 4 C is the line IVC- along Fig. 4 A The schematic cross sectional view that IVC intercepts.In Figure 4 A, not shown solder.

Circuit board 1 includes the substrate 10 containing printed wiring board and installation electronic unit 21 on the substrate 10.Formed The conductive pattern of circuit is formed on the substrate 10, and a pair of pad 11 is formed as being bound to the conductive pattern of electronic unit 21. Resist layer 14 is formed on the substrate 10 or in a part for conductive pattern.The silk layer 15 being formed by silk screen printing is formed at against corrosion On layer 14.Insulation projection 12 is represented by a part for the dotted line in Fig. 4 A to Fig. 4 C, and in the first example, insulation is prominent Play 12 and include resist layer 14 and silk layer 15.Insulation projection 12 be present on the normal to a surface direction of pad 11 with electrode 22 In overlapping region.

As substrate 10, can be using dielectric base (such as, by phenolic resin is immersed in the paper phenol obtain in paper Substrate, paper epoxy substrate, glass epoxy substrate and glass synthesis substrate).

Resist layer

Resist layer 14 is created as covering the layer of conductive pattern being formed on the substrate 10 and being made up of insulant.

Silk layer

Silk layer 15 is the layer being made up of the insulant of such as dielectric ink.During manufacturing circuit board 1, generally logical Cross silk screen printing to print the character being referred to as silk or label (instruction such as component names, part number and polarity).For example, structure The silk layer 15 becoming insulation projection 12 can be made by with silk identical insulant.In the case of silk layer 15, for forming silk Screen printing process in, constitute insulation projection 12 silk layer 15 can be formed together with silk.Silk layer 15 is formed as silk at least A part.

The thickness of insulation projection, silk layer and resist layer

As described above, the thickness d of the insulation projection 12 being made up of resist layer 14 and silk layer 15 is preferably as lower limit 40 microns or bigger, and it is highly preferred that 50 microns or bigger.When limiting the upper limit, preferably 100 microns of its thickness or more Little, and it is highly preferred that 80 microns or less.Generally, the thickness of resist layer 14 is preferably as 40 microns of lower limit or more Greatly, and when limiting the upper limit, preferably 50 microns or less of its thickness.For example, the thickness of silk layer 15 preferably as 10 microns or bigger of lower limit.Generally, when limiting the upper limit, preferably 30 microns or less of its thickness.

Gap between silk layer and pad

Preferably, the silk layer 15 constituting insulation projection 12 is formed so that the scope in the gap between silk layer and pad 11 is From 0.1mm to 0.3mm.In the example of Fig. 4 A, the gap between silk layer 15 and pad 11 includes gap s, and (it has substantially Width on the direction of the projection direction of front end 11a) and clearance t (it has in the projection direction of front end 11a Width).It is preferable that gap s and clearance t are from 0.1mm to 0.3mm in the example of Fig. 4 A.In view of for manufacturing printing cloth The specification of line plate is it is preferable that the lower limit of above range is 0.1mm or bigger.When the upper limit of above range is more than 0.3mm, by In the manufacture specification of printed wiring board allowable deviation because it is difficult to the silk layer 15 that is stably formed under electrode 22, it is advantageous to Ground, its upper limit is 0.3mm or less.

There is the arrangement of the silk layer of rectangular planar shape

The silk layer 15 of the example shown in Fig. 4 A to Fig. 4 C is arranged in vertical direction so that having the silk of rectangular planar shape The longitudinal direction of layer 15 is approximately perpendicular to the projection direction of the front end 11a of pad 11.However, the arrangement of silk layer 15 be not limited to above-mentioned Arrangement.For example, as shown in figure 5, silk layer 15 may be arranged in horizontal direction so that having the vertical of the silk layer 15 of rectangular planar shape It is roughly parallel to the projection direction of front end 11a to direction.In the arrangement of horizontal direction, there are the manufacture rule to printed wiring board The worry of the location tolerance of the allowable deviation of lattice and electronic unit.On the normal to a surface direction of pad 11, due to silk layer 15 Can stably be arranged in the overlapping range of electrode 22 in, it is preferable that the arrangement of silk layer 15 is shown in Fig. 4 A to Fig. 4 C Arrangement in vertical direction.

Second example

Fig. 6 A is the signal of the profile instance of the second example of the circuit board illustrating the first embodiment according to this technology Property plane graph.Fig. 6 B is the schematic cross sectional view of the line VIB-VIB intercepting along Fig. 6 A.Fig. 6 C is the line VIC- along Fig. 6 A The schematic cross sectional view that VIC intercepts.In fig. 6, not shown solder.

Similar in appearance to the first example, circuit board 1 includes substrate 10 and installation electronic unit 21 on the substrate 10.Form electricity The conductive pattern on road is formed on the substrate 10, and a pair of pad 11 is formed as being bound to the conductive pattern of electronic unit 21.Anti- Erosion layer 14 is formed on the substrate 10 or in a part for conductive pattern.It is made up of absolutely the part of the dotted line in Fig. 6 A to Fig. 6 C Edge projection 12, and in the second example, insulation projection 12 includes single resist layer 14.Insulation projection 12 is present in pad 11 Normal to a surface direction on the overlapping region of electrode 22 in.Although not shown, insulation projection 12 may include two or Multiple resist layers 14.

As described above, for example, the thickness d of the insulation projection 12 being made up of resist layer 14 is 40 micro- preferably as lower limit Rice or bigger, and it is highly preferred that 50 microns or bigger.When limiting the upper limit, preferably 100 microns or less of its thickness, And it is highly preferred that 80 microns or less.

Fig. 7 illustrates the list of the size value of the list of the size of exemplary electronic part and the electrode of each electronic unit. In example shown in Fig. 7, the electrode size value (the long side b of minor face a (mm) * (mm)) of the electronic unit 21 of 1608 sizes is 0.4mm*0.8mm.The electrode size value (the long side b of minor face a (mm) * (mm)) of the electronic unit 21 of 2012 sizes is 0.5mm* 1.25mm.The electrode size value (the long side b of minor face a (mm) * (mm)) of the electronic unit 21 of 3216 sizes is 0.6mm*1.6mm. The electrode size value (the long side b of minor face a (mm) * (mm)) of the electronic unit 21 of 3225 sizes is 0.6mm*2.5mm.

It is preferred that will be applied to 3216 sizes or 3225 sizes according to the circuit board 1 of first embodiment The width a of the minor face of electrode 22 is equal to or more than the electronic unit 21 of 0.6mm.

When forming pad 11 and insulation projection 12 it is preferable that coating on the conductive pattern of the resist layer 14 shown in Fig. 8 A The amount of resist width p be equal to or more than 0.3mm so that further improve bond strength.Amount when the resist of coating Width p be less than 0.3mm when, due to resist flowing it may be difficult on conductive pattern obtain suitable thickness.Simultaneously for For the width a of the minor face of electrode 22 of the electronic unit 21 of 1608 sizes or 2012 sizes is less than the electronic unit 21 of 0.6mm, When the width p of amount coating resist is 0.3mm or bigger, due in the normal direction of bond pad surface with electrode 22 under The width q of the pad 11 in the overlapping region on surface is less than the half of the width a of minor face of electrode 22, so the knot of solder bonds Close intensity decreases.It is therefore preferred that the electrode according to the board application of first embodiment to 3216 sizes or 3225 sizes The width a of 22 minor face is equal to or more than the electronic unit 21 of 0.6mm.

In the first embodiment, when the electrode 22 using 3216 sizes or 3225 sizes minor face width a be equal to or During electronic unit 21 more than 0.6mm, can allow for the solder being inserted between the lower surface of electrode 22 and the surface of pad 11 13 thickness is more than the height of the stepped portion occurring due to the difference in height between insulation projection 12 and the surface of pad 11.Rank The height of terraced part corresponds to the thickness of insulation projection 12, and for instance, it is possible to allows to be inserted in lower surface and the weldering of electrode 22 The thickness of the solder 13 between the surface of disk 11 is equal to or more than 70 microns.It is inserted in the lower surface of electrode 22 and the table of pad 11 The thickness of the solder 13 between face corresponds to and is present in the overlapping region with electrode 22 on the normal to a surface direction of pad 11 The maximum gauge of interior solder 13.

<2. second embodiment>

Profile instance by the circuit board according to the second embodiment of this technology for the description.Fig. 9 A is to illustrate according to this technology The profile instance of the circuit board of second embodiment schematic plan view.Fig. 9 B is to intercept along the line VI-VI ' of Fig. 9 A Schematic cross sectional view.In figure 9 a, not shown solder.

Similar in appearance to first embodiment, circuit board 1 includes substrate 10 and installation electronic unit 21 on the substrate 10.Shape The conductive pattern becoming circuit is formed on the substrate 10, and a pair of pad 11 is formed as being bound to the conductor figure of electronic unit 21 Case.A pair of pad 11 is set to be separated from each other, and pad 11 is joined respectively to be arranged on electronic unit 21 using solder 13 A pair of electrodes 22 at two ends.Resist layer 14 is formed on the substrate 10.

In this second embodiment, the flat shape of pad 11 has shape (wherein a, part for rectangle for centre-drilling hole With rectangular shape boring), and the surface of substrate 10 is exposed at centre-drilling hole part.At least a portion of substrate-exposing part (exposing the surface of substrate 10) is included in the weight with the electrode 22 of electronic unit 21 in the normal direction of bond pad surface herein In folded region.Surround substrate-exposing part pad 11 a part be included in the normal direction of bond pad surface with electronics In the overlapping region of electrode 22 of part 21.Therefore, in the normal direction of bond pad surface with the electrode 22 of electronic unit 21 In overlapping region, formed and the substrate on the surface of pad 11 is less than due to the surface of the pad 11 of encirclement substrate-exposing part with position Difference in height between expose portion and the stepped portion that occurs.

Solder 13 is inserted between substrate-exposing part and pad 11 and between substrate-exposing part and electrode 22, and Substrate-exposing part is combined by solder 13 with electrode 22 with pad 11 and substrate-exposing part.Solder 13 (its thickness having Degree is more than the thickness of the solder between the surface of pad 11 and the lower surface of electrode 22) it is inserted in lower surface and the substrate of electrode 22 Between expose portion, and the solder thickness between the substrate-exposing part that obtained and the lower surface of electrode 22 is more than pad 11 Surface and the lower surface of electrode 22 between solder thickness.Therefore, it is possible to improve the solder bonds of electronic unit 21 further Bond strength.Solder 13 is bound to the side surface being formed on stepped portion of pad 11, and the combination of solder 13 Area increases.Therefore, it is possible to improve the bond strength of the solder bonds of electronic unit 21 further.

In this second embodiment, as the solder thickness under electrode 22, can allow for lower surface and the substrate of electrode 22 Thickness between expose portion is more than the surface of the pad 11 due to surrounding substrate-exposing part and position and is less than the table of pad 11 Difference in height between the substrate-exposing part in face and the height of stepped portion that occurs.For example, when the electronics using 1608 sizes During part 21, as the solder thickness under electrode 22, can allow for the thickness between the lower surface of electrode 22 and substrate-exposing part Degree is about 38 microns of (about 18 microns of the thickness (thickness of stepped portion) corresponding to pad 11+correspond to bond pad surface and electricity About 20 microns of solder thickness between pole 22), or the about 55 microns (thickness (thickness of stepped portion corresponding to pad 11 Degree) about 35 microns+corresponding to about 20 microns of solder thickness between electrode 22 and bond pad surface).That is, in the second embodiment party In formula, when the width a of the minor face of the electrode 22 of the electronic unit 21 using 1608 sizes is less than the electronic unit 21 of 0.6mm, Can allow for being present on the normal to a surface direction of pad 11 with the overlapping region of electrode 22 in solder 13 maximum thick Degree is equal to or more than 38 microns.

As shown in figs. 10 a and 10b, the flat shape of pad 11 can be following shape：Wherein, recessed portion is formed at On two sides facing with each other.In example shown in Figure 10 A and Figure 10 B, the surface of substrate 10 is exposed to the recessed of pad 11 Enter at part.At least a portion of substrate-exposing part is included in by the part that substrate-exposing part is clamped with pad 11 In the normal direction of bond pad surface with the overlapping region of the electrode 22 of electronic unit 21 in.Therefore, in the normal of bond pad surface On direction with the overlapping region of the electrode 22 of electronic unit 21 in, form the table of pad 11 due to being clamped by substrate-exposing part The stepped portion that face and position are less than the difference in height between the substrate-exposing part on surface of pad 11 and occur.Solder 13 inserts Between substrate-exposing part and pad 11 and between substrate-exposing part and electrode 22, and substrate-exposing part and pad 11 and substrate-exposing part be combined by solder 13 with electrode 22.(thickness that it has is more than the following table of electrode 22 to solder 13 Solder thickness between the surface of face and pad 11) it is inserted between substrate-exposing part and the lower surface of electrode 22, and energy The solder thickness between the lower surface of electrode 22 and substrate-exposing part is enough allowed to be more than under surface and the electrode 22 of pad 11 Solder thickness between surface.Solder 13 is bound to the side surface being formed on stepped portion of pad 11, and solder 13 bonded area increases.Therefore, it is possible to improve the bond strength of the solder bonds of electronic unit 21 further.

<3. the 3rd embodiment>

Profile instance by the circuit board according to the 3rd embodiment of this technology for the description.Figure 11 A is to illustrate according to this skill The schematic plan view of the profile instance of circuit board of the 3rd embodiment of art.Figure 11 B is the line VII-VII ' along Figure 11 A The schematic cross sectional view intercepting.Figure 11 C is the schematic cross sectional view of the line VIII-VIII intercepting along Figure 11 A.In Figure 11 A, Not shown solder.

Similar in appearance to first embodiment, circuit board 1 includes substrate 10 and installation electronic unit 21 on the substrate 10.Shape The conductive pattern becoming circuit is formed on the substrate 10, and a pair of pad 11 is formed as being bound to the conductor figure of electronic unit 21 Case.A pair of pad 11 is set to be separated from each other, and pad 11 is joined respectively to be arranged on electronic unit 21 using solder 13 A pair of electrodes 22 at two ends.Resist layer 14 is formed on the substrate 10 or in a part for conductive pattern.By screen printing scopiform The silk layer 15 becoming is formed on resist layer 14.

In the third embodiment, the flat shape of pad 11 can be shape (wherein, of rectangle of centre-drilling hole Divide with rectangular shape boring), and can be following shape：Wherein, two corners of rectangle are cut out and width becomes court Become narrower to another pad 11 relatively.The surface of substrate 10 is exposed at the centre-drilling hole part of pad 11.Substrate exposed portion Point at least a portion surface of substrate 10 (expose) be included in the normal direction of bond pad surface with electronic unit 21 In the overlapping region of electrode 22.The part surrounding the pad 11 of substrate-exposing part is included in the normal side of bond pad surface Upwards with the overlapping region of the electrode 22 of electronic unit 21 in.Therefore, in the normal direction of bond pad surface and electronic unit In 21 overlapping region of electrode 22, form the surface of the pad 11 due to surrounding substrate-exposing part and position is less than pad 11 The substrate-exposing part on surface between difference in height and the stepped portion that occurs.

In the third embodiment, two groups of a pair of insulation projections 12 are formed as prominent on the normal to a surface direction of pad 11 Rise.At least a portion of a pair of insulation projection 12 is formed at overlapping with electrode 22 on the normal to a surface direction of pad 11 In region, and be formed as being separated from each other to clamp at least a portion of the part of the narrowed width of pad 11.By Figure 11 A extremely The part of the dotted line of Figure 11 C represents insulation projection 12.In example shown in Figure 11 A to Figure 11 C, insulation projection 12 includes Resist layer 14 and silk layer 15.

Insulation projection 12 is arranged in four corners under a pair of electrodes 22.That is, an insulation of a pair of insulation projection 12 Projection 12 is formed under one end of an electrode 22, and another insulation projection 12 is formed under the other end of an electrode 22. Similarly, another another insulation projection 12 to insulation projection 12 is formed under one end of another electrode 22, and another exhausted Edge projection 12 is formed under the other end of another electrode 22.By electrode 22 is supported by insulation projection 12, can be incited somebody to action by solder 13 Electronic unit 21 is stably attached to substrate, and wherein, insulation projection 12 is arranged in four corners under a pair of electrodes 22.

Solder 13 is inserted between substrate-exposing part and pad 11 and between substrate-exposing part and electrode 22, and Substrate-exposing part is combined by solder 13 with electrode 22 with pad 11 and substrate-exposing part.Solder 13 (its thickness having Degree is more than the solder thickness between the surface of pad 11 and the lower surface of electrode 22) it is inserted in substrate-exposing part and electrode 22 Between lower surface, and the solder thickness between the substrate-exposing part that obtained and the lower surface of electrode 22 is more than pad 11 Solder thickness between the lower surface of surface and electrode 22.Therefore, it is possible to improve the solder bonds of electronic unit 21 further Bond strength.Solder 13 is bound to the side surface being formed on stepped portion of pad 11, and can be welded by increase The bonded area of material 13 to improve the bond strength of the solder bonds of electronic unit 21 further.

Solder 13 is also inserted into insulating between projection 12 and electrode 22, and insulate projection 12 and electrode 22 passes through solder 13 In conjunction with.Due to this pair of insulation projection 12, while clamping at least a portion of the part of narrowed width of pad 11, formed A pair of the stepped portion being occurred due to the difference in height between insulation projection 12 and the surface of pad 11.Therefore, obtain in solder The thickness of the solder 13 between the lower surface of pad 11 and electrode 22 after fusing, and can allow for a large amount of solders 13 and stay weldering Between the lower surface of disk 11 and electrode 22.

In the third embodiment, as the solder thickness under electrode 22, can allow for lower surface and the substrate of electrode 22 Thickness between expose portion is more than the first stepped portion, and (it is because surface and the position of pad 11 are less than the surface of pad 11 Substrate-exposing part between difference in height and occur) height and the second stepped portion (it is due to the surface of pad 11 And insulation projection 12 between difference in height and occur) height sum total.For example, when using 2012 sizes or 3216 sizes When the width of the minor face of electrode 22 is equal to or more than the electronic unit 21 of 0.5mm, as the solder thickness under electrode 22, Neng Gouyun The thickness permitted between substrate-exposing part and the lower surface of electrode 22 is about 88 microns of (thickness (first ranks corresponding to pad 11 The height of terraced part) about 18 microns+corresponding to about 50 microns of thickness (height of the second stepped portion) of insulation projection 12+ Corresponding between electrode 22 and insulation projection 12 about 20 microns of solder thickness), or about 105 microns (corresponding to pad 11 About 35 microns of thickness (thickness of the first stepped portion)+corresponding to insulation projection 12 the thickness (height of the second stepped portion Degree) about 50 microns+corresponding to about 20 microns of solder thickness between electrode 22 and insulation projection 12).That is, in the 3rd enforcement In mode, when the width of the minor face using electrode 22 is equal to or more than the electronic unit 21 of 0.5mm, can allow for being present in On the normal to a surface direction of pad 11 with the overlapping region of electrode 22 in solder 13 maximum gauge be equal to or more than for example, 88 microns.

As illustrated in figs. 12 a and 12b, the flat shape of pad 11 can be that recessed portion is formed at two facing each other Shape on side, and can be that two corners of rectangle are cut out and shape that width narrows towards another relatively pad 11 Shape.

In example shown in Figure 12 A and Figure 12 B, the surface of substrate 10 is exposed in the recessed portion of pad 11.Substrate At least a portion of expose portion is included in bond pad surface with a part for the pad 11 clamped by substrate-exposing part In normal direction with the overlapping region of the electrode 22 of electronic unit 21 in.Therefore, in the normal direction of bond pad surface with electricity In the overlapping region of electrode 22 of subassembly 21, define the surface of pad 11 and the position due to being clamped by substrate-exposing part The stepped portion occurring less than the difference in height between the substrate-exposing part on the surface of pad 11.It is sudden and violent that solder 13 is inserted in substrate Between dew part and pad 11 and between substrate-exposing part and electrode 22, and substrate-exposing part and pad 11 and base Plate expose portion is combined by solder 13 with electrode 22.(thickness that it has is more than surface and the electrode 22 of pad 11 to solder 13 Lower surface between solder thickness) be inserted between substrate-exposing part and the lower surface of electrode 22, and the base being obtained Solder thickness between the lower surface of plate expose portion and electrode 22 is more than between surface and the lower surface of electrode 22 of pad 11 Solder thickness.Solder 13 is bound to the side surface being formed on stepped portion of pad 11, and the combination of solder 13 Area increases.Therefore, it is possible to improve the bond strength of the solder bonds of electronic unit 21 further.Solder 13 is also inserted into insulating Between projection 12 and electrode 22, and insulate projection 12 and electrode 22 is combined by solder 13.Due to this pair of insulation projection 12, While clamping at least a portion of the part of narrowed width of pad 11, formed due to the table of insulation projection 12 and pad 11 Difference in height between face and a pair of stepped portion occurring.Therefore, lower surface and the weldering of electrode 22 after solder fusing, are obtained The thickness of the solder 13 between disk 11, and this thickness can allow for lower surface and the pad 11 that electrode 22 stayed by a large amount of solders 13 Between.

Example

Hereinafter, this technology will be described in detail in conjunction with example.This technology is not limited to following configuration.

Example 1

Manufacture the circuit board for test, on the board, electronic unit (3216 size) is installed to have Fig. 4 A extremely Configuration shown in Fig. 4 C.Maximum gauge (the silk of insulation projection after solder bonds, is measured by the use of bond pad surface as benchmark Layer+resist layer), and its maximum gauge measuring is 80 microns.By the use of bond pad surface as benchmark, the thickness of resist layer is 50 Micron, and the thickness of silk layer is 30 microns.

Comparative example 1

Manufacture the circuit board for test, on the board, electronic unit (3216 size) is installed to be had and join as follows Put：Insulation projection (constituting the silk layer+resist layer of insulation projection) is removed configuration shown in from Fig. 4 A to Fig. 4 C.

Temperature cycling test

In the circuit board enterprising trip temperature loop test manufacturing, in this temperature cycling test, 125 in 30 minutes are Celsius 23 degrees Celsius spent in -40 degrees Celsius to 5 minutes in 23 degrees Celsius to 30 minutes in 5 minutes are set as one cycle. Observe the section of solder joining portion when 750 circulations, 1000 circulations and 1250 circulations, and check whether occur splitting Seam and fracture.The section of solder joining portion not finding, crack and the situation of fracture are assessed as OK and it was found that there being crack Or the situation of fracture is assessed as NG.

Assessment result is shown in Table 1.In comparative example 1, because assessment during 750 circulations is NG, so while not Evaluated, it is assumed that assessment when 1000 circulations and 1250 circulations is NG.Therefore, in comparative example 1,1000 are not executed Secondary circulation and the assessment of 1250 circulations.

Table 1

	750 circulations	1000 circulations	1250 circulations
				Example 1	OK	OK	OK
Comparative example 1	NG	-	-

As shown in table 1, it can be seen that solder bonds can be improved reliably and with long-term in example 1 compared with comparative example 1 Property.

<4. another embodiment>

This technology is not limited to the above-mentioned embodiment of this technology, and without departing from various in the range of the purport of this technology Modification and application are all possible.

For example, the numerical value described in above-mentioned embodiment and example, structure, shape, material, raw material and manufacture process It is only example, and when necessary can be using different numerical value, structure, shape, material, raw material and manufacture process.

Configuration in above-mentioned embodiment and example, method, step, shape, material and numerical value can be bonded to each other, unless Deviate the content of this technology.

For example, the layer of composition insulation projection 12 can be the layer beyond silk layer and resist layer.

This technology can have following configuration.

<1>

A kind of electronic installation, including：

Substrate；

Conductive welding disk, forms on a surface of a substrate；

Electronic unit, including electrode；

At least one projection that insulate, is formed on the pad in the overlapping region between pad and electrode in plan view； And

Solder, electronic unit is bound to pad by solder, in the overlapping region on the normal to a surface direction of substrate, weldering Material is formed between electrode and pad.

<2>

According to<1>Described electronic installation, further includes multiple projections, and in plan view, multiple projections are located adjacent to In the overlapping region in the corner of electrode.

<3>

According to<1>Extremely<2>Any one of electronic installation, wherein, solder be inserted in the normal direction projection with Between electrode.

<4>

According to<1>Extremely<3>Any one of electronic installation, wherein, pad includes extension, in plan view, This extension is from a lateral process of pad.

<5>

According to<4>Described electronic installation, wherein, the shape of extension is selected from rectangular shape, triangular shaped, curved The group that curved shape and semi-circular shape are formed.

<6>

According to<5>Described electronic installation, wherein, at least a portion of extension is present in overlapping region.

<7>

According to<1>Extremely<6>Any one of electronic installation, wherein, in the normal direction, be inserted in pad and electrode Between the thickness of solder be at least 70 μm.

<8>

According to<1>Extremely<7>Any one of electronic installation, wherein, in the normal direction, the thickness of projection is at least 40μm.

<9>

According to<1>Extremely<8>Any one of electronic installation,

Wherein, when the width of the minor face of electrode is less than 0.5mm, the maximum gauge of solder is at least 38 μm, and

Wherein, when the width of the minor face of electrode is more than 0.5mm, the maximum gauge of solder is at least 70 μm.

<10>

According to<1>Extremely<9>Any one of electronic installation, wherein, insulation projection include being formed at substrate and pad On resist layer, and include the insulating barrier being formed on resist layer in overlapping region.

<11>

According to<1>Extremely<10>Any one of electronic installation, wherein, in the first party perpendicular to described normal direction Upwards, the first side edge of insulating barrier is from 0.1mm with the scope of the distance between the corresponding first side edge of described pad To 0.3mm, and wherein, in a second direction, the second side edge of described insulating barrier second side corresponding with described pad The scope at the distance between edge is from 0.1mm to 0.3mm, and wherein, described second direction is perpendicular to described normal direction and institute State first direction

<12>

According to<10>Described circuit board, wherein, the width of a part for the resist layer being formed on pad is at least 0.3mm.

<13>

According to<1>Extremely<12>Any one of electronic installation, wherein, electronic installation is circuit board.

<14>

A kind of battery, including basis<1>Extremely<12>Any one of electronic installation.

<15>

A kind of power storage device, including basis<1>Extremely<12>Any one of electronic installation.

<16>

A kind of electronic equipment, including basis<1>Extremely<12>Any one of electronic installation.

<17>

A kind of electronic installation, including：

Substrate；

Conductive welding disk, this conductive welding disk forms on a surface of a substrate, and this pad includes expose substrate below one The cut out portion divided；

Electronic unit, including electrode；And

Solder, electronic unit is bound to pad by this solder, the pad notch on the normal to a surface direction of substrate In point, this solder is formed between electrode and substrate,

Wherein, in plan view, at least a portion of cut out portion is in the overlapping region between pad and electrode.

<18>

According to<17>Described electronic installation, wherein, in the normal direction of overlapping region, solder be also inserted into pad with Between electrode.

<19>

According to<17>Extremely<18>Any one of electronic installation, wherein, described cut out portion is included in plane graph The interior section of described pad and be formed as at least one of recessed portion of side of described pad.

<20>

According to<19>Described electronic installation, wherein, cut out portion includes being formed as the multiple recessed of the opposite side of pad Part.

<21>

A kind of electronic installation, including：

Substrate；

Conductive welding disk, forms on a surface of a substrate；

Electrode or terminal, electronic unit is electrically connected；

Solder, described electrode or described terminal are bound to described pad by described solder, and described solder is formed at described electricity Between pole or described terminal and described pad.

<22>

A kind of electronic installation, including：

Substrate；

Conductive welding disk, this conductive welding disk is formed on a surface of a substrate, and this pad includes cut out portion or recess；

Electrode or terminal, are electrically connected to electronic unit；And

Solder, described electronic unit is bound to described pad by described solder, in the normal to a surface direction of described substrate On, in the described cut out portion of described pad or described recess, described solder is formed at described electronic unit and described pad Between.

<23>

There is provided a kind of circuit board, this circuit board includes：Substrate；Electronic unit, this electronic unit be arranged on substrate and Including a pair of electrodes being formed at two ends；And a pair of pad, this pair of pad be formed on substrate and toward each other simultaneously And a pair of electrodes is joined respectively to by solder.In the normal direction of bond pad surface, in the overlapping region with electrode, formed At least any one stepped portion in first stepped portion and the second stepped portion, wherein, the first stepped portion is in pad and position Set low between the substrate-exposing part of pad substrate surface, the second stepped portion is dashed forward in the insulation that pad and position are higher than pad Between rising, and the normal direction upper process in bond pad surface, and overlapping with electrode in the normal direction of bond pad surface The maximum gauge of the solder in region is formed extremely in the overlapping region with electrode more than in the normal direction of bond pad surface The height of any one stepped portion few.

<24>

In basis<23>In described circuit board, in electronic unit, the width of the minor face of electrode is less than 0.5mm, only First stepped portion can be formed in the normal direction of bond pad surface with the overlapping region of electrode in, and in bond pad surface It is present in normal direction and can be equal to or more than 38 microns with the maximum gauge of the solder in the overlapping region of electrode.

<25>

In basis<23>In described circuit board, in electronic unit, the width of the minor face of electrode is equal to or more than 0.6mm, the only second stepped portion can be formed in the normal direction of bond pad surface with the overlapping region of electrode in, and It is present in the normal direction of bond pad surface that can be equal to or more than 70 micro- with the maximum gauge of the solder in the overlapping region of electrode Rice.

<26>

In basis<23>In described circuit board, in electronic unit, the width of the minor face of electrode is equal to or more than 0.5mm, the first stepped portion and the second stepped portion all can be formed at overlapping with electrode in the normal direction of bond pad surface In region, and it is present in the normal direction of bond pad surface and can wait with the maximum gauge of the solder in the overlapping region of electrode In or be more than 88 microns.

<27>

There is provided a kind of circuit board, this circuit board includes：Electronic unit, including a pair of electrodes being formed at two ends；A pair Pad, this pair of pad toward each other and is joined respectively to a pair of electrodes by solder；And two groups of a pair of insulation projections, should Two groups of a pair of insulation projections pass through the normal direction upper process to a pair of electrodes and in bond pad surface for the solder bonds.A pair of pad One of towards another pad projection and there is front end from one of both sides facing each other, a part for this front end exists Be present in the normal direction of bond pad surface with the overlapping region of electrode in.Before a pair of insulation projection and insertion pad therebetween End at least a portion separate, and be present in the normal direction of bond pad surface with the overlapping region of electrode in.

<28>

In basis<27>In described circuit board, the thickness of insulation protrusion distance bond pad surface can be micro- equal to or more than 40 Rice.

<29>

In basis<27>Or<28>In described circuit board, insulation projection may include single insulating barrier or two or more exhausted Edge layer.

<30>

In basis<29>In described circuit board, insulating barrier can be at least one of resist layer and silk layer.

<31>

In basis<30>In described circuit board, insulating barrier can be resist layer and be formed at silk layer on resist layer, And silk layer may be arranged in vertical direction so that the longitudinal direction of the flat shape of silk layer is approximately perpendicular to the projection side of front end To

<32>

In basis<30>Or<31>In described circuit board, the gap between silk layer and pad can be from 0.1mm to 0.3mm

<33>

In basis<27>Extremely<32>Any one of circuit board in, be inserted between pad and the lower surface of electrode The thickness of solder can be equal to or more than 70 microns.

<34>

In basis<27>Extremely<33>Any one of circuit board in, the shape of the front end of pad can be polygon shape Shape or the shape including curve.

<35>

There is provided a kind of circuit board, this circuit board includes：Substrate；

Electronic unit, this electronic unit is arranged on substrate and includes being formed at a pair of electrodes at two ends；And one To pad, this pair of pad is formed on substrate and toward each other and be joined respectively to a pair of electrodes by solder.Pad A part and expose at least a portion of substrate-exposing part of substrate surface and be present in the normal direction of bond pad surface In the overlapping region of electrode.

<36>

According to<25>Described circuit board, can further include two groups of a pair of insulation projections, this two groups of a pair of insulation projections To a pair of electrodes and be formed as the normal direction upper process in bond pad surface by solder bonds.Pad can have width direction Another pad relatively becomes narrower shape, and a pair of insulation projection can be separated to sandwich the part of the narrowed width of pad At least a portion, and this pair of insulation projection the overlapping region with electrode can be present on the normal direction of bond pad surface Interior.

<37>

There is provided a kind of power storage device, this power storage device includes basis<23>Extremely<36>Any one of electricity Road plate.

<38>

There is provided a kind of set of cells, this set of cells includes basis<23>Extremely<36>Any one of circuit board.

<39>

There is provided a kind of electronic equipment, this electronic equipment includes basis<23>Extremely<36>Any one of circuit board.

<5. application examples>

It is installed in for example according to first embodiment to the circuit board of the 3rd embodiment and another embodiment, In electronic equipment, power storage device, set of cells etc..

Power storage device

Example including the power storage device of circuit board includes the power storage device with the configuration shown in Figure 13.To the greatest extent Pipe is not shown, but mounted thereon have the battery unit of control circuit block etc. and circuit board to be contained in the outer of power storage device In shell 90.The board application of the first embodiment according to this technology or another embodiment is to this circuit board.Although not Illustrate, but battery unit is as lower unit：Wherein, the lug (tab) of such as electrical connection battery block group and multiple battery cell Such component accommodates in the cell housing.Battery block group includes for example, being connected to multiple battery blocks each other, and one Individual battery block includes being connected in parallel to multiple battery cells each other.Battery cell is for example, and such as column lithium ion is secondary The secondary cell of battery.Battery cell is not limited to lithium rechargeable battery.Battery cell can be laminated-type.

Set of cells

Example including the set of cells of circuit board includes the set of cells with the configuration shown in Figure 14.

This set of cells is simple set of cells (also referred to as " Soft Roll ").Simple set of cells is installed in the electronic device, and Configuration makes battery cell or protection circuit fix by insulating tape in this way, the part exposure of battery cell, and carries For connecting the output (such as adapter) of the main body to electronic equipment.

The example of the configuration of simple set of cells will be described.Figure 14 is the exploded perspective of the profile instance illustrating simple set of cells Figure.Figure 15 A is the schematic perspective view of the outward appearance illustrating simple set of cells, and Figure 15 B is the outward appearance illustrating simple set of cells Schematic perspective view.

As shown in Figure 14, Figure 15 A and Figure 15 B, simple set of cells includes battery cell 101, extends from battery cell 101 Lead 102a and 102b, insulating tape 103a to 103c, insulation board 104, be formed on the electricity of protection circuit module (PCM) Road plate 105 and adapter 106.Board application according to first embodiment or another embodiment is to circuit board 105.

On the platform 101a of front end that insulation board 104 and circuit board 105 are arranged in battery cell 101, and from battery list In body 101, the lead 102a extending and lead 102b connects to circuit board 105.

Adapter 106 for output connects to circuit board 105.Such as battery cell 101, insulation board 104 and circuit The component of plate 105 is fixed to the predetermined portions of insulating tape 103a to 103c.

Electronic equipment

Example including the electronic equipment of circuit board includes notebook-PC, personal digital assistant (PDA), honeybee Cellular telephone, smart phone, for the receiver of wireless phone, projector, camera, digital camera, e-book, electronic dictionary, Music player, radio, earphone, game machine, navigation system, storage card, pacemaker, sonifer, electric tool, electric razor Knife, electric refrigerator, air-conditioning, television set, stereophonic sound system, water heater, microwave oven, dish-washing machine, washing machine, exsiccator, illumination apparatus, Toy, medical equipment, robot, server, load governor and traffic lights.

It will be understood by those skilled in the art that according to design need and other factors, can make various modifications, combination, Sub-portfolio and change, as long as they are in the range of claims or its equivalent.

List of reference characters

1 circuit board

10 substrates

11 pads

11a front end

12 insulation projections

13 solders

14 resist layers

15 layers

21 electronic units

22 electrodes

90 shells

101 battery cells

101a platform part

102a, 102b lead

103a, 103b, 103c insulating tape

104 insulation boards

105 circuit boards

106 adapters.

Claims

1. a kind of electronic installation, including：

Substrate；

Conductive welding disk, is formed on the surface of described substrate；

Electronic unit, including electrode；

At least one projection that insulate, is formed at described in the overlapping region between described pad and described electrode in plan view On pad；And

Solder, described electronic unit is bound to described pad by described solder, on the normal to a surface direction of described substrate In described overlapping region, described solder is formed between described electrode and described pad.

2. electronic installation according to claim 1, further includes multiple projections, in plan view, the plurality of projection In the described overlapping region in the corner being located adjacent to described electrode.

3. electronic installation according to claim 1, wherein, described solder is inserted in described projection in described normal direction And described electrode between.

4. electronic installation according to claim 1, wherein, described pad includes extension, in described plane graph, institute State a lateral process from described pad for the extension.

5. electronic installation according to claim 4, wherein, the shape of described extension is selected from rectangular shape, triangle The group that shape shape, curved shape and semi-circular shape are formed.

6. electronic installation according to claim 5, wherein, at least a portion of described extension is present in described overlap In region.

7. electronic installation according to claim 1, wherein, in described normal direction, be inserted in described pad with described The thickness of the described solder between electrode is at least 70 μm.

8. electronic installation according to claim 1, wherein, in described normal direction, the thickness of described projection is at least 40μm.

9. electronic installation according to claim 1,

Wherein, when the width of the minor face of described electrode is less than 0.5mm, the maximum gauge of described solder is at least 38 μm；And

Wherein, when the width of the minor face of described electrode is more than 0.5mm, the maximum gauge of described solder is at least 70 μm.

10. electronic installation according to claim 1, wherein, described insulation projection includes being formed at described substrate and described Resist layer on pad, and the insulation that the described projection that insulate includes being formed on described resist layer in described overlapping region Layer.

11. electronic installations according to claim 1, wherein, insulate on the first direction perpendicular to described normal direction The first side edge of layer is from 0.1mm to 0.3mm with the scope of the distance between the corresponding first side edge of described pad, and And wherein, in a second direction between the second side edge of described insulating barrier and the corresponding second side edge of described pad away from From scope be from 0.1mm to 0.3mm, wherein, described second direction is perpendicular to described normal direction and described first direction.

12. circuit boards according to claim 10, wherein, are formed at a part for described resist layer on described pad Width is at least 0.3mm.

13. electronic installations according to claim 1, wherein, described electronic installation is circuit board.

A kind of 14. batteries, including electronic installation according to claim 1.

A kind of 15. power storage devices, including electronic installation according to claim 1.

16. a kind of electronic equipments, including electronic installation according to claim 1.

A kind of 17. electronic installations, including：

Substrate；

Conductive welding disk, described conductive welding disk is formed on the surface of described substrate, and described pad includes exposing following described base The cut out portion of a part for plate；

Electronic unit, including electrode；And

Solder, described electronic unit is bound to described pad by described solder, on the normal to a surface direction of described substrate In the described cut out portion of described pad, described solder is formed between described electrode and described substrate,

Wherein, in plan view, at least a portion of described cut out portion be in overlapping between described pad and described electrode In region.

18. electronic installations according to claim 17, wherein, in the described normal direction of described overlapping region, described Solder is also inserted between described pad and described electrode.

19. electronic installations according to claim 17, wherein, described cut out portion includes the described pad in plane graph Interior section and be formed as at least one of recessed portion of side of described pad.

20. electronic installations according to claim 19, wherein, described cut out portion includes being formed as the relative of described pad Multiple recessed portions of side.

A kind of 21. electronic installations, including：

Substrate；

Conductive welding disk, is formed on the surface of described substrate；

Electrode or terminal, electrically connect electronic unit；

Solder, described electrode or described terminal are bound to described pad by described solder, described solder be formed at described electrode or Between described terminal and described pad.

A kind of 22. electronic installations, including：

Substrate；

Conductive welding disk, described conductive welding disk is formed on the surface of described substrate, and described pad includes cut out portion or recess；

Electrode or terminal, electrically connect electronic unit；And

Solder, described electronic unit is bound to described pad by described solder, on the normal to a surface direction of described substrate, In the described cut out portion of described pad or described recess, described solder is formed between described electronic unit and described pad.