CN106452693A - Clock phase jittering measurement method based on double-frequency-point noise floor energy analysis - Google Patents

Clock phase jittering measurement method based on double-frequency-point noise floor energy analysis Download PDF

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CN106452693A
CN106452693A CN201610752093.2A CN201610752093A CN106452693A CN 106452693 A CN106452693 A CN 106452693A CN 201610752093 A CN201610752093 A CN 201610752093A CN 106452693 A CN106452693 A CN 106452693A
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signal
frequency
clock
digital conversion
frequency point
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CN106452693B (en
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刘洁
龚科
邢建丽
李文琛
周国昌
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Xian Institute of Space Radio Technology
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Xian Institute of Space Radio Technology
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
    • H04L1/205—Arrangements for detecting or preventing errors in the information received using signal quality detector jitter monitoring
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31708—Analysis of signal quality
    • G01R31/31709—Jitter measurements; Jitter generators

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Nonlinear Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The invention discloses a clock phase jittering measurement method based on double-frequency-point noise floor energy analysis. The method comprises the following steps: by use of a signal source in combination with a bandpass filter, respectively generating low-frequency single-frequency-point sine wave signals and high-frequency single-frequency-point sine wave signals with quite small noise; performing analog-to-digital conversion on two groups of single-frequency-point sine waves by taking measured clock signals as a work clock of an analog-to-digital conversion module; performing spectrum analysis on the converted signals and calculating signal-to-noise ratios; by use of the obtained low-frequency signal signal-to-noise ratio, calculating compound amplitude noise of the analog-to-digital conversion module; and removing obtained amplitude noise components from high-frequency signal noise floor energy, and according to a relation between the noise floor energy after processing and clock phase jittering, reckoning phase jittering of a measured clock. The method solves the problems of tedious high-speed clock phase jittering measurement test steps and expensive instruments, and has the advantages of low computational complexity, low reliance on precision of the analog-to-digital conversion module and easy promotion.

Description

A kind of clock phase jitter measurement method of bottom energy spectrometer of being made an uproar based on dual-frequency point
Technical field
The present invention relates to a kind of clock phase jitter measurement method, belong to electronic circuit technology field.
Background technology
Communication system speed improves constantly, and clock quality becomes the key factor of impact systematic function.The short-term of clock is not Stable, that is, shake, be the key index weighing clock quality.The size of clock jitter and distribution directly affect serial communication The bit error rate, also determines the signal to noise ratio of high-speed data.Identification shake root is contributed to the accurate measurement of clock jitter, so that Optimize jittering characteristic in system design.
The method of measurement clock jitter mainly has the direct method of measurement and the indirect method of measurement two class at present.The so-called direct method of measurement Refer to shake come test clock by each cycle size of direct measurement clock, typically pass through the special surveys such as high-speed oscilloscope Measuring appratus, the jitter amplitude directly capturing multiple cycle clock edges is then average, and its method of testing is simple but passes through oscillograph Often lead to error by macroscopic method of testing larger, and high speed test instrument is expensive.The indirect method of measurement is typically By test clock phase noise spectrum, then spectrum energy is integrated, obtains the Jitter index of clock phase.Should Method needs in measurement to gather the pectrum noise of multiple frequencies simultaneously need to accurate curve matching, to ensure measuring accuracy, is surveyed Try is suddenly many, it is cumbersome to calculate, and curve fitting process is easily introduced error.And existing by ADC measure clock phase shake phase Dry measure method, needs also exist for gathering one group of signal frequency point, and collected signal frequency needs and measured clock frequency coherence, increases Difficulty of test is it is most important that the measuring accuracy of the method is largely dependent upon the property of ADC in test equipment Can, therefore measuring accuracy controllability is not strong, be not suitable for popularization and application on a large scale.
Content of the invention
Present invention solves the technical problem that：For overcoming the deficiencies in the prior art, the present invention proposes one kind and is based on dual-frequency point Make an uproar the clock phase jitter measurement method of bottom energy spectrometer, the relation of bottom energy of making an uproar from clock jitter and sampled signal, profit Made an uproar the bottom energy feature different to the sensitivity of clock jitter with different frequent points, separate the clock influence amount of noise, ensureing Test process is simplified, the method is not high to the dependency of ADC self performance simultaneously, and measuring accuracy is steady on the basis of certainty of measurement Fixed.
The technology used in the present invention solution：A kind of clock phase shake survey of bottom energy spectrometer of being made an uproar based on dual-frequency point Amount method is as follows including step：
(1) signal generator is utilized to produce single-frequency point sine wave signal after band-pass filter, as low frequency point letter Number；
(2) using clock to be tested as change over clock, described low frequency point signal is carried out with analog digital conversion and to being converted to Digital signal carry out spectrum analyses, calculate signal to noise ratio snr after analog digital conversion for this signal1；
(3) calculate the equivalent amplitude noise of analog digital conversionWherein, N is analog digital conversion digit；
(4) signal generator again with described low frequency point signal amplitude always, frequency increase single-frequency point sine wave signal, After band-pass filter, as high frequency points signal；
(5) using clock to be tested as change over clock, analog digital conversion is carried out and to the number obtaining to described high frequency points signal Word signal carries out spectrum analyses, calculates signal to noise ratio snr after analog digital conversion for this signal2；
(6) calculate and obtain preliminary clock phase shake ta：
Wherein, f is the frequency of high frequency points signal；
(7) clock jitter in step (6) is carried out with error correction, and then obtain the final measured value of clock phase shake tJitter,Wherein taJIt is the intrinsic Aperture Jitter of analog digital conversion.
The single-frequency point sine wave signal frequency that in described step (1), signal generator produces is less than 1MHz, amplitude is less than mould Full scale amplitude 1dBm during number conversion.
Frequency f of the low frequency point signal in described step (1)inMeet -20log (2 π finta')<N 6.02+1.76, its In, ta' be measured clock phase jitter estimate higher limit.
The single-frequency point sine wave signal frequency that in described step (4), signal generator produces is more than 100MHz.
Present invention advantage compared with prior art is：
(1) present invention makes an uproar from clock jitter and sampled signal the relation of bottom energy, is made an uproar bottom energy using different frequent points The feature different to the sensitivity of clock jitter it is proposed that using dual-frequency point ADC sampling, analysis bottom make an uproar energy peel off clock jitter Thus the method for indirectly testing clock performance, the method does not need that special jitter test instrument, sampling frequency be less, meter for impact Calculation is succinct, be easy to engineer applied；
(2) present invention is different from methods such as the coherent measurement methods having utilized ADC, in the measuring method of the present invention Do not require the coherence of measured clock and ADC frequency input signal, reduce difficulty of test, and adopted by same ADC Different frequent points make an uproar bottom stripping mode, make the noise of ADC itself and precision in test equipment have little influence on test result, Reduce the dependency to ADC performance, measuring accuracy is stable, there is good versatility；
(3) present invention is to adapt to high-precision clock jitter testing requirement, the clock-jitter noise of ADC is constituted into One step analysis, it is proposed that reliable conclusion, removes itself uncertain shake of ADC, optimal inspection essence in final result Degree.
Brief description
Fig. 1 measures the simplified pinciple block diagram of clock phase shake for the present invention；
Fig. 2 is the flow chart of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawings the specific embodiment of the present invention is described further.
As shown in Figure 1 and Figure 2, for the simplified pinciple block diagram of measurement clock phase shake.The invention provides one kind is based on double Frequency is made an uproar the clock phase jitter measurement method of bottom energy spectrometer, and ADC modular converter adopts TI company ADC12D800, concrete walks Suddenly as follows：
(1) signal generator produces frequency as little as 1MHz, amplitude is the single-frequency point sine wave signal of 1.5dBm, through band logical filter After the filtering of ripple device, as low frequency point signal input rear end ADC12D800, ADC changes digit into 12；In step (1) Frequency f of low frequency point signalinMeet -20log (2 π finta')<N 6.02+1.76, wherein, ta' it is that the phase place of measured clock is trembled Dynamic estimates higher limit.
(2) clock to be tested is produced with phaselocked loop, access the change over clock interface of ADC12D800, described in step (1) Single-frequency point sine wave signal carry out analog digital conversion；
(3) using Matlab program, frequency spectrum minute is carried out to the digital single-frequency point sine wave signal being converted in step (2) Analysis, calculates signal to noise ratio snr after analog digital conversion for this signal1；
(4) pass through formulaCalculate the equivalent amplitude noise ε of adopted ADC12D800, wherein SNR1It is the signal to noise ratio recording in step (3), N is 12；
(5) adopt the signal generator in step (1) constant, generation amplitude is 1.5dBm, frequency is the single-frequency of 120MHz Point sine wave signal, after band-pass filter, as high frequency points signal input rear end ADC12D800；
(6) using clock to be tested as the change over clock of ADC12D800, to the single-frequency point sine wave signal in step (5) Carry out analog digital conversion；
(7) using Matlab program, spectrum analyses are carried out to the digital single-carrier signal being converted in step (6), calculate Signal to noise ratio snr after analog digital conversion for this signal2；
(8) the second frequency letter that the test in complex amplitude noise ε calculated in step (4), step (7) is obtained Number signal to noise ratio brings formula intoObtain preliminary clock phase shake ta, wherein SNR2It is step (7) signal to noise ratio recording in, f is 120MHz, and N is 12；
(9) to the clock jitter t in step (8)aIt is modified, obtain the final measured value t of clock phase shakeJitter,Wherein taJIt is the Aperture Jitter of ADC12D800.
Description of the invention unspecified part belongs to general knowledge as well known to those skilled in the art.

Claims (4)

1. a kind of based on dual-frequency point make an uproar bottom energy spectrometer clock phase jitter measurement method it is characterised in that include step such as Under：
(1) signal generator is utilized to produce single-frequency point sine wave signal after band-pass filter, as low frequency point signal；
(2) using clock to be tested as change over clock, analog digital conversion is carried out and to the number being converted to described low frequency point signal Word signal carries out spectrum analyses, calculates signal to noise ratio snr after analog digital conversion for this signal1；
(3) calculate the equivalent amplitude noise of analog digital conversionWherein, N is analog digital conversion digit；
(4) again with described low frequency point signal amplitude always, the single-frequency point sine wave signal that frequency increases, through band for signal generator After bandpass filter filtering, as high frequency points signal；
(5) using clock to be tested as change over clock, described high frequency points signal is carried out with analog digital conversion and to the numeral letter obtaining Number carry out spectrum analyses, calculate signal to noise ratio snr after analog digital conversion for this signal2；
(6) calculate and obtain preliminary clock phase shake ta：
t a = ( 10 - SNR 2 20 ) 2 - ( 1 + &epsiv; 2 N ) 2 2 &pi; f ;
Wherein, f is the frequency of high frequency points signal；
(7) clock jitter in step (6) is carried out with error correction, and then obtain the final measured value of clock phase shake tJitter,Wherein taJIt is the intrinsic Aperture Jitter of analog digital conversion.
2. the clock phase jitter measurement method of a kind of bottom energy spectrometer of being made an uproar based on dual-frequency point according to claim 1, its It is characterised by：The single-frequency point sine wave signal frequency that in described step (1), signal generator produces is less than 1MHz, amplitude is less than mould Full scale amplitude 1dBm during number conversion.
3. the clock phase jitter measurement method of a kind of bottom energy spectrometer of being made an uproar based on dual-frequency point according to claim 1 and 2, It is characterized in that：Frequency f of the low frequency point signal in described step (1)inMeet -20log (2 π finta')<N 6.02+1.76, Wherein, ta' be measured clock phase jitter estimate higher limit.
4. the clock phase jitter measurement method of a kind of bottom energy spectrometer of being made an uproar based on dual-frequency point according to claim 1 and 2, It is characterized in that：The single-frequency point sine wave signal frequency that in described step (4), signal generator produces is more than 100MHz.
CN201610752093.2A 2016-08-26 2016-08-26 It is a kind of to be made an uproar the clock phase jitter measurement method of bottom energy spectrometer based on dual-frequency point Active CN106452693B (en)

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CN108037362A (en) * 2017-11-30 2018-05-15 中国科学院高能物理研究所 A kind of method and device based on spectrum analysis measurement numeral BPM sampling clock shakes
CN113138318A (en) * 2021-04-27 2021-07-20 山东英信计算机技术有限公司 Phase jitter test method and system

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CN101779376A (en) * 2007-08-09 2010-07-14 高通股份有限公司 Circuit device and method of measuring clock jitter
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CN101779376A (en) * 2007-08-09 2010-07-14 高通股份有限公司 Circuit device and method of measuring clock jitter
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Cited By (4)

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Publication number Priority date Publication date Assignee Title
CN108037362A (en) * 2017-11-30 2018-05-15 中国科学院高能物理研究所 A kind of method and device based on spectrum analysis measurement numeral BPM sampling clock shakes
CN108037362B (en) * 2017-11-30 2019-07-23 中国科学院高能物理研究所 A kind of method and device based on spectrum analysis measurement number BPM sampling clock shake
CN113138318A (en) * 2021-04-27 2021-07-20 山东英信计算机技术有限公司 Phase jitter test method and system
CN113138318B (en) * 2021-04-27 2022-05-06 山东英信计算机技术有限公司 Phase jitter test method and system

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