CN106449657B - OLED display panel, display device, array substrate and manufacturing method thereof - Google Patents

OLED display panel, display device, array substrate and manufacturing method thereof Download PDF

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CN106449657B
CN106449657B CN201610976642.4A CN201610976642A CN106449657B CN 106449657 B CN106449657 B CN 106449657B CN 201610976642 A CN201610976642 A CN 201610976642A CN 106449657 B CN106449657 B CN 106449657B
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layer
substrate
pixel
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array substrate
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CN106449657A (en
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肖灿俊
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Tianma Microelectronics Co Ltd
Shanghai Tianma Microelectronics Co Ltd
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Tianma Microelectronics Co Ltd
Shanghai Tianma Microelectronics Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H10K50/856—Arrangements for extracting light from the devices comprising reflective means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks

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Abstract

The application discloses OLED display panel, display device, array substrate and preparation method thereof, wherein, array substrate includes: the display device comprises a first substrate, a pixel driving film layer, a flat layer, a first pixel defining layer, a reflecting layer, an anode layer and a second pixel defining layer; the first pixel definition layer is provided with a plurality of pixel grooves, and the reflection layer is positioned on the surface of the first pixel definition layer and completely covers the pixel grooves so as to improve the utilization efficiency of emergent light of the display sub-pixels; in addition, the reflection stratum deviates from first base plate one side has rough surface, and the incident ambient light can not pass through reflection stratum formation specular reflection to the glare problem can not appear, avoided adopting linear polaroid to solve the glare problem and the problem of the absorption display sub-pixel emergent light that appears, promoted and used array substrate's OLED display panel's the luminous efficiency of display sub-pixel has promoted OLED display panel's flexure resistance.

Description

OLED display panel, display device, array substrate and manufacturing method thereof
Technical Field
The application relates to the technical field of display, in particular to an OLED display panel, a display device, an array substrate and a manufacturing method thereof.
Background
With the continuous development of display technology, the application of display panels is becoming more and more extensive, and Organic Light Emitting Diode (OLED) display panels are becoming more and more elegant in display panel industry due to the advantages of fast response speed, gorgeous color, Light weight, convenience and the like. In order to improve the light extraction efficiency of the OLED display panel, a reflective metal layer is generally required to be disposed on the array substrate, so that light emitted from the display sub-pixels of the OLED display panel is emitted towards one side. However, the reflective metal layer may also reflect ambient light, which causes a glare problem and affects the display effect of the OLED display panel.
The scheme for solving the glare problem of the OLED display panel in the prior art is that an 1/4 lambda plate and a linear polarizer are sequentially arranged on the surface of a cover plate of the OLED display panel, so that ambient light is linearly polarized after passing through the linear polarizer and a 1/4 lambda plate, the ambient light which becomes the linearly polarized light with a polarization angle perpendicular to the linear polarizer after being reflected by a reflection metal layer and a 1/4 lambda plate, and the linearly polarized light perpendicular to the linear polarizer is absorbed when passing through the linear polarizer, so that the emergent amount of the ambient light reflected by the reflection metal layer is effectively reduced, and the problem of the glare of the OLED display panel is solved.
But the linear polarizer can also absorb 50% of the emergent light of the display sub-pixels in the OLED display panel, which reduces the light-emitting efficiency of the OLED display panel, and the linear polarizer is a multi-layer film structure, which has poor flexibility resistance and is difficult to be applied in a flexible display device.
Disclosure of Invention
In order to solve the technical problems, the invention provides an OLED display panel, a display device, an array substrate and a manufacturing method thereof, so that the glare problem of the OLED display panel can be solved without arranging a linear polarizer, the light emitting efficiency of the OLED display panel is improved, and the flexibility resistance of the OLED display panel using the array substrate is improved.
In order to achieve the technical purpose, the embodiment of the invention provides the following technical scheme:
an array substrate applied to an Organic Light Emitting Diode (OLED) display panel, the array substrate comprising:
a first substrate;
the pixel driving film layer is positioned on the surface of the first substrate;
the flat layer is positioned on one side, away from the first substrate, of the pixel driving film layer;
the first pixel defining layer is positioned on one side, away from the first substrate, of the flat layer and is provided with a plurality of pixel grooves;
the reflecting layer is positioned on one side, away from the first substrate, of the first pixel defining layer, and a rough surface is arranged on one side, away from the first substrate, of the reflecting layer;
the anode layer is positioned on one side of the reflecting layer, which is far away from the first substrate, and the reflecting layer and the anode layer completely cover the pixel groove;
and the second pixel defining layer is positioned on one side of the anode layer, which is far away from the first substrate, and at least covers the surface of the anode layer on the side wall part of the pixel groove.
Optionally, the roughness Rz of the rough surface of the reflective layer is greater than or equal to 1 nm.
Optionally, the first pixel defining layer and the planarization layer are made of the same material.
Optionally, the reflective layer is a metal layer with a rough surface.
Optionally, a surface of the pixel groove facing away from the first substrate has a rough surface.
Optionally, the pixel driving film layer includes: the display device comprises a plurality of gate lines arranged along a first direction on the surface of a first substrate, a plurality of data lines arranged along a second direction and thin film transistors arranged in the limited areas of the gate lines and the data lines, wherein the first direction and the second direction are crossed, and the drain electrode of each thin film transistor is electrically connected with the anode electrode of the corresponding display sub-pixel.
Optionally, the method further includes:
the light-emitting material layer is positioned on the surface of one side, away from the first substrate, of the anode layer;
the cathode layer is positioned on one side, away from the first substrate, of the light-emitting material layer;
the anode layer comprises a plurality of anodes arranged in an array, the light-emitting material layer comprises a plurality of light-emitting structures which are in one-to-one correspondence with the anodes, and the cathode layer, the anodes and the light-emitting structures form a plurality of display sub-pixels.
A preparation method of an array substrate comprises the following steps:
providing a first substrate;
sequentially forming a pixel driving film layer and a flat layer on the surface of the first substrate;
forming a first pixel defining layer with a plurality of pixel grooves on the surface of one side, away from the first substrate, of the flat layer;
forming a reflecting layer with a rough surface on the surface of one side, which is far away from the first substrate, of the first pixel defining layer;
forming an anode layer on one side of the reflecting layer, which is far away from the first substrate, etching the reflecting layer and the anode layer, wherein the etched reflecting layer and the anode layer completely cover the pixel groove;
and forming a second pixel defining layer on the surface of one side of the anode layer, which is far away from the first substrate, wherein the second pixel defining layer at least covers the surface of the anode layer on the side wall part of the pixel groove.
Optionally, the forming a first pixel defining layer having a plurality of pixel grooves on a side surface of the planarization layer facing away from the first substrate includes:
forming a photosensitive material layer on the surface of one side, away from the first substrate, of the flat layer;
and exposing the photosensitive material layer by using a mask plate, and developing the exposed photosensitive material layer to form a first pixel defining layer with a plurality of pixel grooves.
Optionally, the forming of the photosensitive material layer on the surface of the planarization layer on the side away from the first substrate includes:
and forming a photosensitive material layer with the same material as the flat layer on the surface of one side of the flat layer, which is far away from the first substrate.
Optionally, the forming a first pixel defining layer having a plurality of pixel grooves on a side surface of the planarization layer facing away from the first substrate includes:
arranging a half-tone mask plate on the surface of one side, away from the first substrate, of the flat layer;
and exposing the flat layer by using the half-tone mask plate, and developing the exposed flat layer to form a first pixel definition layer with a plurality of pixel grooves.
Optionally, the forming a reflective layer with a rough surface on a side surface of the first pixel defining layer facing away from the first substrate includes:
carrying out roughening treatment on the surface of one side, away from the first substrate, of the first pixel definition layers;
and forming a reflecting layer on the surface of the first pixel defining layer subjected to the roughening treatment, which is far away from the first substrate.
Optionally, the forming a reflective layer with a rough surface on a side surface of the first pixel defining layer facing away from the first substrate includes:
forming a reflecting layer on the surface of one side, away from the first substrate, of the first pixel defining layer;
and carrying out roughening treatment on the surface of one side, which is far away from the first substrate, of the reflecting layer.
Optionally, the anode layer includes a plurality of anodes arranged in an array;
the method further comprises the following steps after a second pixel definition layer is formed on the surface of the anode layer, which faces away from the first substrate:
forming a light-emitting material layer on the surface of one side, away from the first substrate, of the anode layer, wherein the light-emitting material layer comprises a plurality of light-emitting structures which correspond to the plurality of anodes one to one;
and forming a cathode layer on the surface of the light-emitting material layer on the side opposite to the first substrate, wherein the cathode layer, the plurality of anodes and the plurality of light-emitting structures form a plurality of display sub-pixels.
An OLED display panel comprising: the array substrate comprises a counter substrate and an array substrate which are oppositely arranged, wherein the array substrate is the array substrate.
A display device comprising at least one OLED display panel as claimed in one of the above.
It can be seen from the above technical solutions that the embodiments of the present invention provide an OLED display panel, a display device, an array substrate and a method for manufacturing the same, wherein a first pixel definition layer of the array substrate has a plurality of pixel grooves, and a reflective layer is located on a side of the first pixel definition layer away from the first substrate and completely covers the pixel grooves, so that emitted light of display sub-pixels of the OLED display panel can be reflected on the bottom surfaces of the pixel grooves and the reflective layer surfaces of the sidewalls for multiple times until the emitted light exits from the pixel grooves, and cannot be absorbed by the first pixel definition layer, thereby improving utilization efficiency of emitted light of the display sub-pixels; in addition, the reflection stratum deviates from first base plate one side has rough surface, and the incident ambient light can not pass through reflection stratum forms specular reflection to glare problem can not appear, avoided adopting linear polaroid to solve the glare problem and the linear polaroid absorption that appears OLED display panel's the problem of demonstration subpixel emergent light, promoted and used OLED display panel's of array substrate display subpixel's luminous efficacy, and promoted OLED display panel's flexure resistance, and then make it can be applied to in the flexible display device.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic cross-sectional structure diagram of an array substrate according to an embodiment of the present disclosure;
fig. 2 is a schematic cross-sectional view illustrating a planarization layer, a first pixel defining layer, a second pixel defining layer, a reflective layer and an anode layer according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram illustrating a top view structure of a pixel driving film according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a thin film transistor according to an embodiment of the present application;
fig. 5 is a schematic cross-sectional view illustrating a planarization layer, a first pixel defining layer, a second pixel defining layer, a reflective layer and an anode layer according to another embodiment of the present disclosure;
fig. 6 is a schematic flow chart illustrating a method for manufacturing an array substrate according to an embodiment of the present disclosure;
fig. 7 is a schematic flow chart illustrating a method for manufacturing an array substrate according to another embodiment of the present disclosure;
fig. 8 is a schematic flow chart illustrating a method for manufacturing an array substrate according to another embodiment of the present application;
fig. 9 is a schematic flow chart illustrating a method for manufacturing an array substrate according to still another embodiment of the present application;
fig. 10 is a schematic flow chart illustrating a method for manufacturing an array substrate according to a preferred embodiment of the present application;
fig. 11 is a schematic flow chart illustrating a method for manufacturing an array substrate according to another preferred embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An embodiment of the present application provides an array substrate, which is applied to an organic light emitting diode OLED display panel, as shown in fig. 1 and fig. 2, fig. 1 is a schematic cross-sectional structure diagram of the array substrate, fig. 2 is a schematic cross-sectional structure diagram of a planarization layer 30, a first pixel defining layer 40, an anode layer, a reflective layer, and a second pixel defining layer 50, and the array substrate includes:
a first substrate 10;
a pixel driving film layer 20 on the surface of the first substrate 10;
the flat layer 30 is positioned on one side of the pixel driving film layer 20, which is far away from the first substrate 10;
the first pixel defining layer 40 is positioned on one side, away from the first substrate 10, of the flat layer 30, and the first pixel defining layer 40 is provided with a plurality of pixel grooves;
a reflective layer located on a side of the first pixel defining layer 40 away from the first substrate 10, the reflective layer having a rough surface 70 on a side away from the first substrate 10;
the anode layer is positioned on one side of the reflecting layer, which is far away from the first substrate 10, and the reflecting layer and the anode layer completely cover the pixel groove;
the second pixel defining layer 50 is located at a side of the anode layer facing away from the first substrate 10, and the second pixel defining layer 50 covers at least a surface of the anode layer at a sidewall portion of the pixel recess.
It should be noted that, in the actual manufacturing process, the anode layer and the reflective layer are formed by one etching process, so the shapes of the anode layer and the reflective layer are completely the same, and in fig. 2, the anode layer and the reflective layer are denoted by reference numeral 60.
An embodiment of the invention provides a specific structure of a pixel driving film 20 as shown in fig. 3, where fig. 3 is a schematic structural diagram of the pixel driving film 20, and the pixel driving film 20 includes:
a plurality of gate lines 22 arranged in a first direction on a surface of the first substrate 10, a plurality of data lines 21 arranged in a second direction, and display sub-pixels 23(Thin film transistors, TFTs) arranged in a region defined by the gate lines 22 and the data lines 21, the first direction crossing the second direction, wherein a gate G of each TFT is connected to the gate line 22, a source S of each TFT is connected to the data line 21, and a drain D of each TFT is electrically connected to an anode of its corresponding display sub-pixel 23; in the display process, the thin film transistor supplies a data display signal inputted from the data line 21 to the display sub-pixel 23 corresponding to the thin film transistor under the control of the gate line 22.
In this embodiment, the plurality of pixel grooves of the pixel defining layer are used for disposing the display sub-pixels 23 of the OLED display panel, and the drain D of the thin film transistor is electrically connected to the anodes of the display sub-pixels 23 through the pixel grooves and the pixel electrodes.
It should be noted that the thin film transistor may be a top gate thin film transistor or a bottom gate thin film transistor, which is not limited in the present invention and is determined according to the actual situation. The top gate and the bottom gate are determined by the position of the gate G of the thin film transistor relative to the active layer (or called channel region), that is: relative to the first substrate 10, when the gate G is close to the first substrate 10 and the active layer is far from the first substrate 10, the thin film transistor is a bottom gate thin film transistor, and when the gate G is far from the first substrate 10 and the active layer is close to the first substrate 10, the thin film transistor is a top gate thin film transistor.
The structure of the bottom gate thin film transistor will be described below by taking the bottom gate thin film transistor as an example, and referring to fig. 4, fig. 4 is a schematic structural diagram of a bottom gate thin film transistor according to an embodiment of the present invention; in fig. 4, the active layer CR is located on a side of the gate G of the thin film transistor, which is far from the first substrate 10, and between the source S and the drain D of the thin film transistor, the active layer CR is made of a semiconductor material, and the semiconductor material is amorphous silicon, low-temperature polysilicon, metal oxide or low-temperature polycrystalline oxide; a gate insulating layer GI is disposed between the active layer CR and the gate electrode G, and the active layer CR is disposed right above the gate electrode G, that is, a projection of the active layer CR on the first substrate 10 covers a projection of the gate electrode G on the first substrate 10, wherein the gate insulating layer GI may be a silicon nitride layer or a silicon oxide layer, and a buffer layer BF is disposed between the gate electrode G of the thin film transistor and the first substrate 10.
In addition, the array substrate shown in fig. 3 further includes a data driving circuit 24 and a gate driving circuit 25. The data driving circuit 24 is connected to the data line 21, and the data driving circuit 24 is configured to input a data display signal to the display pixel 23 through the data line 21 in a display stage to control the display panel to perform display; the gate driving circuit 25 is connected to the gate lines 22 and is used for providing scanning signals to the thin film transistors through the gate lines 22 during the display period to control the thin film transistors to be turned on or off.
On the basis of the above embodiment, in one embodiment of the present application, the roughness Rz of the rough surface 70 of the reflective layer is greater than or equal to 1 nm.
It should be noted that, in the present embodiment, the roughness of the rough surface 70 of the reflective layer is limited, and in general, when the roughness Rz of the rough surface 70 of the reflective layer is more than 1nm, the reflective layer does not perform mirror reflection on the ambient light, thereby avoiding the phenomenon of glare. The rough surface 70 of the reflective layer is quantitatively described by the roughness Rz in the embodiment of the present application, and the roughness Ra or the roughness Ry can be converted to limit the roughness of the rough surface 70 of the reflective layer. In one embodiment of the present application, the roughness Rz of the rough surface 70 of the reflective layer is 5nm, and in another embodiment of the present application, the roughness Rz of the rough surface 70 of the reflective layer is 10 nm. The specific value of the roughness of the rough surface 70 of the reflective layer is not limited in the present application, and is determined according to the actual situation.
In the embodiment, when the roughness Rz of the rough surface 70 of the reflective layer is greater than or equal to 1nm, only diffuse reflection is formed for the ambient light, and no specular reflection is formed, so that the glare problem of the OLED display panel using the array substrate is avoided.
In another embodiment of the present application, the first pixel defining layer 40 and the planarization layer 30 are made of the same material.
It should be noted that, the first pixel defining layer 40 made of the same material as the planarization layer 30 may avoid the influence of other photosensitive materials on the planarization layer 30, and in addition, when the first pixel defining layer 40 and the planarization layer 30 are made of the same material, the first pixel defining layer 40 and the planarization layer 30 may be made simultaneously, and then the first pixel defining layer 40 may be formed by performing exposure and development using a halftone mask. However, in other embodiments of the present application, the first pixel defining layer 40 may also be made of other types of photosensitive materials, and the present application does not limit the type of the material specifically used for the first pixel defining layer 40, which is determined according to the actual situation.
On the basis of the above embodiment, in a further embodiment of the present application, the reflective layer is a metal layer having a rough surface.
In this embodiment, the reflective layer is formed by forming a metal layer on the surface of the first pixel defining layer 40, and then roughening the metal layer to form a rough surface 70 of the reflective layer. However, in another embodiment of the present application, as shown in fig. 5, fig. 5 is a schematic cross-sectional structure diagram of the planarization layer 30, the first pixel defining layer 40, the second pixel defining layer 50, the reflective layer and the anode layer, in this embodiment, a surface of the pixel groove facing away from the first substrate 10 has a rough surface 41, so that after a metal layer is formed on the surface of the pixel groove, the metal layer can have a rough surface 70. This is because the metal layer formed is generally thin, typically around 170nm, so that the metal layer covering the pixel recesses with rough surface 41 directly presents rough surface 70. The application is not limited to the specific formation of the rough surface 70 of the reflective layer, which is determined by the actual situation.
It should be noted that the roughness value of the rough surface 41 of the pixel groove is greater than or equal to the roughness value of the rough surface 70 of the reflective layer; preferably, however, the roughness value of the rough surface 41 of the pixel groove is greater than the roughness value of the rough surface 70 of the reflective layer, so as to ensure that the rough surface 70 directly presented by the reflective layer directly prepared on the surface of the pixel groove has sufficient roughness, thereby preventing the reflective layer from generating mirror reflection on light, and further preventing the glare problem of the OLED display panel using the array substrate.
On the basis of the above embodiments, in a specific embodiment of the present application, the array substrate further includes:
the light-emitting material layer is positioned on the surface of one side, away from the first substrate 10, of the anode layer;
a cathode layer on the side of the light-emitting material layer facing away from the first substrate 10;
the anode layer includes a plurality of anodes arranged in an array, the light emitting material layer includes a plurality of light emitting structures corresponding to the plurality of anodes one to one, and the cathode layer, the plurality of anodes, and the plurality of light emitting structures constitute a plurality of display sub-pixels 23.
It should be noted that the plurality of display sub-pixels 23 include a plurality of first sub-pixels, a plurality of second sub-pixels, and a plurality of third sub-pixels, wherein the first sub-pixels, the second sub-pixels, and the third sub-pixels may respectively correspond to one of red light emitting sub-pixels, green light emitting sub-pixels, and blue light emitting sub-pixels, and the specific corresponding relationship thereof is not limited herein. The plurality of display sub-pixels 23 constitute a plurality of display pixels, wherein each display pixel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel.
It should be noted that the second pixel defining layer 50 covering the anode layer on the sidewall of the pixel groove is used to prevent the occurrence of short circuit caused by the electrical connection between each layer of the display sub-pixel 23 and the reflective layer or the anode layer.
Correspondingly, an embodiment of the present application further provides a method for manufacturing an array substrate, as shown in fig. 6, fig. 6 is a schematic flow chart of the method for manufacturing an array substrate, and the method includes the following steps:
a first substrate 10 is provided.
A pixel driving film layer 20 and a planarization layer 30 are sequentially formed on a surface of the first substrate 10.
A first pixel defining layer 40 having a plurality of pixel recesses is formed on a surface of the planarization layer 30 facing away from the first substrate 10.
A reflective layer having a rough surface 70 is formed on a surface of the first pixel defining layer 40 facing away from the first substrate 10.
An anode layer is formed on the side of the reflective layer facing away from the first substrate 10, and the reflective layer and the anode layer are etched, so that the etched reflective layer and the etched anode layer completely cover the pixel groove.
A second pixel defining layer 50 is formed on a surface of the anode layer facing away from the first substrate 10, and the second pixel defining layer 50 covers at least a surface of the anode layer on a sidewall portion of the pixel recess.
It should be noted that the first substrate 10 may be a flexible plastic substrate, a glass substrate, or a quartz substrate, and the specific type of the first substrate 10 is not limited in the present invention, which is determined by the actual situation.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a pixel driving film 20, where the pixel driving film 20 includes:
a plurality of gate lines 22 arranged in a first direction on a surface of the first substrate 1010, a plurality of data lines 21 arranged in a second direction, and display sub-pixels 23(Thin film transistors, TFTs) arranged in a region defined by the gate lines 22 and the data lines 21, the first direction crossing the second direction, wherein a gate G of each TFT is connected to the gate line 22, a source S of each TFT is connected to the data line 21, and a drain D of each TFT is electrically connected to an anode of its corresponding display sub-pixel 23; in the display process, the thin film transistor supplies a data display signal inputted from the data line 21 to the display sub-pixel 23 corresponding to the thin film transistor under the control of the gate line 22.
In this embodiment, the plurality of pixel grooves of the pixel defining layer are used for disposing the display sub-pixels 23 of the OLED display panel, and the drain D of the thin film transistor is electrically connected to the anodes of the display sub-pixels 23 through the pixel grooves and the pixel electrodes.
It should be noted that the thin film transistor may be a top gate thin film transistor or a bottom gate thin film transistor, which is not limited in the present invention and is determined according to the actual situation. The top gate and the bottom gate are determined by the position of the gate G of the thin film transistor relative to the active layer (or called channel region), that is: relative to the first substrate 10, when the gate G is close to the first substrate 10 and the active layer is far from the first substrate 10, the thin film transistor is a bottom gate thin film transistor, and when the gate G is far from the first substrate 10 and the active layer is close to the first substrate 10, the thin film transistor is a top gate thin film transistor.
The structure of the bottom gate thin film transistor will be described below by taking the bottom gate thin film transistor as an example, and referring to fig. 4, fig. 4 is a schematic structural diagram of a bottom gate thin film transistor according to an embodiment of the present invention; in fig. 4, the active layer CR is located on a side of the gate G of the thin film transistor, which is far from the first substrate 10, and between the source S and the drain D of the thin film transistor, the active layer CR is made of a semiconductor material, and the semiconductor material is amorphous silicon, low-temperature polysilicon, metal oxide or low-temperature polycrystalline oxide; a gate insulating layer GI is disposed between the active layer CR and the gate electrode G, and the active layer CR is disposed right above the gate electrode G, that is, a projection of the active layer CR on the first substrate 10 covers a projection of the gate electrode G on the first substrate 10, wherein the gate insulating layer GI may be a silicon nitride layer or a silicon oxide layer, and a buffer layer BF is disposed between the gate electrode G of the thin film transistor and the first substrate 10.
In addition, the array substrate shown in fig. 3 further includes a data driving circuit 24 and a gate driving circuit 25. The data driving circuit 24 is connected to the data line 21, and the data driving circuit 24 is configured to input a data display signal to the display pixel 23 through the data line 21 in a display stage to control the display panel to perform display; the gate driving circuit 25 is connected to the gate lines 22 and is used for providing scanning signals to the thin film transistors through the gate lines 22 during the display period to control the thin film transistors to be turned on or off.
It should be further noted that the plurality of pixel recesses of the first pixel defining layer 40 are used for disposing the display sub-pixels of the OLED display panel, and the drain of the thin film transistor is electrically connected to the anode of the display sub-pixel through the pixel recess and the pixel electrode.
The reflection layer completely covering the pixel groove can enable the emission light of the display sub-pixels of the OLED display panel to be reflected for multiple times on the bottom surface of the pixel groove and the surface of the reflection layer on the side wall until the emission light is emitted from the pixel groove and cannot be absorbed by the first pixel defining layer 40, and therefore the utilization efficiency of the emission light of the display sub-pixels is improved.
The second pixel defining layer 50 covering the anode layer on the sidewall portion of the pixel recess is used to prevent the occurrence of short circuit caused by the electrical connection between each layer of the display sub-pixels and the reflective layer or the anode layer.
On the basis of the above embodiment, in one embodiment of the present application, the roughness Rz of the rough surface 70 of the reflective layer is greater than or equal to 1 nm.
It should be noted that, in the present embodiment, the roughness of the rough surface 70 of the reflective layer is limited, and in general, when the roughness Rz of the rough surface 70 of the reflective layer is more than 1nm, the reflective layer does not perform mirror reflection on the ambient light, thereby avoiding the phenomenon of glare. The rough surface 70 of the reflective layer is quantitatively described by the roughness Rz in the embodiment of the present application, and the roughness Ra or the roughness Ry can be converted to limit the roughness of the rough surface 70 of the reflective layer. In one embodiment of the present application, the roughness Rz of the rough surface 70 of the reflective layer is 5nm, and in another embodiment of the present application, the roughness Rz of the rough surface 70 of the reflective layer is 10 nm. The specific value of the roughness of the rough surface 70 of the reflective layer is not limited in the present application, and is determined according to the actual situation.
In the embodiment, when the roughness Rz of the rough surface 70 of the reflective layer is greater than or equal to 1nm, the diffuse reflection of the ambient light is greatly reduced, and the specular reflection is reduced, so that the glare problem of the OLED display panel using the array substrate is effectively improved.
On the basis of the above embodiments, in an embodiment of the present application, referring to fig. 7, fig. 7 is a schematic flowchart of a method for manufacturing an array substrate, and forming a first pixel defining layer 40 having a plurality of pixel recesses on a surface of the planarization layer 30 facing away from the first substrate 10 includes:
forming a photosensitive material layer on the surface of the flat layer 30 on the side away from the first substrate 10;
the photosensitive material layer is exposed by using a mask plate, and the exposed photosensitive material layer is developed to form a first pixel defining layer 40 having a plurality of pixel grooves.
Preferably, the forming of the photosensitive material layer on the surface of the planarization layer 30 facing away from the first substrate 10 includes:
a photosensitive material layer with the same material as the planarization layer 30 is formed on the surface of the planarization layer 30 opposite to the first substrate 10.
It should be noted that, the first pixel defining layer 40 made of the same material as the planarization layer 30 may avoid the influence of other photosensitive materials on the planarization layer 30, and in addition, when the first pixel defining layer 40 and the planarization layer 30 are made of the same material, the first pixel defining layer 40 and the planarization layer 30 may be made simultaneously, and then the first pixel defining layer 40 may be formed by performing exposure and development using a halftone mask. However, in other embodiments of the present application, the first pixel defining layer 40 may also be made of other types of photosensitive materials, and the present application does not limit the type of the material specifically used for the first pixel defining layer 40, which is determined according to the actual situation.
Specifically, referring to fig. 8, fig. 8 is a schematic flow chart of a manufacturing method of an array substrate, in other embodiments of the present application, forming a first pixel defining layer 40 having a plurality of pixel grooves on a surface of the planarization layer 30 facing away from the first substrate 10 is implemented by:
arranging a half-tone mask plate on the surface of one side, away from the first substrate 10, of the flat layer 30;
the flat layer 30 is exposed by using a half-tone mask, and the exposed flat layer 30 is developed to form a first pixel defining layer 40 having a plurality of pixel grooves.
The present application is not limited to the specific manner of forming the first pixel defining layer 40, which is determined by the actual situation.
On the basis of the above embodiments, referring to fig. 9, fig. 9 is a schematic flow chart of a manufacturing method of an array substrate, and an embodiment of the present application provides a method for forming a reflective layer having a rough surface 70 on a surface of a first pixel defining layer 40 facing away from a first substrate 10, including:
forming a reflective layer on a surface of the first pixel defining layer 40 facing away from the first substrate 10;
the surface of the reflective layer facing away from the first substrate 10 is roughened.
However, in other embodiments of the present application, referring to fig. 10, fig. 10 is a schematic flow chart of a manufacturing method of an array substrate, and the forming of the reflective layer having the rough surface 70 on the surface of the first pixel defining layer 40 facing away from the first substrate 10 can also be implemented by the following method, which specifically includes:
roughening the surface of the first pixel defining layers 40 on the side away from the first substrate 10;
a reflective layer is formed on the surface of the roughened first pixel defining layer 40 facing away from the first substrate 10.
As shown in fig. 5, fig. 5 is a schematic cross-sectional structure diagram of the planarization layer 30, the first pixel defining layer 40, the second pixel defining layer 50, the reflective layer and the anode layer, in this embodiment, a surface of the pixel groove facing away from the first substrate 10 has a rough surface 41, so that after a metal layer is formed on the surface of the pixel groove, the metal layer can have a rough surface 70. This is because the metal layer formed is generally thin, typically around 170nm, so that the metal layer covering the pixel recesses with rough surface 41 directly presents rough surface 70. The application is not limited to the specific formation of the rough surface 70 of the reflective layer, which is determined by the actual situation.
It should be noted that the roughness value of the rough surface 41 of the pixel groove is greater than or equal to the roughness value of the rough surface 70 of the reflective layer; preferably, however, the roughness value of the rough surface 41 of the pixel groove is greater than the roughness value of the rough surface 70 of the reflective layer, so as to ensure that the rough surface 70 directly presented by the reflective layer directly prepared on the surface of the pixel groove has sufficient roughness, thereby preventing the reflective layer from generating mirror reflection on light, and further preventing the glare problem of the OLED display panel using the array substrate.
On the basis of the above embodiment, in another specific embodiment of the present application, the anode layer includes a plurality of anodes arranged in an array; referring to fig. 11, fig. 11 is a schematic flow chart of a method for manufacturing an array substrate, after forming a second pixel defining layer 50 on a surface of the anode layer facing away from the first substrate 10, the method further includes:
forming a light-emitting material layer on the surface of the anode layer on the side away from the first substrate 10, wherein the light-emitting material layer comprises a plurality of light-emitting structures corresponding to the plurality of anodes one by one;
a cathode layer is formed on the surface of the light-emitting material layer on the side away from the first substrate 10, and the cathode layer, the plurality of anodes and the plurality of light-emitting structures form a plurality of display sub-pixels.
It should be noted that the plurality of display sub-pixels include a plurality of first sub-pixels, second sub-pixels, and third sub-pixels, wherein the first sub-pixels, the second sub-pixels, and the third sub-pixels may respectively correspond to one of red light emitting sub-pixels, green light emitting sub-pixels, and blue light emitting sub-pixels, and a specific corresponding relationship thereof is not limited herein. The plurality of display sub-pixels constitute a plurality of display pixels, wherein each display pixel includes a first sub-pixel, a second sub-pixel, and a third sub-pixel.
Correspondingly, the embodiment of the present application further provides an OLED display panel, including: the array substrate comprises a counter substrate and an array substrate which are oppositely arranged, wherein the array substrate is the array substrate of any one embodiment.
Correspondingly, the embodiment of the application also provides a display device, which comprises at least one OLED display panel as the embodiment.
To sum up, the embodiment of the present application provides an OLED display panel, a display device, an array substrate and a method for manufacturing the same, wherein a first pixel defining layer 40 of the array substrate has a plurality of pixel grooves, and a reflective layer is located on a side of the first pixel defining layer 40 away from a first substrate 10 and completely covers the pixel grooves, so that emitted light of display sub-pixels of the OLED display panel can be reflected for multiple times on the bottom surfaces of the pixel grooves and the reflective layer surfaces of the side walls until the emitted light exits from the pixel grooves, and cannot be absorbed by the first pixel defining layer 40, thereby improving utilization efficiency of emitted light of the display sub-pixels; in addition, the rough surface 70 is arranged on the side of the reflection layer departing from the first substrate 10, and incident ambient light cannot form mirror reflection through the reflection layer, so that the glare problem cannot occur, the problem of absorbing emergent light of the display sub-pixels caused by solving the glare problem by adopting a linear polarizer is avoided, the light emitting efficiency of the display sub-pixels of the OLED display panel applying the array substrate is improved, the flexure resistance of the OLED display panel is improved, and the OLED display panel can be applied to a flexible display device.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (15)

1. An array substrate applied to an organic electroluminescent diode (OLED) display panel, the array substrate comprising:
a first substrate;
the pixel driving film layer is positioned on the surface of the first substrate;
the flat layer is positioned on one side, away from the first substrate, of the pixel driving film layer;
the first pixel defining layer is positioned on one side, away from the first substrate, of the flat layer and is provided with a plurality of pixel grooves;
the reflecting layer is positioned on one side, away from the first substrate, of the first pixel defining layer, and a rough surface is arranged on one side, away from the first substrate, of the reflecting layer;
the anode layer is positioned on one side of the reflecting layer, which is far away from the first substrate, and the reflecting layer and the anode layer completely cover the pixel groove;
the second pixel defining layer is positioned on one side of the anode layer, which is far away from the first substrate, and at least covers the surface of the anode layer on the side wall part of the pixel groove;
the surface of one side of the pixel groove, which is far away from the first substrate, is provided with a rough surface.
2. The array substrate of claim 1, wherein the roughness Rz of the rough surface of the reflective layer is greater than or equal to 1 nm.
3. The array substrate of claim 1, wherein the first pixel defining layer and the planarization layer are made of the same material.
4. The array substrate of claim 1, wherein the reflective layer is a metal layer with a rough surface.
5. The array substrate of claim 1, wherein the pixel driving film layer comprises: the display device comprises a plurality of gate lines arranged along a first direction on the surface of a first substrate, a plurality of data lines arranged along a second direction and thin film transistors arranged in the limited areas of the gate lines and the data lines, wherein the first direction and the second direction are crossed, and the drain electrode of each thin film transistor is electrically connected with the anode electrode of the corresponding display sub-pixel.
6. The array substrate of claim 1, further comprising:
the light-emitting material layer is positioned on the surface of one side, away from the first substrate, of the anode layer;
the cathode layer is positioned on one side, away from the first substrate, of the light-emitting material layer;
the anode layer comprises a plurality of anodes arranged in an array, the light-emitting material layer comprises a plurality of light-emitting structures which are in one-to-one correspondence with the anodes, and the cathode layer, the anodes and the light-emitting structures form a plurality of display sub-pixels.
7. A manufacturing method of an array substrate is characterized by comprising the following steps:
providing a first substrate;
sequentially forming a pixel driving film layer and a flat layer on the surface of the first substrate;
forming a first pixel defining layer with a plurality of pixel grooves on the surface of one side, away from the first substrate, of the flat layer, wherein the surface of one side, away from the first substrate, of the pixel grooves is provided with a rough surface;
forming a reflecting layer with a rough surface on the surface of one side, which is far away from the first substrate, of the first pixel defining layer;
forming an anode layer on one side of the reflecting layer, which is far away from the first substrate, etching the reflecting layer and the anode layer, wherein the etched reflecting layer and the anode layer completely cover the pixel groove;
and forming a second pixel defining layer on the surface of one side of the anode layer, which is far away from the first substrate, wherein the second pixel defining layer at least covers the surface of the anode layer on the side wall part of the pixel groove.
8. The method for manufacturing the array substrate according to claim 7, wherein the forming of the first pixel defining layer having the plurality of pixel grooves on the surface of the planarization layer on the side away from the first substrate comprises:
forming a photosensitive material layer on the surface of one side, away from the first substrate, of the flat layer;
and exposing the photosensitive material layer by using a mask plate, and developing the exposed photosensitive material layer to form a first pixel defining layer with a plurality of pixel grooves.
9. The method for manufacturing the array substrate according to claim 8, wherein the forming of the photosensitive material layer on the surface of the planarization layer on the side away from the first substrate comprises:
and forming a photosensitive material layer with the same material as the flat layer on the surface of one side of the flat layer, which is far away from the first substrate.
10. The method for manufacturing the array substrate according to claim 7, wherein the forming of the first pixel defining layer having the plurality of pixel grooves on the surface of the planarization layer on the side away from the first substrate comprises:
arranging a half-tone mask plate on the surface of one side, away from the first substrate, of the flat layer;
and exposing the flat layer by using the half-tone mask plate, and developing the exposed flat layer to form a first pixel definition layer with a plurality of pixel grooves.
11. The method for manufacturing the array substrate according to claim 7, wherein the forming of the reflective layer having a rough surface on the surface of the first pixel defining layer facing away from the first substrate includes:
carrying out roughening treatment on the surface of one side, away from the first substrate, of the first pixel definition layers;
and forming a reflecting layer on the surface of the first pixel defining layer subjected to the roughening treatment, which is far away from the first substrate.
12. The method for manufacturing the array substrate according to claim 7, wherein the forming of the reflective layer having a rough surface on the surface of the first pixel defining layer facing away from the first substrate includes:
forming a reflecting layer on the surface of one side, away from the first substrate, of the first pixel defining layer;
and carrying out roughening treatment on the surface of one side, which is far away from the first substrate, of the reflecting layer.
13. The method for manufacturing the array substrate according to claim 7, wherein the anode layer comprises a plurality of anodes arranged in an array;
the method further comprises the following steps after a second pixel definition layer is formed on the surface of the anode layer, which faces away from the first substrate:
forming a light-emitting material layer on the surface of one side, away from the first substrate, of the anode layer, wherein the light-emitting material layer comprises a plurality of light-emitting structures which correspond to the plurality of anodes one to one;
and forming a cathode layer on the surface of the light-emitting material layer on the side opposite to the first substrate, wherein the cathode layer, the plurality of anodes and the plurality of light-emitting structures form a plurality of display sub-pixels.
14. An OLED display panel, comprising: an opposite substrate and an array substrate oppositely arranged, wherein the array substrate is the array substrate of any one of claims 1 to 6.
15. A display device comprising at least one OLED display panel as claimed in claim 14.
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