CN106444950A - Low dropout linear regulator with wide withdraw voltage range, chip and communication terminal - Google Patents
Low dropout linear regulator with wide withdraw voltage range, chip and communication terminal Download PDFInfo
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- CN106444950A CN106444950A CN201610517855.0A CN201610517855A CN106444950A CN 106444950 A CN106444950 A CN 106444950A CN 201610517855 A CN201610517855 A CN 201610517855A CN 106444950 A CN106444950 A CN 106444950A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
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Abstract
The invention discloses a low dropout linear regulator with a wide withdraw voltage range, a chip and a communication terminal. The low dropout linear regulator comprises an error amplifier, an adjustment transistor, a feedback circuit, a dynamic voltage divider and a dynamic voltage divider control circuit; the dynamic voltage divider control circuit is connected with the dynamic voltage divider and supplies bias voltage to the dynamic voltage divider; the dynamic voltage divider is arranged between an input transistor and a load transistor of the error amplifier; the bias voltage changes along with changing of power supply voltage, so that voltage borne by the dynamic voltage divider changes correspondingly, and then it is guaranteed that the transistors in the error amplifier work in a nominal voltage range. Accordingly, partial voltage of the dynamic voltage divider can be automatically changed along with changing of the power supply voltage, it is guaranteed that voltage differences of ports of each transistor do not exceed a self process nominal voltage value, and then the low drop linear regulator can be applied in the wide input voltage range.
Description
Technical field
The present invention relates to the low pressure difference linear voltage regulator of the pressure scope of a kind of width, also relate to use this low pressure difference linearity
The IC chip of voltage-stablizer and corresponding communication terminal, belong to technical field of integrated circuits.
Background technology
As the corresponding chip size of integrated circuit technology is less and less, pressure grade is more and more lower.But existing
In the electric power system of communication terminal, supply voltage maintains in a relative broad range mostly, and this is used in high voltage environment with regard to correspondence
In low pressure process device bring huge challenge.Low pressure process device is directly connected in high voltage environment, it is easy to cause device
The problem such as part punctures, burn, has a strong impact on the properly functioning of IC chip and respective communication terminal.
As the important component part of power management class chip, low pressure difference linear voltage regulator (low dropout
Regulator, referred to as LDO) because having the advantage such as low noise, low cost, obtain more next in mobile terminals
It more is widely applied.Low pressure difference linear voltage regulator, typically can be directly as the supplier of communication terminal internal module constant voltage
It is connected to supply voltage, with the rising of supply voltage, transistor terminal voltage difference can be made to exceed the pressure of himself technique nominal
Value, makes device face the danger burning out.Therefore, making each device be operated in less than nominal withstand voltage by appropriate design is very
Necessary.
Applicant, in the Chinese invention patent of Patent No. ZL 201510086281.1, proposes a kind of wide pressure scope
Self-adaptive low-voltage difference linear constant voltage regulator, including supply voltage tracker, voltage current adapter, error amplifier, current mirror
Circuit and dynamic divider；Supply voltage tracker one end connects supply voltage, and one end connects voltage current adapter, voltage
Current converter connects current mirror input, and the output of current mirroring circuit connects two input FETs in error amplifier
Source electrode；In error amplifier, the source electrode of two load FETs connects supply voltage；Each input FET and its phase
Dynamic divider is connected between the load FET answered.In this technical scheme, change with supply voltage and automatically change
The bias condition of device, and then ensure that voltage difference between each device interface, without departing from self technique nominal voltage, finally makes
Product can apply to exceed in the system of nominal supply voltage or chip.
Content of the invention
Primary technical problem to be solved by this invention is to provide the low pressure difference linear voltage regulator of the pressure scope of a kind of width.
Another technical problem to be solved by this invention is to provide and a kind of uses the integrated of this low pressure difference linear voltage regulator
Circuit chip and corresponding communication terminal.
For achieving the above object, the present invention uses following technical scheme：
First aspect according to embodiments of the present invention, provides the low pressure difference linear voltage regulator of the pressure scope of a kind of width, including
Error amplifier, adjustment pipe and feedback circuit, also include dynamic divider and dynamic divider control circuit；
Described dynamic divider control circuit connects described dynamic divider, provides biased electrical for described dynamic divider
Pressure；Described dynamic divider is arranged between input transistors and the load transistor of described error amplifier；
Described bias voltage changes with the variation of supply voltage, makes the voltage that described dynamic divider is undertaken
Respective change, and then in the range of the transistor ensureing in described error amplifier is operated in nominal voltage.
Wherein more preferably, current mirroring circuit is also included；Described current mirroring circuit be arranged on described error amplifier with described
Between dynamic divider control circuit, for providing bias current for described error amplifier.
Wherein more preferably, one end of described dynamic divider connects the drain electrode of described input transistors, and the other end connects institute
State the drain electrode of load transistor.
Wherein more preferably, the source electrode of described input transistors connects the output of current mirroring circuit, described load transistor
Source electrode connect supply voltage.
Wherein more preferably, described dynamic divider control circuit is by the realization in series with a resistor of multiple metal-oxide-semiconductors.
Wherein more preferably, the pressure voltage of described low pressure difference linear voltage regulator by the resistance parameter value of described dynamic divider with
Current mirroring circuit provides the product of the mirror image multiple of electric current to determine.
Wherein more preferably, described dynamic divider is realized by resistance and metal-oxide-semiconductor are in parallel.
Wherein more preferably, in the case that supply voltage is relatively low, the resistance parameter value of described dynamic divider is by described MOS
The conducting resistance of pipe determines；In the case that supply voltage is higher, the resistance parameter value of described dynamic divider is by described resistance
Determine.
Second aspect according to embodiments of the present invention, provides a kind of IC chip, includes above-mentioned in described chip
Low pressure difference linear voltage regulator.
The third aspect according to embodiments of the present invention, provides a kind of communication terminal, includes above-mentioned in described communication terminal
Low pressure difference linear voltage regulator.
Compared with prior art, low pressure difference linear voltage regulator provided by the present invention can be with the change of supply voltage
Automatically the dividing potential drop of dynamic divider is changed, it is ensured that between each port of each transistor, voltage difference is less than self technique nominal electricity
Pressure value such that it is able to apply in wider input voltage range, quiescent current will not be with the change of supply voltage simultaneously
Change.
Brief description
The circuit theory diagrams of the low pressure difference linear voltage regulator that Fig. 1 is provided by embodiments of the invention 1；
The circuit theory diagrams of the low pressure difference linear voltage regulator that Fig. 2 is provided by embodiments of the invention 2；
Fig. 3 is the block diagram of a kind of communication terminal according to exemplary embodiment.
Detailed description of the invention
Carry out detailed specific description with the technology contents to the present invention for the specific embodiment below in conjunction with the accompanying drawings.
As it is shown in figure 1, in the low pressure difference linear voltage regulator that embodiments of the invention 1 are provided, including dynamic divider
Control circuit the 101st, current mirroring circuit the 102nd, error amplifier the 103rd, feedback circuit 105 and dynamic divider 201A, 201B.Its
In, the 103rd, error amplifier adjusts pipe M7 (107) and feedback circuit 105 forms the low pressure difference linear voltage regulator of a basic model,
Its input signal is controlled by reference voltage V ref.In one embodiment of the invention, adjusting pipe M7 is PMOS.Feedback circuit
105 are made up of resistance R1 and R2 connecting.Current mirroring circuit 102 is arranged on dynamic divider control circuit 101 and error is amplified
Between device 103, its output connects the source class of two input transistors in error amplifier 103, is used for as error amplifier 103
Bias current is provided.One end of dynamic divider control circuit 101 connects current mirroring circuit 102, and the other end connects error and amplifies
Device 103, connects two dynamic divider 201A, 201B simultaneously respectively, is used for controlling the actual resistance of dynamic divider.The two
Dynamic divider 201A, 201B embed inside the circuit of error amplifier 103.
In the embodiment 1 shown in Fig. 1, current mirroring circuit 102 can use simplest circuit structure to realize, including two
NMOS tube M1 of individual grid docking and M2.Wherein, the grid of NMOS tube M1 is connected with drain electrode, and it is defeated that drain electrode is connected to reference current
Enter end, source ground；The drain electrode of NMOS tube M2 connects the source electrode of two input transistors M5 and M6 in error amplifier 103, source
Pole is grounded.Certainly, in other embodiments of the invention, current mirroring circuit 102 can also use the formation in parallel of multiple NMOS tube.
This is the routine techniques means that those skilled in the art generally grasp, and does not just specifically illustrate at this.
The effect of error amplifier 103 is to amplify the difference of two input signals of output.In the embodiment 1 shown in Fig. 1
In, the input transistors of error amplifier 103 uses NMOS tube M5 and M6, and load transistor uses PMOS M3 and M4.Wherein,
The source electrode of two input transistors M5 with M6 is connected, and drain electrode connects dynamic divider one end respectively；Two load transistor M3 and
The source electrode of M4 is connected, and connects at supply voltage VDD.The drain electrode of load transistor M3 is connected to dynamic divider 201A one end,
The drain electrode of load transistor M4 is connected to dynamic divider 201B one end, and as the output of error amplifier 103 and tune
The grid of homogeneous tube M7 is connected.
In the embodiment 1 shown in Fig. 1, one end of two dynamic divider 201A, 201B is connected respectively to error and amplifies
The drain electrode of two input transistors (M5, M6) of device 103, the other end is connected respectively to two load crystalline substances of error amplifier 103
The drain electrode of body pipe (the corresponding M4 of M5 corresponding M3, M6).The partial pressure value that the two dynamic divider 201A and 201B is undertaken depends on
The electric current self flowing through and the resistance of self, and I_tail is a fixed current.Therefore, dynamic divider 201A and 201B
Partial pressure value is proportional to self resistance, and i.e. dynamic divider 201A and 201B can dynamically assume responsibility for supply voltage VDD and apply
In the pressure drop of error amplifier 103 so that in error amplifier 103 all transistors different port between voltage difference maintain
In the range of the rated operational voltage of safety.
Fig. 2 is the circuit theory diagrams of the embodiment 2 of low pressure difference linear voltage regulator provided by the present invention.In this embodiment 2
In, also include dynamic divider control circuit the 101st, current mirroring circuit the 102nd, error amplifier the 103rd, feedback circuit 105 and dynamic
Divider 201A, 201B etc., its integrated connection mode and operation principle are basically identical with embodiment 1, are not just described in detail at this
?.
In example 2, dynamic divider control circuit 101 uses multiple metal-oxide-semiconductor (M8～M12) to connect with resistance R3
Implementation.Dynamic divider 201A, 201B are also adopted by resistance (R4 and the R5) reality in parallel with corresponding NMOS tube (N1 and N2)
Existing mode.In dynamic divider 201A, 201B, corresponding metal-oxide-semiconductor grid voltage by dynamic divider control circuit by drawing
Pin 302 provides.Dynamic divider control circuit 101 is amplified to following the error that supply voltage VDD changes by pin 301
The drain voltage of the load transistor M3 of device 103 is sampled.In dynamic divider control circuit 101, one end of resistance R3
Receiving supply voltage VDD, the other end connects the source electrode of PMOS M8, and PMOS M8 is connected with the grid of NMOS tube M9, and with
The drain electrode of load transistor M3 and grid connect, and the grid of NMOS tube M10 is connected with source electrode, and the source electrode phase with NMOS tube M9
Even, the grid of NMOS tube M11 is connected with source electrode, and is connected with the source electrode of NMOS tube M10, and the grid of NMOS tube M12 is with source electrode even
Connect, and be connected with the source electrode of NMOS tube M11.Above-mentioned NMOS tube M10, the effect of M11 and M12 are to carry out supply voltage VDD
Dividing potential drop, it is ensured that in dynamic divider control circuit 101, all transistors are operated in the range of nominal tension.
Compared with prior art, low pressure difference linear voltage regulator provided by the present invention is at existing low pressure difference linear voltage regulator
Basic circuit (mainly the 103rd, error amplifier being adjusted pipe M7 (107) and feedback circuit 105 forms) on the basis of add
The dynamic divider that can automatically adjust under different electrical power voltage and dynamic divider control circuit.Wherein, dynamic divider
Control circuit one end is connected to supply voltage, and one end is connected to ground, is used for controlling the resistance of dynamic divider.Dynamic divider one
End is connected to the drain electrode of the input transistors of error amplifier, and one end is connected to the drain electrode of the load transistor of error amplifier,
It is for undertaking the pressure drop that supply voltage is applied to error amplifier.In error amplifier, the source electrode of two load transistors
Connecting supply voltage, the source electrode of two input transistors connects the output of current mirroring circuit.This current mirroring circuit is that error is put
Big device provides bias current.
When low pressure difference linear voltage regulator is operated, biasing that dynamic divider control circuit provides for dynamic divider
Voltage can change with the change of supply voltage, and dynamic divider be series at the input transistors of error amplifier with
Between load transistor, when supply voltage raises, the voltage that dynamic divider is undertaken increases, and then ensures error amplifier
In all transistors each port between voltage difference maintain the nominal voltage of its technological requirement in the range of.Below by
Concrete sample calculation is launched to describe in detail.
With reference to the circuit theory diagrams of the embodiment 2 shown in Fig. 2, set the reference current of current mirror in example 2 as I_
R, it is assumed that the mirror image multiple of current mirroring circuit is N, i.e. M2 is N times of M1, then I_tail=N*I_r.Error amplifier 103 works
When poised state, two branch currents at two input transistors (M5, M6) places are equal, are I_rail/2, owing to I_r is
Fixed current, therefore, I_tail is also a fixed current.It follows that the two of error amplifier 103 branch currents are solid
Fixed, will not change with supply voltage VDD and change.Now, load transistor M3's drain electrode being connected with grid
Drain voltage (i.e. voltage at pin 301) can occur linear change with supply voltage, and the voltage at pin 301 is permissible
It is expressed as：
V301=VDD-Vsg (M3) (1)
Wherein, Vsg (M3) is the voltage difference with grid for the source electrode of load transistor M3.Load transistor M3 works in saturated
District, therefore its electric current and the relation of voltage can be expressed as：
Wherein, up is hole mobility, and Cox is the gate oxide capacitance of unit area, and Vtp is the unlatching electricity of PMOS
Pressure.
Owing to electric current ID (M3) is fixed value, therefore the source electrode of load transistor M3 and grid voltage difference Vsg (M3) are solid
Definite value, will not change with supply voltage.
In dynamic divider control circuit 101, the source electrode of PMOS M8 with the voltage difference of grid is：
Vsg (M8)=VDD-I101R3-V301 (3)
The voltage difference of source electrode and grid that PMOS M8 is operated in saturation region is represented by：
Can obtain in conjunction with formula (1), formula (3) and formula (4)：
By formula (5) it can be seen that the quiescent current of dynamic divider 201A, 201B will not be with power supply electricity in the present invention
Pressure changes, and may be controlled to a very little numerical value in practice.
In the case that supply voltage VDD is relatively low, the drain voltage (i.e. voltage at pin 301) of load transistor M3 is relatively
Low, metal-oxide-semiconductor M10, M11 and M12 owing to playing dividing potential drop effect also can undertake a part of voltage.Now, dynamic divider 201A,
NMOS tube N1 in 201B, N2 grid voltage higher, corresponding conducting resistance is less, the conducting of the two NMOS tube N1 and N2
Resistance plays main dividing potential drop effect, now the input transistors in error amplifier (M5, M6) and load transistor M3 and M4
Dividing potential drop is very little, enables these transistors to be normally operated in saturation region.
In the case that supply voltage VDD is higher, the grid voltage of PMOS M8 and NMOS tube M9 is (i.e. at pin 301
Voltage) raise, the voltage at pin 302 reduces so that NMOS tube N1 in dynamic divider 201A, 201B, the electric conduction of N2
Resistance is relatively big, and in parallel with R4, R5 respectively carries out dividing potential drop.Supply voltage VDD continues to raise, and the voltage at pin 302 drops further
Low.Now, NMOS tube N1, the conducting resistance of N2 can be far longer than resistance R4, R5 each in parallel, and therefore resistance R4 and R5 plays master
The dividing potential drop effect wanted.The use of resistance R4 and R5, electricity is possible to prevent the conducting resistance of NMOS tube N1, N2 excessive, causes error to put
Big device 103 cannot normally work.
Below the sampling process of resistance R4 and R5 is illustrated.When assuming maximum mains voltage, resistance R4 and R5 plays master
Act on, and R4=R5=R, the voltage that dynamic divider 201A, 201B are undertaken is represented by：
V201=(I_rail/2) * R (6)
In order to make the input of error amplifier 103 mark pipe drain-source voltage Vds_pair less than nominal value V, then need to meet
Formula (7).
Vds_pair≤VMark
(7)
VDDmax-|Vtp|-Vds-V201≤VMark
I.e. (8)
Wherein, Vds is the voltage between tail current source drain electrode and source electrode.
In conjunction with formula (6) and formula (7), substituting into I_tail=N*I_r, available resistance R and N must is fulfilled for public affairs simultaneously
The constraints of formula (9).
N*R≥(VDDmax-|Vrp|-Vds-VMark)/I_r (9)
By formula (9) it can be seen that in the case that reference current I_r gives, it is only necessary to the numerical value changing N*R is just permissible
The maximum pressure voltage that regulation low pressure difference linear voltage regulator can bear.Specifically, low pressure difference linear voltage regulator is the highest pressure
Value is mainly provided the product of the mirror image multiple of electric current to be determined by the resistance parameter value of dynamic divider and current mirroring circuit.
In sum, the low pressure difference linear voltage regulator of the pressure scope of width provided by the present invention can be with supply voltage
Change the partial pressure value automatically adjusting dynamic divider, thus ensure that each transistor is operated in the nominal voltage scope of its technological requirement
In；Further, the quiescent current of this low pressure difference linear voltage regulator will not change with the change of supply voltage.
The low pressure difference linear voltage regulator of the pressure scope of width shown in above-described embodiment can be used in ic core
In piece (such as power management class chip), for realizing the supplying functional of supply voltage.To the low voltage difference in this IC chip
The concrete structure of linear voltage regulator, just no longer details one by one at this.
In addition, above-mentioned low pressure difference linear voltage regulator can be used in communication terminal, as the weight of electric power management circuit
Want part.Fig. 3 is the block diagram of a kind of communication terminal according to exemplary embodiment.Communication terminal mentioned here refers to
Can use in mobile environment, support GSM, the meter of multiple communication standard such as EDGE, TD_SCDMA, TDD_LTE, FDD_LTE
Calculate machine equipment, including but not limited to mobile phone, notebook computer, panel computer, vehicle-mounted computer etc..With reference to Fig. 3, this communication is eventually
End can include following one or more assembly：Process assembly, memory, power supply module, multimedia groupware, audio-frequency assembly, defeated
Enter/export (I/O) interface, sensor cluster and communications component.In these components, have employed and comprise above-mentioned low pressure difference linearity
The electric power management circuit of voltage-stablizer.
Process assembly and generally control the integrated operation of device, such as with display, call, data communication, camera operation
The operation being associated with record operation.Process assembly and can include that one or more processor performs instruction, above-mentioned to complete
All or part of step of method.Additionally, process assembly can include one or more module, it is simple to process assembly and other groups
Mutual between part.For example, processing component can include multi-media module, to facilitate multimedia groupware and to process between assembly
Alternately.
Memory is configured to store various types of data to support the operation on this communication terminal.These data
Example includes any application program or the instruction of method, contact data, telephone directory number for operation on this communication terminal
According to, message, picture, video etc..Memory can by any kind of volatibility or non-volatile memory device or they
Combination realize, as static RAM (SRAM), Electrically Erasable Read Only Memory (EEPROM), erasable can
Program read-only memory (EPROM), programmable read only memory (PROM), read-only storage (ROM), magnetic memory, flash memory
Reservoir, disk or CD.
The various assembly that electric power assembly is this communication terminal provides electric power.Electric power assembly can include power-supply management system,
One or more power supplys, and other assemblies being associated with for the generation of this communication terminal, management and distribution electric power.
Multimedia groupware includes the screen of one output interface of offer between this communication terminal and user.Real at some
Executing in example, screen can include liquid crystal display (LCD) and touch panel (TP).If screen includes touch panel, screen can
To be implemented as touch-screen, to receive the input signal from user.Touch panel include one or more touch sensor with
Sensing touches, slides and the gesture on touch panel.Touch sensor can not only sense the border of touch or sliding action, and
And also detect the duration related to described touch or slide and pressure.In certain embodiments, multimedia groupware bag
Include a front-facing camera and/or post-positioned pick-up head.When this communication terminal is in operator scheme, such as screening-mode or video mode
When, front-facing camera and/or post-positioned pick-up head can receive the multi-medium data of outside.Each front-facing camera and rearmounted shooting
Head can be a fixing optical lens system or have focal length and optical zoom ability.
Audio-frequency assembly is configured to output and/or input audio signal.For example, audio-frequency assembly includes a microphone
(MIC), when this communication terminal is in operator scheme, during such as call model, logging mode and speech recognition mode, microphone is joined
It is set to receive external audio signal.The audio signal being received can be further stored to be sent out at memory or via communications component
Send.In certain embodiments, audio-frequency assembly also includes a loudspeaker, is used for exporting audio signal.
I/O interface provides interface for processing between assembly and peripheral interface module, above-mentioned peripheral interface module can be key
Dish, some striking wheel, button etc..These buttons include but is not limited to：Home button, volume button, start button and locking press button.
Sensor cluster includes one or more sensor, for providing the state of various aspects to comment for this communication terminal
Estimate.For example, what sensor cluster can detect this communication terminal opens/closed mode, and the relative positioning of assembly is for example described
Assembly is display and the keypad of this communication terminal, and sensor cluster can also detect this communication terminal or this communication terminal one
The position of individual assembly changes, and user is presence or absence of with what this communication terminal contacted, this communication terminal orientation or acceleration/deceleration
Temperature change with this communication terminal.Sensor cluster can include proximity transducer, is configured to do not having any thing
The existence of detection neighbouring object during reason contact.Sensor cluster can also include optical sensor, as CMOS or ccd image sense
Device, for using in imaging applications.In certain embodiments, this sensor cluster can also include acceleration transducer, top
Spiral shell instrument sensor, Magnetic Sensor, pressure sensor or temperature sensor.
Communications component is configured to facilitate the communication of wired or wireless mode between this communication terminal and other equipment.This leads to
Letter terminal can access the wireless network based on communication standard, such as WiFi, 2G or 3G, or combinations thereof.Exemplary at one
In embodiment, communications component receives the broadcast singal from external broadcasting management system or the related letter of broadcast via broadcast channel
Breath.In one exemplary embodiment, communications component also includes near-field communication (NFC) module, to promote junction service.For example,
Can be based on RF identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra broadband (UWB) technology, bluetooth in NFC module
(BT) technology and other technologies realize.
Above low pressure difference linear voltage regulator provided by the present invention, chip and communication terminal are described in detail.
For one of ordinary skill in the art, on the premise of without departing substantially from true spirit to it done any aobvious and easy
The change seen, all by composition to infringement of patent right of the present invention, will undertake corresponding legal liabilities.
Claims (10)
1. a low pressure difference linear voltage regulator for wide pressure scope, including error amplifier, adjustment pipe and feedback circuit, its feature
It is also to include dynamic divider and dynamic divider control circuit；
Described dynamic divider control circuit connects described dynamic divider, provides bias voltage for described dynamic divider；Institute
State dynamic divider to be arranged between input transistors and the load transistor of described error amplifier；
Described bias voltage changes with the variation of supply voltage, and the voltage making described dynamic divider be undertaken is corresponding
Change, and then in the range of the transistor ensureing in described error amplifier is operated in nominal voltage.
2. low pressure difference linear voltage regulator as claimed in claim 1, it is characterised in that also include current mirroring circuit；
Described current mirroring circuit is arranged between described error amplifier and described dynamic divider control circuit, for for described
Error amplifier provides bias current.
3. low pressure difference linear voltage regulator as claimed in claim 1 or 2, it is characterised in that：
One end of described dynamic divider connects the drain electrode of described input transistors, and the other end connects the leakage of described load transistor
Pole.
4. low pressure difference linear voltage regulator as claimed in claim 1 or 2, it is characterised in that：
The source electrode of described input transistors connects the output of current mirroring circuit, and the source electrode of described load transistor connects power supply electricity
Pressure.
5. low pressure difference linear voltage regulator as claimed in claim 1 or 2, it is characterised in that：
Described dynamic divider control circuit is by the realization in series with a resistor of multiple metal-oxide-semiconductors.
6. low pressure difference linear voltage regulator as claimed in claim 1 or 2, it is characterised in that：
The pressure voltage of described low pressure difference linear voltage regulator is provided with current mirroring circuit by the resistance parameter value of described dynamic divider
The product of the mirror image multiple of electric current determines.
7. low pressure difference linear voltage regulator as claimed in claim 1, it is characterised in that：
Described dynamic divider is realized by resistance and metal-oxide-semiconductor are in parallel.
8. low pressure difference linear voltage regulator as claimed in claim 7, it is characterised in that：
In the case that supply voltage is relatively low, the resistance parameter value of described dynamic divider is determined by the conducting resistance of described metal-oxide-semiconductor
Fixed；In the case that supply voltage is higher, the resistance parameter value of described dynamic divider is determined by described resistance.
9. an IC chip, it is characterised in that include in described IC chip in claim 1～8 arbitrarily
A kind of described low pressure difference linear voltage regulator.
10. a communication terminal, it is characterised in that include in described communication terminal in claim 1～8 described in any one
Low pressure difference linear voltage regulator.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112650345A (en) * | 2020-12-23 | 2021-04-13 | 杭州晶华微电子股份有限公司 | Semiconductor device with a plurality of semiconductor chips |
| CN112994221A (en) * | 2021-05-21 | 2021-06-18 | 北京芯愿景软件技术股份有限公司 | Chip and electronic equipment |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7402987B2 (en) * | 2005-07-21 | 2008-07-22 | Agere Systems Inc. | Low-dropout regulator with startup overshoot control |
| US8237502B2 (en) * | 2009-04-21 | 2012-08-07 | Renesas Electronics Corporation | Amplifier with bias stabilizer |
| CN104808734A (en) * | 2015-02-17 | 2015-07-29 | 唯捷创芯(天津)电子技术有限公司 | Adaptive low-voltage difference linear voltage stabilizer with wide withstand voltage range and chip thereof |
-
2016
- 2016-06-30 CN CN201610517855.0A patent/CN106444950B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7402987B2 (en) * | 2005-07-21 | 2008-07-22 | Agere Systems Inc. | Low-dropout regulator with startup overshoot control |
| US8237502B2 (en) * | 2009-04-21 | 2012-08-07 | Renesas Electronics Corporation | Amplifier with bias stabilizer |
| CN104808734A (en) * | 2015-02-17 | 2015-07-29 | 唯捷创芯(天津)电子技术有限公司 | Adaptive low-voltage difference linear voltage stabilizer with wide withstand voltage range and chip thereof |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112650345A (en) * | 2020-12-23 | 2021-04-13 | 杭州晶华微电子股份有限公司 | Semiconductor device with a plurality of semiconductor chips |
| CN112650345B (en) * | 2020-12-23 | 2022-05-17 | 杭州晶华微电子股份有限公司 | Semiconductor device with a plurality of semiconductor chips |
| CN112994221A (en) * | 2021-05-21 | 2021-06-18 | 北京芯愿景软件技术股份有限公司 | Chip and electronic equipment |
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| CN106444950B (en) | 2020-08-25 |
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