CN106384727A - Thin-film transistor device preparation method and thin-film transistor device - Google Patents
Thin-film transistor device preparation method and thin-film transistor device Download PDFInfo
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- CN106384727A CN106384727A CN201610867849.8A CN201610867849A CN106384727A CN 106384727 A CN106384727 A CN 106384727A CN 201610867849 A CN201610867849 A CN 201610867849A CN 106384727 A CN106384727 A CN 106384727A
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- 239000010409 thin film Substances 0.000 title claims abstract description 243
- 238000002360 preparation method Methods 0.000 title claims abstract description 47
- 239000010410 layer Substances 0.000 claims abstract description 196
- 239000011229 interlayer Substances 0.000 claims abstract description 79
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 230000000694 effects Effects 0.000 claims description 48
- 239000012212 insulator Substances 0.000 claims description 40
- 239000010408 film Substances 0.000 claims description 30
- 239000011265 semifinished product Substances 0.000 claims description 28
- 239000013078 crystal Substances 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 14
- 229910052710 silicon Inorganic materials 0.000 claims description 7
- 239000010703 silicon Substances 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 6
- 239000000047 product Substances 0.000 claims description 4
- 150000004767 nitrides Chemical class 0.000 claims description 3
- 230000000630 rising effect Effects 0.000 claims description 2
- 238000000034 method Methods 0.000 description 13
- 230000005527 interface trap Effects 0.000 description 8
- 229910052739 hydrogen Inorganic materials 0.000 description 6
- 239000001257 hydrogen Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000000354 decomposition reaction Methods 0.000 description 5
- 238000009413 insulation Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000003247 decreasing effect Effects 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000000686 essence Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
The embodiment of the invention provides a thin-film transistor device preparation method and a thin-film transistor device, and solves the problems in the prior art that the size of sub-threshold swing of a driving thin-film transistor and a switching thin-film transistor is equal due to the fact that the preparation process of the driving thin-film transistor and the switching thin-film transistor is the same. The thin-film transistor device preparation method comprises the steps that at least two semi-finished thin-film transistors are prepared on a substrate, wherein each semi-finished thin-film transistor comprises an active layer, a gate insulating layer and a gate electrode, and at least two semi-finished thin-film transistors comprise at least one semi-finished thin-film transistor used for driving and at least one semi-finished thin-film transistor used for switching; an interlayer dielectric layer is prepared on the surface of at least two semi-finished thin-film transistors; the interlayer dielectric layer on the surface of the semi-finished thin-film transistor used for driving is thinned; and a source electrode and a drain electrode are prepared on the surface of each semi-finished thin-film transistor.
Description
Technical field
The present invention relates to film transistor device technical field and in particular to a kind of thin film transistor device preparation method and
Thin film transistor device.
Background technology
Active matrix organic light emitting display includes switching thin-film transistor (switch TFT), drives thin film transistor (TFT) (to drive
Dynamic TFT) and organic luminescent device, driving thin film transistor (TFT) therein is used for driving organic luminescent device to light, and switch film is brilliant
Body pipe plays on-off action.Drive the subthreshold swing required for thin film transistor (TFT) and switching thin-film transistor and differ, drive
Thin film transistor (TFT) needs there is the subthreshold swing (sub-threshold swing) higher with respect to switching thin-film transistor,
So be conducive to the control of GTG, switching thin-film transistor subthreshold swing is less, and its switch performance is better.
But in the prior art, the processing procedure driving thin film transistor (TFT) and switching thin-film transistor in an image element circuit
It is identical, leads to drive that the subthreshold swing of thin film transistor (TFT) and switching thin-film transistor is equal in magnitude, this does not utilize ash
The control of rank, is also unfavorable for the operation of switching thin-film transistor.
Content of the invention
In view of this, a kind of thin film transistor device preparation method and thin film transistor (TFT) dress are embodiments provided
Put, solve the driving film leading to because driving thin film transistor (TFT) identical with the processing procedure of switching thin-film transistor in prior art
The equal-sized problem of subthreshold swing of transistor and switching thin-film transistor.
A kind of thin film transistor device preparation method that one embodiment of the invention provides includes：
At least two thin film transistor (TFT) semi-finished product are prepared on substrate, wherein said thin film transistor (TFT) semi-finished product include active
Layer, gate insulator and grid, described at least two thin film transistor (TFT) semi-finished product include the film that at least one plays driving effect
Transistor semi-finished product play the thin film transistor (TFT) semi-finished product of on-off action with least one；
Prepare interlayer dielectric layer in described at least two thin film transistor (TFT) surface of semi-finished；
The interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of thinning described driving effect；And
Prepare source electrode and drain electrode in each described thin film transistor (TFT) surface of semi-finished.
Wherein, the interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of described thinning described driving effect includes：
Prepare mask layer in described at least two thin film transistor (TFT) surface of semi-finished, wherein said mask layer exposes described
Play the interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of driving effect；
The interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of the described driving effect exposing described in etching；And
Remove described mask layer.
Wherein, the preparation method of each thin film transistor (TFT) semi-finished product includes：
It is sequentially prepared active layer, gate insulator and grid on the substrate；Or,
It is sequentially prepared grid, gate insulator and active layer on the substrate.
Wherein, described interlayer dielectric layer includes the upper sub- dielectric layer being layered on top of each other and lower sub- dielectric layer, wherein said lower son
Dielectric layer is contacted with described gate insulator, and described lower sub- dielectric layer is made using identical material with described gate insulator；
Wherein, the interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of described thinning described driving effect includes：
The upper sub- dielectric layer of the thin film transistor (TFT) surface of semi-finished of thinning described driving effect.
Wherein, described gate insulator and described lower sub- dielectric layer are made using the oxide of silicon；And/or
Described sub- dielectric layer is made using the nitride of silicon.
One embodiment of the invention also provides a kind of thin film transistor device preparation method, including：
At least two thin film transistor (TFT)s are prepared on substrate, described at least two thin film transistor (TFT)s include at least one and play drive
The thin film transistor (TFT) of action plays the thin film transistor (TFT) of on-off action with least one；And
Interlayer dielectric layer in the thin film transistor (TFT) of thinning described driving effect.
Wherein, the interlayer dielectric layer in the thin film transistor (TFT) of described thinning described driving effect includes：
Prepare mask layer in described at least two film crystal pipe surfaces, wherein said mask layer exposes described rising and drives
The interlayer dielectric layer of the film crystal pipe surface of effect；
The interlayer dielectric layer of the film crystal pipe surface of the described driving effect exposing described in etching；And
Remove described mask layer.
Wherein, each thin film transistor (TFT) is made using top gate structure or bottom grating structure.
Wherein, described interlayer dielectric layer includes the upper sub- dielectric layer being layered on top of each other and lower sub- dielectric layer, wherein, described lower son
Dielectric layer is contacted with the gate insulator in described thin film transistor (TFT)；
Wherein, the interlayer dielectric layer in the thin film transistor (TFT) of described thinning described driving effect includes：
The upper sub- dielectric layer of the film crystal pipe surface of thinning described driving effect.
Wherein, described lower sub- dielectric layer is made using identical material with described gate insulator.
One embodiment of the invention also provides a kind of thin film transistor device, including：
Substrate；And
At least two thin film transistor (TFT)s, preparation on the substrate, wherein said at least two thin film transistor (TFT)s include to
The thin film transistor (TFT) of few one driving effect plays the thin film transistor (TFT) of on-off action with least one, described driving effect
Interlayer dielectric layer in thin film transistor (TFT) is thinner than the interlayer dielectric layer in the thin film transistor (TFT) of described on-off action.
Wherein, each thin film transistor (TFT) is made using top gate structure or bottom grating structure.
Wherein, described interlayer dielectric layer includes the upper sub- dielectric layer being layered on top of each other and lower sub- dielectric layer, wherein said lower son
Dielectric layer is contacted with the gate insulator in described thin film transistor (TFT)；
Wherein, the interlayer dielectric layer in the thin film transistor (TFT) of described driving effect is more brilliant than the film of described on-off action
The thin inclusion of interlayer dielectric layer in body pipe：
Upper sub- dielectric layer in the thin film transistor (TFT) of described driving effect is compared with the thin film transistor (TFT) of on-off action
Upper sub- dielectric layer is thin.
Wherein, described lower sub- dielectric layer is made using identical material with described gate insulator.
A kind of thin film transistor device preparation method provided in an embodiment of the present invention and thin film transistor device, by thinning
Drive the interlayer dielectric layer of thin film transistor (TFT), can be supplied to active layer in the interlayer dielectric layer decreasing driving thin film transistor (TFT) and be used for
The hydrogen bond of filling interface trap so that drive thin film transistor (TFT) active layer have relative to switching thin-film transistor more
Interface trap is so that drive the carrier mobility of thin film transistor (TFT) to reduce, subthreshold swing increases, same current amplitude of variation
Under this kind of structure can preferably control the display of GTG.Thin film transistor (TFT) and switching thin-film transistor subthreshold value so will be driven
The amplitude of oscillation is distinguished, and screen body gray scale voltage both can have been made more preferably to control, also can improve the switch performance of switching thin-film transistor simultaneously.
Brief description
Fig. 1 show one embodiment of the invention offer a kind of thin film transistor device preparation method it is characterised in that
Schematic flow sheet.
Fig. 2 show thinning inter-level dielectric in a kind of thin film transistor device preparation method of one embodiment of the invention offer
The schematic flow sheet of layer.
The STRUCTURE DECOMPOSITION flow process of the thin film transistor device preparation method that Fig. 3 a～3c provides for another embodiment of the present invention
Schematic diagram.
The STRUCTURE DECOMPOSITION stream of the thin film transistor device preparation method that Fig. 3 a '～3c ' provides for another embodiment of the present invention
Journey schematic diagram.
Fig. 4 show the schematic flow sheet of the thin film transistor device preparation method that another embodiment of the present invention is provided.
The STRUCTURE DECOMPOSITION flow process of the thin film transistor device preparation method that Fig. 5 a～5b provides for another embodiment of the present invention
Schematic diagram.
Fig. 6 show thinning inter-level dielectric in a kind of thin film transistor device preparation method of one embodiment of the invention offer
The schematic flow sheet of layer.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes it is clear that described embodiment is only a part of embodiment of the present invention, rather than whole embodiments.Based on this
Embodiment in invention, the every other reality that those of ordinary skill in the art are obtained under the premise of not making creative work
Apply example, broadly fall into the scope of protection of the invention.
Fig. 1 show a kind of schematic flow sheet of thin film transistor device preparation method of one embodiment of the invention offer.
As shown in figure 1, the method includes：
Step 101：Prepare at least two thin film transistor (TFT) semi-finished product, wherein thin film transistor (TFT) semi-finished product bag on substrate 1
Include active layer 2, gate insulator 3 and grid 4, at least two thin film transistor (TFT) semi-finished product include at least one and play driving effect
Thin film transistor (TFT) semi-finished product play the thin film transistor (TFT) semi-finished product of on-off action with least one.
It should be appreciated that the complete structure of thin film transistor (TFT) should at least include active layer 2, gate insulator 3, grid 4, interlayer
Dielectric layer, source electrode 6 and drain electrode 7, and in above-mentioned thin film transistor (TFT) semi-finished product, also do not prepare interlayer dielectric layer, source electrode 6 and drain electrode
7.Active layer 2 is used for forming conducting channel, can be made using polysilicon；Gate insulator 3 is used for will be exhausted with grid 4 for active layer 2
Edge；The interlayer dielectric layer of follow-up preparation is used for thin film transistor (TFT) semi-finished product and source electrode 6/ drain 7 insulation.
In an embodiment of the present invention, thin film transistor (TFT) to be prepared adopts top gate structure, then thin film transistor (TFT) half becomes
The preparation flow of product is：It is sequentially prepared active layer 2, gate insulator 3 and grid 4 on substrate 1.So grid 4 is located at film
The surface of transistor semi-finished product, subsequently prepared interlayer dielectric layer is exhausted between grid 4 and source electrode 6/ drain electrode 7 in order to be formed
Edge.
In an alternative embodiment of the invention, thin film transistor (TFT) to be prepared adopts bottom grating structure, then thin film transistor (TFT) half
The preparation flow of finished product is：It is sequentially prepared grid 4, gate insulator 3 and active layer 2 on substrate 1.So active layer 2 is located at
The surface of thin film transistor (TFT) semi-finished product, subsequently prepared interlayer dielectric layer be in order to formed active layer 2 and source electrode 6/ drain electrode 7 it
Between insulation.
Step 102：Prepare interlayer dielectric layer at least two thin film transistor (TFT) surface of semi-finished.
Interlayer dielectric layer except formed thin film transistor (TFT) semi-finished product and source electrode 6/ drain electrode 7 between insulation in addition to, inter-level dielectric
Hydrogen bond included in layer also can spread to fill the interface trap in active layer 2 in active layer 2, so that film crystal
Interface trap in the active layer 2 of pipe reduces, and carrier mobility raises, and subthreshold swing reduces.Drive thin in prior art
The processing procedure of film transistor and switching thin-film transistor is identical, drives the interlayer in thin film transistor (TFT) and switching thin-film transistor
Thickness of dielectric layers is equal, and therefore the hydrogen bond in interlayer dielectric layer is to the subthreshold value driving thin film transistor (TFT) and switching thin-film transistor
The impact of the amplitude of oscillation is also identical, i.e. the subthreshold swing of driving thin film transistor (TFT) and switching thin-film transistor is equal in magnitude.
It should be appreciated that the preparation of interlayer dielectric layer can using plasma enhancing chemical vapour deposition technique technique complete
(PECVD), however the present invention does not limit to the concrete preparation method of interlayer dielectric layer.
Step 103：The interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of thinning driving effect.
Specifically, the thinning of interlayer dielectric layer driving thin film transistor (TFT) surface of semi-finished passes through mask etching technique
Realize, as shown in Fig. 2 first prepare mask layer in this at least two thin film transistor (TFT)s surface of semi-finished (for example by exposing, can show
Shadow process is realized), wherein mask layer has exposed the interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of driving effect
(S21)；Then the interlayer dielectric layer (S22) of the thin film transistor (TFT) surface of semi-finished playing driving effect that etching exposes；Finally
Remove mask layer (S23), thus reach only thinning mesh is carried out to the interlayer dielectric layer driving thin film transistor (TFT) surface of semi-finished
's.
Step 104：Prepare source electrode 6 and drain electrode 7 in each thin film transistor (TFT) surface of semi-finished.
After each thin film transistor (TFT) surface of semi-finished prepares source electrode 6 and drain electrode 7, play the thin film transistor (TFT) half of driving effect
The thin film transistor (TFT) semi-finished product of finished product and an on-off action just form respectively complete driving thin film transistor (TFT) and switch film
Transistor, but drive the interlayer dielectric layer in thin film transistor (TFT) thinner than the interlayer dielectric layer in switching thin-film transistor.
It should be appreciated that the preparation technology of source electrode 6 and drain electrode 7 can be realized by way of first punching and carrying out metal deposit again,
But the present invention does not limit to the concrete preparation technology of source electrode 6 and drain electrode 7.
As can be seen here, using thin film transistor device preparation method provided in an embodiment of the present invention, thin by thinning driving
The interlayer dielectric layer of film transistor, can be supplied to active layer 2 in the interlayer dielectric layer decreasing driving thin film transistor (TFT) and is used for filling
The hydrogen bond of interface trap, so that drive the active layer 2 of thin film transistor (TFT) to have more interface trap so that driving film
The carrier mobility of transistor reduces, and subthreshold swing increases, such that it is able to the more preferable display controlling GTG it is ensured that switching
The switch performance of thin film transistor (TFT).
It should be appreciated that the thin film transistor (TFT) semi-finished product of driving effect and the thin film transistor (TFT) playing on-off action are risen on substrate 1
The quantity of semi-finished product can by research staff according to the actual demand of display circuit depending on, the present invention does not limit to this.
The STRUCTURE DECOMPOSITION flow process of the thin film transistor device preparation method that Fig. 3 a～3c provides for another embodiment of the present invention
Schematic diagram, thin film transistor (TFT) semi-finished product therein adopt top gate structure.Fig. 3 a '～3c ' provides for another embodiment of the present invention
The STRUCTURE DECOMPOSITION schematic flow sheet of thin film transistor device preparation method, thin film transistor (TFT) semi-finished product therein adopt bottom gate to tie
Structure.
As shown in Fig. 3 a and 3a ', preparing on substrate 1 has at least two thin film transistor (TFT) semi-finished product, and therein each is thin
Film transistor semi-finished product include active layer 2, gate insulator 3 and grid 4.The interlayer dielectric layer of thin film transistor (TFT) surface of semi-finished
May include the upper sub- dielectric layer 51 being layered on top of each other and lower sub- dielectric layer 52.Lower sub- dielectric layer 52 is contacted with gate insulator 3, and under
Sub- dielectric layer 52 and gate insulator 3 are made using identical material.Because gate insulator 3 and lower sub- dielectric layer 52 contact
And made using identical material, under can reducing, the boundary defect of sub- dielectric layer 52 and the contact surface of gate insulator 3 is it is ensured that film
The service behaviour of transistor.
Now, as shown in Fig. 3 b and 3b ', it has been only thinned out the upper sub- medium of the thin film transistor (TFT) surface of semi-finished of driving effect
Layer 51 can be so that the interlayer dielectric layer of the driving thin film transistor (TFT) subsequently being formed be thinner than switching thin-film transistor, to reach increasing
The big purpose driving thin film transistor (TFT) subthreshold swing.
Finally, as shown in Fig. 3 c and 3c ', after each thin film transistor (TFT) surface of semi-finished prepares source electrode 6 and drain electrode 7, just
Define complete driving thin film transistor (TFT) and switching thin-film transistor, but drive the upper sub- dielectric layer 51 in thin film transistor (TFT) to want
Thinner than the upper sub- dielectric layer 51 in switching thin-film transistor.
In an embodiment of the present invention, due to the gate insulator 3 between active layer 2 and grid 4 need to ensure preferably exhausted
Edge performance, gate insulator 3 can be made, in order to dielectric layer 52 sub- under ensureing is exhausted with grid using the oxide of comparatively dense silicon
Edge layer 3 adopts identical material, and the oxide that lower sub- dielectric layer 52 may also be employed silicon is made；And upper sub- dielectric layer 51 can be using bag
The nitride of the silicon containing more hydrogen bond is made.
It should be appreciated that the concrete material of gate insulator 3, upper sub- dielectric layer 51 and lower sub- dielectric layer 52 all can be by researching and developing
Depending on personnel are according to the actual demand of display circuit, in an embodiment of the present invention, lower sub- dielectric layer 52 may also be employed and grid
The different material of insulating barrier 3 is made.The present invention is concrete to gate insulator 3, upper sub- dielectric layer 51 and lower sub- dielectric layer 52
Material does not limit.
Fig. 4 show the schematic flow sheet of the thin film transistor device preparation method that another embodiment of the present invention is provided.
Different from the preparation method shown in Fig. 1, it is first to prepare complete driving thin film transistor (TFT) and open in the embodiment shown in fig. 4
Close thin film transistor (TFT), then again the interlayer dielectric layer driving film crystal pipe surface is carried out thinning, equally can make driving film
The interlayer dielectric layer of transistor is thinner than switching thin-film transistor, increases, to reach, the mesh driving thin film transistor (TFT) subthreshold swing
's.As shown in figure 4, the method may include：
Step 401：As shown in Figure 5 a, at least two thin film transistor (TFT)s, at least two thin film transistor (TFT)s are prepared on substrate 1
Play the thin film transistor (TFT) of driving effect including at least one and at least one plays the thin film transistor (TFT) of on-off action.
As can be seen here, in embodiments of the present invention, first it is prepared at least two complete thin film transistor (TFT)s on substrate 1,
Drive thin film transistor (TFT) and at least one switching thin-film transistor including at least one.Due to complete thin film transistor (TFT) table
The source electrode 6 in face and 7 interlayer dielectric layers that can not be completely covered that drain, therefore drive thin film transistor (TFT) and switching thin-film transistor
Surface all be expose have interlayer dielectric layer.
Step 402：As shown in Figure 5 b, the interlayer dielectric layer in the thin film transistor (TFT) of thinning driving effect.
Thinning by carrying out to the interlayer dielectric layer driving in thin film transistor (TFT), then can directly reach increase and drive film brilliant
The purpose of body pipe subthreshold swing.As shown in fig. 6, specific thinning process may include：First in this at least two thin film transistor (TFT)
Mask layer is prepared on surface, and wherein mask layer has exposed the interlayer dielectric layer (S61) of the film crystal pipe surface of driving effect；Carve
The interlayer dielectric layer (S62) of the film crystal pipe surface playing driving effect that erosion exposes；And, remove mask layer (S63).
It should be understood that although driving thin film transistor (TFT) and switching thin-film transistor equal in the structure chart shown in Fig. 5 a and 5b
Employ top gate structure, that is, active layer 2, gate insulator 3 and grid 4 are sequentially prepared on substrate 1；But driving film crystal
Pipe and switching thin-film transistor may also be employed bottom grating structure in fact, and that is, grid 4, gate insulator 3 and active layer 2 are sequentially prepared
On substrate 1.
In an embodiment of the present invention, complete driving thin film transistor (TFT) and switching thin-film transistor are prepared in the ban, then
When carrying out thinning to the interlayer dielectric layer driving thin film transistor (TFT), interlayer dielectric layer may also comprise the upper sub- dielectric layer being layered on top of each other
51 and lower sub- dielectric layer 52, wherein under sub- dielectric layer 52 contact with the gate insulator 3 in thin film transistor (TFT), lower sub- dielectric layer 52
Can be made using identical material with gate insulator 3；Now it has been only thinned out the thin film transistor (TFT) surface of semi-finished of driving effect
Upper sub- dielectric layer 51, will not be described here.
One embodiment of the invention also provides a kind of thin film transistor device, as shown in Figure 5 b, this thin film transistor device bag
Include：Substrate 1 and preparation at least two thin film transistor (TFT)s on substrate 1.This at least two thin film transistor (TFT) includes at least one
Play the thin film transistor (TFT) that the thin film transistor (TFT) of driving effect plays on-off action with least one, play the thin film transistor (TFT) of driving effect
In interlayer dielectric layer thin compared with the interlayer dielectric layer in the thin film transistor (TFT) of on-off action.
It should be understood that although driving thin film transistor (TFT) and switching thin-film transistor all to adopt in the structure chart shown in Fig. 5 b
Top gate structure, interlayer dielectric layer is used for grid 4 and source electrode 6/ drain 7 insulation；But drive thin film transistor (TFT) and switch film
Transistor may also be employed bottom grating structure in fact, and now interlayer dielectric layer is used for active layer 2 and source electrode 6/ drain 7 insulation.
In an embodiment of the present invention, interlayer dielectric layer includes the upper sub- dielectric layer 51 being layered on top of each other and lower sub- dielectric layer
52.Lower sub- dielectric layer 52 is contacted with the gate insulator 3 in thin film transistor (TFT), and lower sub- dielectric layer 52 can be adopted with gate insulator 3
Made with identical material.Play the film crystal that the upper sub- dielectric layer 51 in the thin film transistor (TFT) of driving effect is compared with on-off action
Upper sub- dielectric layer 51 in pipe is thin.
Interlayer dielectric layer due to driving thin film transistor (TFT) is relatively thin, can be supplied in the interlayer dielectric layer driving thin film transistor (TFT)
Active layer 2 be used for filling interface trap hydrogen bond also less so that drive thin film transistor (TFT) active layer 2 have more
Interface trap, so that driving the carrier mobility of thin film transistor (TFT) to reduce, subthreshold swing increases, is controlled such that it is able to more preferable
The display of GTG processed is it is ensured that the switch performance of switching thin-film transistor.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all essences in the present invention
Within god and principle, any modification of being made, equivalent etc., should be included within the scope of the present invention.
Claims (14)
1. a kind of thin film transistor device preparation method is it is characterised in that include：
At least two thin film transistor (TFT) semi-finished product are prepared on substrate, wherein said thin film transistor (TFT) semi-finished product include active layer,
Gate insulator and grid, described at least two thin film transistor (TFT) semi-finished product include the film crystal that at least one plays driving effect
Pipe semi-finished product play the thin film transistor (TFT) semi-finished product of on-off action with least one；
Prepare interlayer dielectric layer in described at least two thin film transistor (TFT) surface of semi-finished；
The interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of thinning described driving effect；And
Prepare source electrode and drain electrode in each described thin film transistor (TFT) surface of semi-finished.
2. thin film transistor device preparation method according to claim 1 is it is characterised in that described thinning described drives
The interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of effect includes：
Prepare mask layer in described at least two thin film transistor (TFT) surface of semi-finished, wherein said mask layer exposes described rising and drives
The interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of action；
The interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of the described driving effect exposing described in etching；And
Remove described mask layer.
3. thin film transistor device preparation method according to claim 1 is it is characterised in that each thin film transistor (TFT) half becomes
The preparation method of product includes：
It is sequentially prepared active layer, gate insulator and grid on the substrate；Or,
It is sequentially prepared grid, gate insulator and active layer on the substrate.
4. according to arbitrary described thin film transistor device preparation method in claims 1 to 3 it is characterised in that described interlayer
Dielectric layer includes the upper sub- dielectric layer being layered on top of each other and lower sub- dielectric layer, wherein said lower sub- dielectric layer and described gate insulator
Contact, described lower sub- dielectric layer is made using identical material with described gate insulator；
The interlayer dielectric layer of the thin film transistor (TFT) surface of semi-finished of wherein said thinning described driving effect includes：
The upper sub- dielectric layer of the thin film transistor (TFT) surface of semi-finished of thinning described driving effect.
5. thin film transistor device preparation method according to claim 4 is it is characterised in that described gate insulator and institute
State lower sub- dielectric layer to make using the oxide of silicon；And/or
Described sub- dielectric layer is made using the nitride of silicon.
6. a kind of thin film transistor device preparation method is it is characterised in that include：
At least two thin film transistor (TFT)s are prepared on substrate, described at least two thin film transistor (TFT)s include at least one and play driving work
Thin film transistor (TFT) plays the thin film transistor (TFT) of on-off action with least one；And
Interlayer dielectric layer in the thin film transistor (TFT) of thinning described driving effect.
7. thin film transistor device preparation method according to claim 6 is it is characterised in that described thinning described drives
Interlayer dielectric layer in the thin film transistor (TFT) of effect includes：
Prepare mask layer in described at least two film crystal pipe surfaces, wherein said mask layer exposes described driving effect
Film crystal pipe surface interlayer dielectric layer；
The interlayer dielectric layer of the film crystal pipe surface of the described driving effect exposing described in etching；And
Remove described mask layer.
8. thin film transistor device preparation method according to claim 6 is it is characterised in that each thin film transistor (TFT) adopts
Top gate structure or bottom grating structure are made.
9. according to arbitrary described thin film transistor device preparation method in claim 6 to 8 it is characterised in that described interlayer
Dielectric layer includes the upper sub- dielectric layer being layered on top of each other and lower sub- dielectric layer, wherein said lower sub- dielectric layer and described thin film transistor (TFT)
In gate insulator contact；
Interlayer dielectric layer in the thin film transistor (TFT) of wherein said thinning described driving effect includes：
The upper sub- dielectric layer of the film crystal pipe surface of thinning described driving effect.
10. thin film transistor device preparation method according to claim 9 it is characterised in that described lower sub- dielectric layer with
Described gate insulator is made using identical material.
A kind of 11. thin film transistor devices are it is characterised in that include：
Substrate；And
At least two thin film transistor (TFT)s, on the substrate, wherein said at least two thin film transistor (TFT)s include at least one for preparation
The thin film transistor (TFT) of individual driving effect plays the thin film transistor (TFT) of on-off action, the film of described driving effect with least one
Interlayer dielectric layer in transistor is thinner than the interlayer dielectric layer in the thin film transistor (TFT) of described on-off action.
12. thin film transistor devices according to claim 11 are it is characterised in that each thin film transistor (TFT) adopts top-gated to tie
Structure or bottom grating structure are made.
13. thin film transistor devices according to claim 11 or 12 are it is characterised in that described interlayer dielectric layer includes phase
The mutually upper sub- dielectric layer of stacking and lower sub- dielectric layer, the gate insulator in wherein said lower sub- dielectric layer and described thin film transistor (TFT)
Layer contact；
Interlayer dielectric layer in the thin film transistor (TFT) of wherein said driving effect is than the thin film transistor (TFT) of described on-off action
In the thin inclusion of interlayer dielectric layer：
Upper sub- dielectric layer in the thin film transistor (TFT) of described driving effect is compared with the upper son in the thin film transistor (TFT) of on-off action
Dielectric layer is thin.
14. thin film transistor device preparation facilities according to claim 13 it is characterised in that described lower sub- dielectric layer with
Described gate insulator is made using identical material.
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| CN110299322A (en) * | 2019-07-03 | 2019-10-01 | 京东方科技集团股份有限公司 | A kind of display base plate and preparation method thereof, display device |
| CN110828486A (en) * | 2019-11-19 | 2020-02-21 | 云谷（固安）科技有限公司 | Display panel manufacturing method and display panel |
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