CN106376173B

CN106376173B - Multilayer lead structure of printed circuit board, magnetic element and manufacturing method thereof

Info

Publication number: CN106376173B
Application number: CN201510435575.0A
Authority: CN
Inventors: 林均治; 陈易威; 赖奕廷; 林楚耿; 李政璋
Original assignee: Cyntec Co Ltd
Current assignee: Cyntec Co Ltd
Priority date: 2015-07-22
Filing date: 2015-07-22
Publication date: 2020-07-28
Anticipated expiration: 2035-07-22
Also published as: CN106376173A

Abstract

The scheme is a multilayer lead structure of a printed circuit board, a magnetic element and a manufacturing method thereof, and the method comprises the following steps: providing a first conducting wire structure and a second conducting wire structure; providing an insulating isolation layer between the first conducting wire structure and the second conducting wire structure, wherein the thickness of the insulating isolation layer is smaller than that of the first conducting wire structure or the second conducting wire structure; and carrying out a pressing process on the first conducting wire structure, the insulating isolation layer and the second conducting wire structure so as to complete the multilayer conducting wire structure of the printed circuit board. The multilayer lead structure and the manufacturing method thereof have the main advantages that the electroplating process with high pollution can be saved, the steps of the process are saved, and the cost is further reduced. And is particularly suitable for large current conducting, small-sized printed circuit board applications.

Description

Multilayer lead structure of printed circuit board, magnetic element and manufacturing method thereof

Technical Field

The present invention relates to a multilayer conductive line structure, a magnetic element and a method for manufacturing the same, and more particularly, to a multilayer conductive line structure of a Printed Circuit Board (PCB) of a planar circuit element, a magnetic element and a method for manufacturing the same.

Background

As shown in fig. 1a, the middle substrate 10 is formed of cured glass cloth and epoxy resin, and the

entire Copper foils

11 and 12 having the same area as the substrate 10 are flatly bonded to the upper and lower surfaces of the substrate 10, respectively, and the

entire Copper foils

11 and 12 are not formed into a multi-layer structure and a wire shape, so that the strength of the single Copper foil substrate (CC L) is increased, and thus the thickness of the substrate 10 must be greater than 0.1 millimeter (mm) or more, which is disadvantageous to the miniaturization and thinning of electronic industry products.

In addition, as shown in fig. 1b, which is a schematic cross-sectional view of a multilayer Printed Circuit Board (PCB) completed by a conventional method, it can be clearly seen from the figure that since the copper foil wire 19 is defined by an etching solution, the edge shape of the copper foil wire 19 has an inward concave shape due to lateral erosion, i.e. a large lateral erosion distance d1 exists between the inner edge and the outer edge of the copper foil wire 19. The undercut phenomenon is more severe, i.e., the undercut distance d1 is greater, when the copper foil wire 19 with a greater thickness is selected for high current application. When the copper thickness d4 is 0.15mm, the undercut distance d1 is greater than 0.15 mm. As illustrated in fig. 1b, the inner edge is on the upper surface and the outer edge is on the lower surface, the upper pitch d2 is the distance between two adjacent edges of the upper surface of the copper foil conductor 19, the lower pitch d3 is the distance between two adjacent edges of the lower surface of the copper foil conductor 19, and the insulation characteristics are determined by the smaller of the two. The undercut phenomenon necessitates an increase in the upper line pitch d2 (which is the same as the line pitch in the photomask used for exposure) to maintain the same insulating characteristics, thereby resulting in a significant increase in the size of the overall Printed Circuit Board (PCB). In order to avoid the lateral etching problem caused by etching the circuit in the conventional circuit board process, and to control the offset between layers more precisely, it is one of the main objectives of the present invention.

Disclosure of Invention

The scheme is a method for manufacturing a multilayer lead structure of a printed circuit board, which comprises the following steps: providing a first conducting wire structure and a second conducting wire structure; providing an insulating isolation layer between the first conducting wire structure and the second conducting wire structure, wherein the thickness of the insulating isolation layer is smaller than that of the first conducting wire structure or the second conducting wire structure; and carrying out a pressing process on the first conducting wire structure, the insulating isolation layer and the second conducting wire structure so as to complete the multilayer conducting wire structure of the printed circuit board.

Another aspect of the present disclosure is a planar magnetic element structure, which includes a magnetic core; and a planar conductive winding, which is a multilayer conductor structure of the printed circuit board and comprises a first conductor structure and a second conductor structure; an insulating isolation layer arranged between the first conducting wire structure and the second conducting wire structure, wherein the thickness of the insulating isolation layer is smaller than that of the first conducting wire structure or the second conducting wire structure; and a through hole, wherein the magnetic core penetrates through the through hole.

Yet another aspect of the present invention is a multi-layer conductive line structure of a printed circuit board, comprising: a first conductive line structure and a second conductive line structure; and an insulating isolation layer arranged between the first conducting wire structure and the second conducting wire structure, wherein the thickness of the insulating isolation layer is smaller than that of the first conducting wire structure or the second conducting wire structure.

The multilayer lead structure and the manufacturing method thereof have the main advantages that the electroplating process with high pollution can be omitted, the steps of the process are saved, and the cost is further reduced. And is particularly suitable for large current conducting, small-sized printed circuit board applications.

Drawings

FIG. 1a is a schematic cross-sectional view of a copper foil substrate (CC L) completed by a conventional process.

FIG. 1b is a schematic cross-sectional view of a multi-layer Printed Circuit Board (PCB) completed by a conventional method

Fig. 2a to 2e are schematic process diagrams illustrating a method for manufacturing a PCB multi-layer conductive line structure developed to improve the conventional defects.

Fig. 3a to 3e are schematic diagrams of the structural shapes of the conducting wires used for completing different layers in the planar coil base structure and the angles after superposition.

Fig. 4 is an exploded view of a magnetic element according to the present disclosure.

FIGS. 5 a-5 b are schematic views showing that the present invention can be mass-produced.

Fig. 6 is a schematic diagram illustrating an example of layering a transformer winding unit by using the technical means of the present invention.

Fig. 7a to 7c are a schematic diagram of the stacked conductor structures shown in fig. 6 and a schematic diagram of a winding circuit.

Fig. 8 is a cross-sectional view showing the improvement of the undercut phenomenon.

Wherein the reference numerals are as follows:

magnetic element 7

Substrate 10

Copper foil 11, 12

Copper foil conductor 19

Conducting wire structure 21

Insulating barrier layer 22

Multilayer conductor structure 29

Groove structure 38

Conductor plug 39

Subunit 50

Flow blocking structure 51

Insulating barrier 59

Conductive winding 70

Magnetic core 71

First secondary winding unit 72

Second secondary winding unit 73

First insulating film layer 74

Second insulating film layer 75

Connecting strip 210

Subunit 211

Multi-layer conductive line structure 290

Subunits 310 to 350

Resection line 390

Cut-out region 391

Fixing column 510

Fixing hole 511

Central hole 621

Main body 701

Through hole 702

First core part 711

Second core part 712

Shaft portion 713

Columnar conductive pins 761-766

Lead frames 771-772

Positioning hole 2100

Pins

3101, 3102, 3201, 3202, 3301, 3302, 3401, 3402, 3501, 3502

Wire structures 31-35

Wire structures 601-616

The wire structure shape types A1, A2, B1, B2, C1, C2, D1 and D2

Undercut distance d1

Upper line spacing d2

Lower line spacing d3

Copper thickness d4

Layering L1-L5

Contacts (through holes) P1-P5

Contacts (through holes) S1-S5

Detailed Description

Referring to fig. 2a to 2c, which are process diagrams illustrating a method for manufacturing a PCB multi-layer conductive line structure developed to improve the conventional disadvantages, first, as shown in fig. 2a, a plurality of conductive line structures 21 are first defined in shape by stamping or etching, each conductive line structure 21 includes a plurality of sub-units 211 and a connecting bar 210 respectively connected to the sub-units 211, the connecting bar 210 may further have a positioning hole 2100, the sub-units 211 may have the same or slightly different shapes, and each conductive line structure 21 is integrally formed by stamping or etching. The plurality of conductive line structures 21 may be formed of copper conductor or other metal or alloy material, and may be additionally subjected to a browning process for increasing surface roughness.

Referring to fig. 2b, an insulating layer 22 is provided between the conductive line structures 21, and the above operations are repeated to form a stacked structure, and a plurality of fixing posts are inserted into the positioning holes 2100 from the stacking direction to position the conductive line structures 21, so as to effectively reduce the offset generated during the pressing of the conductive line structures 21, and the fixing posts are removed after the pressing. Since the wire structure 21 is formed in a specific, e.g. ring-shaped pattern before the bonding process is performed to form the multi-layer structure, the supporting strength required to be borne by the insulating isolation layer 22 is reduced, so that the thickness of the insulating isolation layer 22 can be designed to be smaller than the thickness of the plurality of wire structures 21, and the thickness of the insulating isolation layer 22 can be in a range of 0.015mm to 0.2mm, which can greatly reduce the overall thickness of the completed multi-layer wire structure. Then, the plurality of conductive line structures 21 are laminated by the stacked structure of the plurality of insulating isolation layers 22, thereby completing a laminated multi-layer conductive line structure 29. The insulating isolation layer 22 can be made of glass fiber cloth (Prepreg, the material is mainly glass fiber) and resin (resin), and the pressing process can be a heating pressing process, which can preheat the wire structure 21, or heat the wire structure 21 and the insulating isolation layer 22 together, for example, to 180-230 ℃, and then press them together, and the drawings of the heating and pressing curves refer to fig. 2d and 2e, in which the embodiments of temperature and pressure values changing with time in the heating and pressing process are described in detail, fig. 2d is a process of two-stage temperature and two-stage pressure, and fig. 2e is a process of one-stage temperature and two-stage pressure.

Referring to fig. 2c, the laminated multi-layer conductive line structure 29 is subjected to a cutting process to separate the connecting bar 210 from the sub-units 211, and the multi-layer conductive line structure 29 is separated into a plurality of sub-unit multi-layer conductive line structures 290. For example, the cut sub-unit multilayer wire structure 290 may serve as a base structure of the planar coil. Since the thickness of the insulating isolation layer 22 in the sub-unit multi-layer conductive line structure 290 is smaller than that of the plurality of conductive line structures, the effect of greatly reducing the overall structure thickness can be achieved.

Referring to fig. 3a, which is a schematic diagram of the shape of the lead structure for completing different layers in the planar coil base structure, taking a five-layer lead structure as an example, the C-shape (circular arc shape) representing different subunits 310-350 in five lead structures 31-35 in five layers L1-L5 is shown, wherein the relative positions of the subunits pins 3101, 3102, 3201, 3202, 3301, 3302, 3401, 3502, 3501, 3502 of each layer on each of the vertically overlapped regions (on the same cut-off line 390 in the figure) are all different, after placing the insulating layer 22 between the five lead structures 31-35 and stacking and positioning (positioning can be performed by using the positioning hole 2100 in fig. 2a, although for simplicity of drawing), the figure is not shown), a pin of the vertically adjacent lead structures (for example, 3102 and 3201, 3202, 3301, 3302, and 3301, 3402, pins 3402, 3401 and 3401, 3402, pins 3402, and pins 3401, 3402 and 3401, and pins are aligned with the lead structure, and exposed by the amount of the lead structure exposed by cutting the lead structure of the lead structure on the lead structure of the lower side of the lead structure, 3301, 3302, 3102, and the lead structure, such as shown in the cut-and the cut-off the lead structure, and the lead structure, wherein the lead structure, and the lead structure, wherein the lead structure, and the lead structure, and the lead structure.

In some embodiments, as shown in fig. 3d, the

pins

3101, 3102, 3201, 3202, 3301, 3302, 3401, 3402, 3501, 3502 exposed from the cutting surface may further include a through hole or a groove, and the conductive plug 39 is replaced by a plated through hole process (including drilling, activating, Plating, etc.) to electrically connect the

pins

3101, 3102, 3201, 3202, 3301, 3302, 3401, 3402, 3501, 3502 exposed from fig. 3 b. And the following steps can be carried out again: the upper and lower surfaces are coated with an insulating varnish (green paint), followed by surface treatment (e.g., gold, silver, tin or Organic protective film (Organic masking), and then by board milling (routing), i.e., cutting, as shown in fig. 3e, the via or groove structure 38 penetrates the entire multilayer wire structure from top to bottom.

In some embodiments, in order to increase the flatness of the top and bottom layers, no conductive line structure is disposed on the top and bottom layers, or the top and bottom conductive line structures are defined by photolithography, comprising the following steps: the top and bottom layers are laminated by using single-sided copper foil with undefined shape, and then the photolithography process (the steps of exposure, development and etching) is utilized, and the following steps can be carried out: the upper and lower surfaces are coated with an insulating varnish (green paint), followed by surface treatment (e.g., gold plating, silver plating, tin spraying, or Organic protective film (Organic masking), and then plate milling (routing) is performed. Furthermore, in some embodiments, the conductive wire structures 31-35 are C-shaped annular coil structures, and the electrical connection relationship between the conductive wire structures can be a planar coil formed by a combination of serial connection and parallel connection.

In some embodiments, the present technology can be further applied to a high-current PCB multi-layer conductive line structure, wherein an electronic component (not shown) is soldered on at least one surface of the PCB multi-layer conductive line structure, and the pattern of the conductive line structure is not limited to a C shape, but corresponds to the shape of the interconnection of the soldered portions of the electronic component (not shown).

The planar coil structure can be used to complete a planar magnetic component such as a planar transformer or inductor, and the planar PCB can have one or more windings. Fig. 4 is an exploded view of a planar magnetic element according to an embodiment of the present invention. The planar magnetic element 7 may be a planar inductor or transformer comprising a conductive winding 70 and a magnetic core 71. The conductive winding 70 may be the structure shown in fig. 3b and 3C, which is electrically equivalent to one or more windings, and in the case of a planar transformer, comprises at least two windings, and may be formed by a single-layer or multi-layer C-shaped loop-shaped conductive wire structure 21, and may be completed by the above-mentioned manufacturing method. As for the two-piece core 71, such as an E-I, E-E core, the conductive winding 70 may be sleeved such that the conductive path of the conductive winding 70 surrounds a portion of the core 71, such as the middle shaft portion. In addition, the planar magnetic element 7 described in this embodiment may also be other types of magnetic elements, such as a common mode inductor and a coupled inductor. A typical inductor has only a single winding, and if the planar magnetic element 7 is a common mode inductor or a coupled inductor, the inductor has two windings with the same number of turns. The detailed structure of the planar magnetic element 7 according to the present embodiment will be further described below.

As shown in fig. 4, the conductive winding 70 of the present embodiment includes a main body 701 and a through hole 702 penetrating through the main body 701. The magnetic core 71 includes a first magnetic core portion 711 and a second magnetic core portion 712. The main body 701 of the conductive winding 70 is located between the first core portion 711 and the second core portion 712. The second core portion 712 has a shaft portion 713, and the second core portion 712 is joined to the first core portion 711 by the shaft portion 713 passing through the through hole 702 of the conductive winding 70, for example, by being bonded with an adhesive material of epoxy resin.

As shown in fig. 4, the magnetic element 7 of the present embodiment further includes a first secondary winding unit 72 and a second secondary winding unit 73, which are completed by a pancake structure, and can be electrically equivalent to a primary winding (primary winding), a secondary winding (secondary winding), and an auxiliary winding (auxiliary winding). In the present embodiment, the first and second secondary winding

units

72 and 73 are in a pancake structure, and the conductive winding 70, the first secondary winding unit 72, and the second secondary winding unit 73 are electrically equivalent to a secondary winding, a primary winding, and an auxiliary winding, respectively. The first secondary winding unit 72 is disposed between the main body 701 of the conductive winding 70 and the first core portion 711. The second secondary winding unit 73 is disposed between the main body 701 of the conductive winding 70 and the second core portion 712, but the invention is not limited thereto. It should be noted that the first secondary winding unit 72 and the second secondary winding unit 73 may also be formed by the PCB multi-layer conductive wire structure manufactured by the above-mentioned manufacturing method.

As shown in fig. 4, the magnetic element 7 of the present embodiment further includes a first insulating film 74 and a second insulating film 75. The first insulating film layer 74 is disposed between the first core part 711 and the first secondary winding unit 72, and the second insulating film layer 75 is disposed between the second secondary winding unit 73 and the second core part 712. Further, the first secondary winding unit 72, the second secondary winding unit 73, the first insulating film layer 74, and the second insulating film layer 75 have through holes corresponding to the through holes 702 of the conductive winding 70, respectively, for the shaft portion 713 of the second core portion 712 to pass through.

In this embodiment, the planar magnetic element 7 further includes: six columnar conductive pins (pin) 761-766 and two lead frames (bobbin) 771-772, wherein each of the columnar conductive pins (conductor plugs) 761-766 is respectively disposed in a groove portion (e.g. a cut through hole) of two opposite sides of the conductive winding 70 of the planar PCB and respectively fixed on the two lead frames 771-772, and the mechanical strength of the columnar conductive pins 761-766 is increased through the lead frames 771-772, wherein the two columnar conductive pins are respectively electrically connected to one winding of the coil winding unit.

In the present embodiment, two ends of the secondary winding formed by the single-layer or multi-layer C-shaped loop-shaped conductive wire structure of the conductive winding 70 of the planar PCB, the primary winding formed by the first secondary winding unit 72, and the auxiliary winding formed by the second secondary winding unit 73 are electrically connected to two of the cylindrical conductive pins, respectively, and the primary winding, the secondary winding, and the auxiliary winding of the planar magnetic element 7 are electrically connected to the system board through six cylindrical conductive pins 761-766. In some embodiments, the planar magnetic device does not include a lead frame, so each of the pillar-shaped conductive pins is disposed in a pin via (not shown), such as a through hole or a cut-off through hole, on two sides of the conductive winding 70 of the planar PCB, and the mechanical strength of the pillar-shaped conductive pins is directly increased through the pin vias.

Referring to fig. 5a, which is a schematic diagram of the present invention that can be mass-produced, it can be seen that a plurality of subunits 50 are simultaneously formed on a whole layer of connected sheet, and after stacking, aligning and pressing with the insulating isolation layer 59, the plurality of conductive windings can be cut to complete the plurality of conductive windings, wherein during stacking and pressing, the plurality of fixing posts 510 are inserted into the fixing holes 511 and the positioning holes 2100 from the stacking direction. Fig. 5b is a schematic diagram showing the structure 51 including the current-blocking structure, but the shape of the current-blocking structure 51 is not limited, but the current-blocking structure is mainly disposed in the outer edge region of the sub-unit 50 of the conductive line structure or between the sub-units 50, and optionally a fixing hole 511 is disposed on the current-blocking structure 51, when stacking and laminating, a plurality of fixing posts 510 are inserted into the fixing hole 511 from the stacking direction, mainly to achieve the effect of reducing the horizontal offset of the conductive line structure in the layer, and achieve the effect of reducing the offset when aligning the conductive line structure layers, for example, as shown in fig. 3b, the horizontal offset between the pins 3101 of the first layer and the pins of the second layer is reduced.

Referring to fig. 6, a schematic diagram of a layered example of a transformer winding unit is shown by using the technical means of the present invention, wherein all the wire structures 601 to 616 are stacked together sequentially by isolation of an insulating layer (not shown in the figure), i.e., the wire structures 601 to 616 are respectively disposed at layers 1 to 16, wherein the

wire structures

601, 604, 605, 608, 609, 612, 613, 616 can conduct between layers through first to fifth contacts (through holes) P1 to P5 on a first side of an upper end of the figure, so as to form a first side winding, and the

wire structures

602, 603, 606, 607, 610, 611, 614, 615 conduct between layers through first to fifth contacts (through holes) S1 to S5 on a second side of the lower end of the figure, so as to form a second side winding, and the central hole can allow an iron core (not shown in the figure) to pass through. The first side winding and the second side winding may be electrically equivalent to a primary winding (primary winding), a secondary winding (secondary winding), or an auxiliary winding (auxiliary winding).

Fig. 7a shows a schematic diagram of the stacked conductive line structures shown in fig. 6, wherein the first to fifth contacts P1-P5 on the first side and the first to fifth contacts S1-S5 on the second side represent nodes of the transformer circuit shown in fig. 7b, respectively, and fig. 7c is a detailed example schematic diagram of the transformer circuit shown in fig. 7b, wherein it is clearly shown that the relationship between each conductive line structure and fig. 6, for example, the conductive line structure 601 on the layer 1 and the conductive line structure 604 on the layer 4 are parallel connections, and the conductive line structure 601 on the layer 1 and the conductive line structure 605 on the layer 5 are series connections. A1, a2, B1, B2, C1, C2, D1 and D2 represent types of shapes of the lead structures, but the shapes of a1, a2, D1 and D2 are substantially the same and the shapes of B1, B2, C1 and C2 are substantially the same through symmetry and inversion, so that only two shapes of lead structures need to be manufactured in this example.

Referring to fig. 8, which is a cross-sectional view showing the improvement of the undercut phenomenon, it can be seen that the undercut distance d1 can be maintained less than 5 μm under the condition of a large current application condition that the copper thickness d4 of the conductive line structure 21 is 0.1-0.3 mm. The thickness of the insulating barrier 22 may range from 0.015mm to 0.200mm, for example (1) the thickness of the wire structure: 0.25mm, thickness of insulating barrier 22: 0.09 mm; (2) thickness of the wire structure: 0.20mm, thickness of insulating barrier 22: 0.15 mm. The multilayer lead structure and the manufacturing method thereof have the main advantages that the electroplating process with high pollution can be omitted, the steps of the process are saved, and the cost is further reduced. And is particularly suitable for large current conducting, small-sized printed circuit board applications, such as multilayer line conducting structures required for power supply lines or planar (thin) conductive windings required for power supply elements, for example, planar transformers or planar inductors (inductors, hooks, common mode hooks, contactors) and other magnetic elements. In the structure of the technical scheme, part of the cutting surface is exposed out of the wire structure, so that whether the finished product of the PCB multi-layer wire structure meets the specification or not, such as the thickness of an insulating isolation layer and the horizontal offset of the wire structure in the layer meet the specification or not, can be detected.

Although the present invention has been described with respect to the preferred embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A method for manufacturing a multilayer conductor structure of a printed circuit board comprises the following steps:

providing a first wire structure and a second wire structure, wherein the first wire structure or the second wire structure comprises a flow resisting structure, a plurality of subunits and at least one connecting strip, the connecting strip is respectively connected to the subunits, the flow resisting structure is arranged in the outer edge area of the subunits or among the subunits, and the flow resisting structure is provided with at least one fixing hole and a fixing column;

providing an insulating isolation layer between the first conducting wire structure and the second conducting wire structure, wherein the thickness of the insulating isolation layer is smaller than that of the first conducting wire structure or the second conducting wire structure;

the fixing column is inserted into the fixing hole along the stacking direction; and

and carrying out a pressing process on the first lead structure, the insulating isolation layer and the second lead structure to ensure that the distance between the first lead structure and the second lead structure is less than the thickness of the first lead structure or the second lead structure, thereby completing the multilayer lead structure of the printed circuit board.

2. The method according to claim 1, wherein the first conductive trace structure and the second conductive trace structure are formed by stamping or etching.

3. The method according to claim 1, wherein the first and second conductive traces are formed of copper or alloy material and are browned to increase surface roughness.

4. The method of claim 1, wherein the insulating barrier layer is made of glass fiber cloth.

5. The method of claim 1, wherein the insulating layer has a thickness ranging from 0.015mm to 0.2mm, and the first and second conductive traces have a thickness ranging from 0.1 to 0.3 mm.

6. The method according to claim 1, wherein the bonding process performed on the first conductive line structure, the insulating barrier layer and the second conductive line structure is a heating bonding process.

7. The method according to claim 6, wherein the heating and pressing process comprises preheating the first and second conductive structures.

8. The method as claimed in claim 1, further comprising performing a cutting process to separate the connecting bar from the plurality of subunits and expose the side surface of the connecting bar.

9. The method of claim 1, further comprising performing a cutting process to separate the connecting strip from the plurality of sub-units, such that the structure is cut away.

10. The method according to claim 8, wherein the connecting strip has at least one positioning hole and at least one fixing post inserted into the positioning hole along the stacking direction.

11. The method for manufacturing a multilayer wiring structure of a printed circuit board according to claim 1, further comprising the steps of: and carrying out a cutting process on the multilayer lead structure of the printed circuit board to separate the connecting strip from the plurality of subunits, and separating the multilayer lead structure into a plurality of subunit multilayer lead structures, wherein a plurality of pins are exposed from the side surfaces of the subunit multilayer lead structures.

12. The method for manufacturing a multilayer wiring structure of a printed circuit board according to claim 11, further comprising the steps of:

providing a conductor plug for electrically contacting the upper and lower adjacent pins exposed from the side surface of the multi-layer lead structure of the subunit.

13. The method for manufacturing a multilayer wiring structure of a printed circuit board according to claim 1, further comprising the steps of: the first conductive line structure, the insulating isolation layer and the second conductive line structure are provided repeatedly.

14. A method for manufacturing a multilayer conductor structure of a printed circuit board comprises the following steps:

providing a first lead structure and a second lead structure, wherein the first lead structure or the second lead structure comprises a plurality of subunits and at least one connecting strip, the connecting strip is respectively connected to the subunits, the first lead structure is provided with a first fixing hole, and the second lead structure is provided with a second fixing hole;

providing an insulating isolation layer between the first conductive line structure and the second conductive line structure;

inserting a first fixing column into the first fixing hole of the first lead structure and the second fixing hole of the second lead structure along the stacking direction; and

and carrying out a pressing process on the first conducting wire structure, the insulating isolation layer and the second conducting wire structure so as to complete the multilayer conducting wire structure of the printed circuit board.

15. The method according to claim 14, wherein after the bonding process, the thickness of the insulating layer between the first conductive structure and the second conductive structure is less than the thickness of the first conductive structure or the second conductive structure.

16. The method as claimed in claim 14, wherein the sub-units of the first conductive line structure have the same shape, and the sub-units of the second conductive line structure have the same shape.

17. The method as claimed in claim 14, wherein the sub-units of the first conductive structure and the sub-units of the second conductive structure are in a ring shape.

18. The method according to claim 14, wherein the first conductive trace structure or the second conductive trace structure further comprises at least one flow-blocking structure disposed at an outer edge region of the sub-units or between the sub-units, the flow-blocking structure having at least one third fixing hole and a second fixing post, the second fixing post being inserted into the third fixing hole along a stacking direction during the pressing process.

19. The method for manufacturing a multilayer wiring structure of a printed circuit board according to claim 14, further comprising the steps of: and carrying out a cutting process on the multilayer lead structure of the printed circuit board to separate the connecting strip from the plurality of subunits, and separating the multilayer lead structure into a plurality of subunit multilayer lead structures, wherein a plurality of pins are exposed from the side surfaces of the subunit multilayer lead structures.

20. The method for manufacturing a multilayer wiring structure of a printed circuit board according to claim 19, further comprising the steps of: providing a conductor plug for electrically contacting the upper and lower adjacent pins exposed from the side surface of the multi-layer lead structure of the subunit.