CN106371972B - For solving the method for monitoring bus and device of data consistency between main equipment - Google Patents
For solving the method for monitoring bus and device of data consistency between main equipment Download PDFInfo
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- CN106371972B CN106371972B CN201610780725.6A CN201610780725A CN106371972B CN 106371972 B CN106371972 B CN 106371972B CN 201610780725 A CN201610780725 A CN 201610780725A CN 106371972 B CN106371972 B CN 106371972B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3027—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3055—Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
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- Quality & Reliability (AREA)
- General Engineering & Computer Science (AREA)
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Abstract
The present invention provides a kind of for solving the method for monitoring bus of data consistency between main equipment, in order to solve the problems, such as consistency maintenance of the main equipment with caching with other main equipments to shared data, the method for monitoring bus can be in real-time monitoring bus to the access request of shared data, and multichannel is carried out with the history bus data of internal storage and is compared, by the judgement of multi-layer, the Data Consistency for currently whether occurring between certain two main equipment is determined.When judgement is implicitly present in data consistency risk, it will Xiang Xiangguan main equipment initiates to interrupt, and so that corresponding main equipment is passed through interrupt handling routine as early as possible and eliminates current data consistency risk.
Description
Technical field
The invention belongs to IC chip intraconnection bus field, more particularly, to one kind for solving between main equipment
The method for monitoring bus and device of data consistency.
Background technique
In a SoC (System on Chip, system-on-a-chip), several main equipments are generally comprised and from equipment,
In main equipment and between equipment, it is connected by the bus of specific protocol, to realize the transmission of data.When multiple main equipments it
Between, certain data, and wherein at least one main equipment are shared within certain a period of time, open caching (cache) to accelerate
The read-write efficiency of shared data will generate data one then having cached between the main equipment of shared data and other main equipments
Cause property problem.I.e. when some main equipment modifies to shared data, other have cached the main equipment of the shared data, can not
By on-chip bus, know that the data are modified.Above situation will lead to the main equipment for having cached shared data and other masters
Equipment, shared data are worth inconsistent risk.
One typical scene of the shared data consistency problem between multiple main equipments is as shown in Figure 1.With caching
Main equipment #0 and main equipment #1 without caching are connected by on-chip bus with from equipment #2.Main equipment #0 and #1 can pass through
Operation of the bus to being read or write from equipment #2, main equipment #0 first have read a shared data from from equipment #2, are worth and are
X0, and the data are stored in the caching of oneself, later, main equipment #1 is changed to from the shared data in equipment #2
It writes, value becomes x1, later, when main equipment #0 reads again the shared data, due to the value of the shared data stored in its caching
Still it is x0, causes main equipment #0 that could not read new value x1, i.e. main equipment #0 and main equipment #1 from from equipment #2 and number has occurred
According to inconsistence problems.
In order to cope with the above-mentioned data inconsistence problems due between more main equipments caused by caching, general there are two types of solve
Method: first is that multiple main equipments is allowed to share the method for L2 cache, this method treatment effeciency is very high, but has to main equipment higher
Requirement, generally require main equipment that will abide by the monitoring protocols of certain set complexity in architecture design, therefore applicability is lower, right
The quantity of main equipment is also restricted, and the data being commonly used between 1 to 4 same type processor synchronize.Second method is will to be total to
Data configuration is enjoyed into non-caching data, this method is solved by way of software, although there is high applicability, damage
Performance of the main equipment when reading shared data is lost.When multiple main equipments with caching, need to read and write shared data repeatedly
When, this method bring performance loss is particularly acute.
Summary of the invention
In view of this, the present invention is directed to propose a kind of for solving the method for monitoring bus of data consistency between main equipment,
It can initiate to interrupt in time when data are inconsistent between there is main equipment, eliminate risk.
In order to achieve the above objectives, the technical scheme of the present invention is realized as follows:
It is a kind of for solving the method for monitoring bus of data consistency between main equipment, specifically comprise the following steps:
(1) signal that bus is sent is received, bus signals are parsed, extract, are packaged and are stored, judge to pass in real time
Defeated address information whether there is identical address information in the address information of bus historical information；
(2) if there is identical address information, then enter read-write judgement, judge whether Current bus access is to write behaviour
Make, if YES, then initiates interrupt requests, meanwhile, corresponding bus historical information is removed；If not, being not processed；
(3) if there is no identical address information, then enter caching and read (cacheline read) judgement, judgement is current
Whether bus access is caching read operation, if it is, the real time information of storage Current bus access；If not, not doing
Processing.
Further, the information in the step (1) after bus parses includes address information, reading writing information, main equipment
Number information, and caching opening imformation.
Compared with the existing technology, of the present invention a kind of for solving the monitoring bus side of data consistency between main equipment
Method has the advantage that
Method of the present invention can in real-time monitoring bus to the access request of shared data, and with internal bus
Historical data carries out multichannel comparison, according to the judgement of multi-layer, determines the data for currently whether occurring between certain two main equipment
Consistency problem, when judgement is implicitly present in data consistency risk, it will Xiang Xiangguan main equipment initiates to interrupt, and makes corresponding main equipment
Current data consistency risk is eliminated by interrupt handling routine as early as possible, treatment effeciency of the present invention is high, strong applicability.
It is a kind of for solving the bus guardian of data consistency between main equipment another object of the present invention is to propose,
It can initiate to interrupt to main equipment in time when realizing that data are inconsistent between there is main equipment, eliminate risk.
In order to achieve the above objectives, the technical scheme of the present invention is realized as follows:
It is a kind of for solving the bus guardian of data consistency between main equipment, including
For parsing the signal for receiving bus and sending, the bus resolver that bus signals are parsed；
For the information of storing and resolving and the storage device of bus historical information；
Address address matching whether identical with multiple bus historical information address for judging bus real time information is sentenced
Disconnected device；
For judge Current bus access whether be write operation read-write judgment means；
For judging whether Current bus access is the caching reading judgment means for caching read operation.
It further, further include screening register in address in the bus resolver.
It is described it is a kind of for solve between main equipment the bus guardian of data consistency with it is above-mentioned a kind of for solving to lead
Possessed advantage is identical compared with the existing technology for the bus guardian of equipment room data consistency, and details are not described herein.
Detailed description of the invention
The attached drawing for constituting a part of the invention is used to provide further understanding of the present invention, schematic reality of the invention
It applies example and its explanation is used to explain the present invention, do not constitute improper limitations of the present invention.In the accompanying drawings:
Fig. 1 for the present invention a simplified more main equipments system-on-a-chip structural schematic diagram；
Fig. 2 is the connection in the system-on-a-chip of more main equipments based on bus guardian described in the embodiment of the present invention
Relationship；
Fig. 3 is the flow chart of monitoring method described in the embodiment of the present invention.
Specific embodiment
It should be noted that in the absence of conflict, the feature in embodiment and embodiment in the present invention can phase
Mutually combination.
The present invention will be described in detail below with reference to the accompanying drawings and embodiments.
The method for monitoring bus of the present invention for being used to solve the Data Consistency between multiple main equipments, monitoring dress
It sets with the connection relationship of the master and slave equipment of bus as shown in Fig. 2, hanging with m (m >=1) with slow in bus in system-on-a-chip
Deposit the main equipment of function, n (n >=1) main equipments and x without caching function (x >=1) are from equipment.Of the invention is total
Line monitoring device is articulated in the slave device port of bus, and can be to any one in the m main equipment with caching function
Or multiple initiation interrupt requests.
Method for monitoring bus of the present invention monitors the access request that each main equipment initiates bus, judges certain
Between two main equipments (2 in m main equipment or 1 in m main equipment and 1 in n main equipment), currently whether deposit
In Data Consistency, if it is present initiating to interrupt to the relevant main equipment with caching function, the main equipment is notified
As early as possible by interrupt processing function, current Data Consistency is released.
Method for monitoring bus flow chart of the present invention as shown in figure 3, bus guardian of the present invention knot
Structure includes at least 3 parts:
(1) bus resolver is responsible for receiving the bus transfer signal issued after bus arbitration, including transmission is opened
Open information, address information, reading writing information, main equipment number information and caching opening imformation.Bus resolver receives information
Afterwards, first effective address information, reading writing information, main equipment number information and caching is filtered out according to transmission opening imformation to open
Open information；
Then on the one hand to be address information is transmitted to storage device indexed, is on the other hand transmitted to the progress of address discriminating gear
Address compares.In addition, in bus resolver, configurable address screening register can be added if necessary, for into
The address filtering of one step.
(2) storage device, one piece for storing the storage array of the historical information extracted through bus resolver, this is deposited
The index address of storage array is a part of the bus address extracted through bus resolver, and the storage content of the storage array is
History reading writing information, history main equipment number information and the history buffer information being packaged through bus resolver.The storage battle array
The size of column according to the addressing range of system-on-a-chip, shared data distribution situations such as depending on, each storage unit corresponding one
The cache unit of a or multiple main equipments.In the micro-structure of storage array, realized using the buffer structure that multichannel group is connected,
To improve the utilization rate of storage array.
(3) address matching judgment means
The bus real time information that bus resolver is sent is compared one by one with multiple bus historical information, detects whether
The historical information on the road You Mou is identical with the extraction address of real time information, if identical, enters read-write judgement；If no
Together, then enter caching and read (cacheline read) judgement.
(4) judgment means are read and write
On the basis of address matching judges, whether the Current bus access for judging that bus resolver is sent is write operation,
If it is, interrupt requests are initiated to related main equipment, to notify the main equipment to handle current Data Consistency in time,
Meanwhile by corresponding bus historical information, removed from storage device；If it is not, then being not processed.
(5) caching reads judgment means
It whether is caching in the Current bus access that the basis of address matching judgment means judges that bus resolver is sent
Read operation, if it is, notice bus resolver, the real time information that Current bus is accessed are stored in the storage of corresponding position
In device, if it is not, then being not processed.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Within mind and principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (2)
1. a kind of for solving the method for monitoring bus of data consistency between main equipment, it is characterised in that: specifically include following step
It is rapid:
(1) signal that bus is sent is received, bus signals are parsed, extract, are packaged and are stored, judge the ground of real-time Transmission
Location information whether there is identical address information in the address information of bus historical information；
(2) if there is identical address information, then enter read-write judgement, judge whether Current bus access is write operation, such as
Fruit be it is yes, then initiate interrupt requests, meanwhile, by corresponding bus historical information remove；If not, being not processed；
(3) if there is no identical address information, then enter caching and read (cacheline read) judgement, judge Current bus
Whether access is caching read operation, if it is, the real time information of storage Current bus access；If not, being not processed.
2. according to claim 1 a kind of for solving the method for monitoring bus of data consistency between main equipment, feature
Be: the information in the step (1) after bus parses includes address information, reading writing information, main equipment number information, and
Cache opening imformation.
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| CN106371972B true CN106371972B (en) | 2019-04-05 |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US11551067B2 (en) | 2017-04-06 | 2023-01-10 | Shanghai Cambricon Information Technology Co., Ltd | Neural network processor and neural network computation method |
| CN108694181B (en) * | 2017-04-06 | 2021-06-11 | 上海寒武纪信息科技有限公司 | Data screening device and method |
| CN107454072B (en) * | 2017-07-28 | 2020-04-17 | 中国人民解放军信息工程大学 | Comparison method and device for multi-channel data content |
| CN110361979B (en) * | 2019-07-19 | 2022-08-16 | 北京交大思诺科技股份有限公司 | Safety computer platform in railway signal field |
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| US5987571A (en) * | 1996-04-24 | 1999-11-16 | Hitachi, Ltd. | Cache coherency control method and multi-processor system using the same |
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