CN106358342B

CN106358342B - Dimming drive circuit

Info

Publication number: CN106358342B
Application number: CN201510435970.9A
Authority: CN
Inventors: 许明伟; 高智浩
Original assignee: Shanghai Simax Technology Co ltd
Current assignee: Shanghai Simax Technology Co ltd
Priority date: 2015-07-22
Filing date: 2015-07-22
Publication date: 2020-04-03
Anticipated expiration: 2035-07-22
Also published as: CN106358342A

Abstract

The invention mainly relates to the field of light-emitting device driving, in particular to a dimming driving circuit and a dimming method for driving an LED in a voltage conversion power supply system based on alternating current commercial power, which can realize that the duty ratio of a PWM driving signal linearly changes along with the change of an alternating current phase cutting angle. A dimming unit is used for detecting the change condition of the conduction angle of the alternating current, and meanwhile, the duty ratio of a modulation signal is controlled to change along with the change trend of the conduction angle.

Description

Dimming drive circuit

Technical Field

The invention mainly relates to the field of light emitting device driving, in particular to a dimming driving circuit and a dimming method for driving an LED in a voltage conversion power supply system based on alternating current commercial power, which can realize that the duty ratio of a PWM driving signal linearly changes along with the change of an alternating current phase cutting angle.

Background

With the increasing severity of global energy and environmental resource problems, the white light LED of the solid-state light source is gradually called as an engine for green lighting by virtue of the advantages of energy conservation, environmental protection, safety, reliability and the like, and along with this, the driving power becomes an important link in the LED lighting industry chain, and the driving power is continuously developed towards the trends of high efficiency, low power consumption, safety, environmental protection and low cost. Meanwhile, it is considered that the LED lighting device is substantially a dc driving device, and a driving circuit for providing a constant current is required, so that the driving chip for managing the white LED is also spotlighted as a mainstream direction for characterizing the power management products, and faces a technical challenge of continuously improving various performances.

The traditional incandescent lamp and fluorescent lamp generally adopt a TRIAC dimmer, and one of the first problems in promoting the white light LED lighting technology is how to realize the adjustable lighting intensity by being compatible with the TRIAC dimmer on the LED driving scheme. Unfortunately, the prior art is less than ideal for providing a driving scheme based on adjusting the illumination intensity of an LED device using a TRIAC dimmer that is efficient and can respond instantaneously. On the premise that the invention converts the voltage of the alternating current commercial power into the direct current voltage, the TRIAC dimmer is used for synchronously realizing that the duty ratio of the PWM pulse driving signal is linearly changed along with the change of the phase cutting angle of the alternating current.

Disclosure of Invention

In an alternative embodiment, the present invention provides a dimming driving circuit, comprising: a thyristor dimmer for adjusting the conduction angle of the received alternating current; the voltage converter generates preset average current to load or provide output to a load according to the direct current input voltage because the direct current input voltage is provided by the alternating current which is output by the phase-cut angle of the silicon controlled rectifier dimmer and rectified by the rectifier; a control module, the control module is used for generating a modulation signal, and the switching of the switching tube in the voltage converter between on and off is mainly used for defining whether to use the input voltage to transmit voltage and/or current to the load, for example, a Buck converter can transmit voltage and/or current to the load when the input voltage of the switching tube is in the on stage and cannot be transmitted in the off stage, or the other way is the opposite, for example, a flyback converter can only store energy to the primary winding when the input voltage of the switching tube is in the on stage and transmits voltage and/or current to the load by using the stored energy when the input voltage is in the off stage, and the generated modulation signal is used for driving or controlling the on and off of the switching tube; the dimming unit is used for detecting the change of the conduction angle and reflecting the change condition of the conduction angle by using an average voltage value of the sampling, and the dimming unit enables the change trend of the duty ratio of the modulation signal to be consistent with the change trend of the conduction angle while the silicon controlled rectifier dimmer changes the conduction angle of the alternating current, and the duty ratio can be linearly changed along with the change of the conduction angle under certain conditions like the synchronous increase or decrease.

In the dimming driving circuit, the voltage converter is configured with a floating ground reference potential different from a ground reference potential of the input voltage, so that when the switching tube is driven by the modulation signal, the modulation signal is referenced to the floating ground reference potential, and the dimming unit samples and acquires an average voltage value of the output voltage at a voltage output node of the voltage converter; an error amplifier in the control module compares and amplifies a difference value between a reference voltage and a feedback voltage representing the magnitude of current flowing through a load, the error voltage output by the error amplifier generates an integral voltage on a first capacitor, and the dimming unit pulls down the integral voltage to force the duty ratio of the modulation signal to be reduced when the conduction angle is reduced to reduce the average voltage value. In a BUCK or similar topology, for example, the integrated voltage and sawtooth waveform are passed through a PMW comparator to generate a modulated signal.

In the above-mentioned dimming driving circuit, the dimming unit includes a first diode and first and second resistors connected in series between the output node and the floating ground reference potential, an anode of the first diode is connected to the output node and the first and second resistors are connected in series between a cathode of the first diode and the floating ground reference potential; further comprising a second diode and a third resistor connected in series between a common node at the interconnection of the first and second resistors and a first terminal of said first capacitor, and a second capacitor connected in parallel with the second resistor, wherein a first terminal of the second capacitor and a cathode of the second diode are connected to said common node providing said average voltage value, and the third resistor is connected between an anode of said second diode and a first terminal of the first capacitor, second terminals of the first and second capacitors being arranged to be connected to the floating ground reference potential.

In the above-mentioned dimming driving circuit, the dimming unit includes a first diode and first and second resistors connected in series between the output node and the floating ground reference potential, an anode of the first diode is connected to the output node and the first and second resistors are connected in series between a cathode of the first diode and the floating ground reference potential; a common node providing the average voltage value at the interconnection of the first and second resistors is coupled to a first terminal of the first capacitor, a second terminal of the first capacitor being configured to be connected to the floating ground reference potential.

In the dimming driving circuit, when the sum of the average voltage value and the forward conduction voltage of the second diode approaches to be equal to the integral voltage, the dimming unit fails; when the thyristor dimmer changes the conduction angle of the alternating current to the state that the sum of the average voltage value and the forward conduction voltage of the second diode is lower than the voltage output by the output end of the error amplifier, the second diode and the third resistor between the first end of the first capacitor and the common node form a current path, so that the integrated voltage is pulled down by the path.

In the dimming driving circuit, the integrated voltage is directly clamped by the average voltage value, so that the variation of the integrated voltage is consistent with the variation of the average voltage value, and the average voltage value consistent with the variation trend of the conduction angle directly changes the duty ratio of the modulation signal.

In the dimming driving circuit, the voltage converter is configured with a reference ground potential that is the same as a ground reference potential of the input voltage, so that when the switching tube is driven by the modulation signal, the modulation signal is referenced to the ground reference potential, and the dimming unit samples the input voltage received by the voltage converter to acquire an average voltage value of the input voltage; an error voltage output by an error amplifier in the control module generates an integral voltage on a first capacitor, wherein the error amplifier compares and amplifies a difference value between a reference voltage and a feedback voltage representing the magnitude of current flowing through a load, and the dimming unit pulls down the integral voltage and forces the duty ratio of the modulation signal to be reduced when the conduction angle is reduced to reduce the average voltage value.

In the above dimming driving circuit, the dimming unit includes a first diode and first and second resistors connected in series between the input voltage and the ground reference potential, an anode of the first diode is connected to the input voltage, and the first and second resistors are connected in series between a cathode of the first diode and the ground reference potential; and a second diode and a third resistor connected in series between a common node at which the first and second resistors are interconnected and a first terminal of said first capacitor, and a second capacitor connected in parallel with the second resistor, a first terminal of said second capacitor being connected to said common node providing said average voltage value, wherein respective second terminals of the first and second capacitors are connected to a ground reference potential.

In the dimming driving circuit, the anode of the second diode is connected to the first end of the first capacitor, and the third resistor is connected between the cathode of the second diode and the common node; or the cathode end of the second diode is connected with the common node, and the third resistor is connected between the anode end of the second diode and the first end of the first capacitor.

In the above dimming driving circuit, the dimming unit includes a first diode and first and second resistors connected in series between the input voltage and the ground reference potential, an anode of the first diode is connected to the input voltage, and the first and second resistors are connected in series between a cathode of the first diode and the ground reference potential; and a common node at the interconnection of the first and second resistors for providing the average voltage value is coupled to a first terminal of the first capacitor, and a second terminal of the first capacitor is connected to a ground reference potential.

In the dimming driving circuit, the average voltage value directly clamps the integral voltage, so that the variation of the integral voltage is consistent with that of the average voltage value, and the average voltage value consistent with the variation trend of the conduction angle can directly change the duty ratio of the modulation signal.

In the dimming driving circuit, the integrated voltage generated by integrating the first end of the first capacitor is compared with a sawtooth wave through a PWM comparator of the control module, and the comparator is used to generate the modulation signal.

Drawings

The features and advantages of the present invention will become apparent upon reading the following detailed description and upon reference to the following drawings:

fig. 1A is a basic circuit architecture diagram of a conventional TRIAC dimmer.

Fig. 1B is an original ac waveform input to the TRIAC dimmer.

Fig. 1C is a waveform after a sine wave of an alternating current is phase-angle-cut by a TRIAC dimmer.

Fig. 2 is a schematic diagram of a dimming driving circuit according to the present invention, which implements linear variation of the duty ratio of a PWM modulation signal with variation of the alternating current conduction angle based on sampling the output voltage of a voltage converter.

Fig. 3 is an example of generating a PWM modulated signal.

Fig. 4 is a light-adjusting unit illustrated by a floating-ground Buck-type voltage converter according to the present invention.

Fig. 5 is a simplified dimming unit illustrated by a floating-ground Buck-type voltage converter according to the present invention.

Fig. 6 is a schematic diagram of a dimming driving circuit according to the present invention, which implements linear variation of the duty ratio of a PWM modulation signal with variation of the alternating current conduction angle based on sampling of the input voltage of the voltage converter.

Fig. 7 is a light-adjusting unit for a flyback voltage converter with a real-time architecture according to the present invention.

Fig. 8 is a dimming unit according to the present invention, which is illustrated by taking a ground-based Buck-Boost type voltage converter as an example.

Fig. 9 is a light modulation unit illustrated by a ground-based Buck-type voltage converter according to the present invention.

Detailed Description

The technical solutions of the present invention will be clearly and completely described below with reference to various embodiments, but the described embodiments are only used for describing and illustrating the present invention and not for describing all embodiments, and the solutions obtained by those skilled in the art without making creative efforts belong to the protection scope of the present invention.

A TRIAC commonly used in dimmers used in the lighting field is commonly referred to in the industry as a TRIAC, and is primarily operated as a three-pole AC SWITCH (TRI-thyristor AC SWITCH), which is commonly termed a TRIAC or a TRIAC. Referring to fig. 1A, in a TRIAC dimmer, the ac power V input at the

input lines

101, 102 is no matter what the ac power V is applied at the control electrodes of the TRIAC as long as the appropriate trigger pulse is applied at the control electrodes_ACIs turning toAnd the two-way silicon controlled rectifier TRIAC is triggered and conducted in the half cycle or the negative half cycle. This mode of operation of the dimmer, which has an input P, is described in detail below₁And an input terminal P₂And has an output terminal P connected to a load₃And an output terminal P₄Connected in series at the input terminal P₁(i.e., input line 102) and output terminal P₃Protective resistance R between_W1Adjustable resistance R_W2And a capacitor C_WForming a phase-shift trigger network, and connecting the other two ports of the non-control end of the bidirectional triode thyristor TRIAC to the input end P₁And an output terminal P₃Thereby connecting the TRIAC and the phase-shift trigger network in parallel, and a capacitor C_WA bidirectional trigger diode DIAC and a capacitor C are connected between one end of the bidirectional trigger diode TRIAC and the control electrode of the bidirectional thyristor TRIAC_WAnd the other end of the same is coupled to one of the two ports of the TRIAC. The TRIAC operates in such a way that the AC current supplied to the

input lines

101, 102 is supplied to the capacitor C during the positive half cycle_WCharging, once the capacitor C is charged_WWhen the voltage accumulated at the end connected to the DIAC rises to the forward blocking voltage of the DIAC, the DIAC is broken down and the TRIAC is triggered, so that the output P is connected to₃And P₄To provide power to the load. Similarly, during the negative half cycle, once the capacitance C is reached_WWhen the voltage accumulated at the end connected to the DIAC rises to the reverse blocking voltage of the DIAC, the DIAC is also broken down and conducted, further triggering the TRIAC to conduct. We adjust the adjustable resistance R_W2The resistance value can change the capacitance C_WThe voltage conduction angle of the triac TRAIC is changed, and the current flowing through the load is changed, so that the brightness of the load of the light-emitting device is changed along with the adjustable resistor R_W2Is varied. TRIAC dimming, also known as phase dimming, is based on the principle of modulating the conduction angle θ of a TRIAC to an input AC sinusoidal voltage V_ACChopping, so-called phase-cutting, is performed to reduce the effective value of the output voltage.With positive and negative amplitudes V in FIG. 1B_HVAc sine wave V_ACThe waveform after a phase cut is shown in FIG. 1C, in any one of the positive or negative half cycles, the control angle α represents the phase angle from zero to the triggering DIAC DIAC conduction and the TRIAC is not conducting in the range of the control angle α, and the conduction angle θ represents the range of phase angles at which the TRIAC begins to be triggered and the TRIAC continues to conduct in the range of the conduction angle θ in the positive or negative half cycles (the shaded portion in FIG. 1C represents V)_ACThe voltage waveform reserved for TRIAC conduction after chopping), theta-pi- α, if the reader is inconvenienced by the difference in terms, we can understand that the conduction angle theta in this application can be understood as any sine wave voltage V in positive and negative half periods_ACThe more the phase angle cut, the smaller the conduction angle θ. Although there are many improvements in the industry to TRIACs, the basic principle is based on the description of FIGS. 1A-1C.

In fig. 2, the input terminals P of two bus lines, i.e., a pair of

input lines

102 and 101, respectively₁、P₂Between the two input sine AC voltage V provided by commercial power_ACMay be at the input P of an input line 102₁And an output terminal P₃Connected to a triac dimmer 111 as described above, with a sinusoidal ac voltage V_ACAfter a desired adjustment of the conduction angle theta by the triac dimmer 111, the resulting set of outputs P at the

input lines

102, 101₃、P₄And a chopped wave after phase angle cutting is generated. The chopped wave is transmitted to the bridge rectifier 112 of the next stage, and the chopped wave, which is still an AC component, is rectified by the bridge rectifier 112 to provide the input voltage V_IN. It is worth emphasizing that the input voltage V for providing to the voltage converter 113 as will be described shortly hereinafter is used_INThe voltage may be a pulsating voltage having an ac component, or a dc voltage obtained by filtering out ripples from the output of the rectifier 112 by a filter capacitor or the like. Thus, it should be recognized that the input voltage V is read herein_INIt may be a rectified ac or dc component in nature.

Referring to fig. 2, a voltage converter (Voltage converter)113 is based on the supplied input Voltage V_INGenerating a predetermined average current output to the load 114, the voltage converter 113 naturally provides the load 114 with an operating voltage, but requires constant current control when the load 114 is a white LED. In one embodiment of fig. 2, the modulated signal S is generated by a control module 115_PWME.g., a pulse width modulated signal, is coupled to the control terminal of the switching tube for power conversion in the voltage converter 113. The main switch tube of the voltage converter 113 is usually connected in series with an inductive element, and the energy storage process of the inductive element is the process of the current flowing through the inductive element from zero to the steady state maximum value, and once the switch tube is switched between on and off, the input voltage V can be determined_INWhether energy is transferred directly to the inductive element. For example, during the switching period, the switch is turned on to switch on the input voltage V of the voltage converter 113_INForm a current path with the inductive element to cause current to flow through the inductive element and transfer energy to the inductive element, and vice versa, the input voltage V being applied once the switching tube is closed_INThe current cannot be supplied to the inductive element due to the failure of a path to the switching tube, and this stage is instead the process of the inductive element discharging energy, which will be described in the following. During the switching process of the switch tube, a dimming unit 116 needs to monitor the change condition of the conduction angle θ in real time as a basis for adjusting the PWM duty ratio, and can be used for providing the output voltage V from the voltage converter 113_OUTTo sample the output voltage V_OUTAn average voltage value V of_SAMThe sampled voltage is taken as the AC voltage V_ACAnd executing the result of real-time detection of the output voltage after phase angle cutting. The dimming unit 116 utilizes the average voltage value V_SAMChanging the AC voltage V at the SCR dimmer 111_ACWhile the conduction angle theta is kept, the modulation signal S is also enabled_PWMThe Duty Ratio of (a) changes with a change in the conduction angle θ, and how the present invention achieves this will be described in detail later.

According to the safety standard of each country or each region of the world, such as UL, CE, CCC and the likeThe power factor PFC of an electric product has certain specification requirements. For example, ERP certification specifies that power is less than or equal to 2W without power factor requirements, but 2W to 5W requires a PF value greater than 0.4, 5W to 25W requires a PF value greater than 0.5, and exceeding a greater power of 25W requires a PF value greater than 0.9. Further, as the energy star specification standard provides that for LED lighting products larger than 5W, the power factor index PFC must be larger than 0.7. For LED lighting, the method for realizing a high PF value needs to adopt capacitance compensation, so that the control chip fixes the on-time in a short time, and the power factor of the switching type LED constant current source is improved, and the basic principle of this technique is shown in fig. 3. Referring to fig. 3, an error amplifier a2 processes the external signal, a first capacitor C₁For compensating the capacitance, a first capacitor C₁The voltage output by the error amplifier A2 is integrated so as to be in the first capacitor C₁To generate an integral voltage V_COMPI.e. to obtain an average voltage. Integral voltage V_COMPAnd sawtooth wave V_SLOAfter comparison by a PWM comparator A1, a pulse width modulation signal S is obtained_PWMAnd is used for controlling the switching tube in the voltage converter 113 to form a loop. Wherein the loop response speed of the error amplifier A2 and the comparator A1 is faster than that of the first capacitor C₁The speed of discharge is much faster and the result produced by amplifier a2 needs to be delayed for a period of time before it can be driven by V_COMPThe voltage is reflected, the driving current of the amplifier A2 is small, and the error amplifier A1 and the comparator A are relatively independent, so whether the comparator A1 works normally depends on V only_COMPAnd (4) processing the voltage.

It must be emphasized that although the control module 115 generates the modulated signal S_PWMThere are many ways of describing this invention, but in order to clarify the inventive spirit of the present application, it is described temporarily with the help of a simplified model in fig. 3, but it must be stated that this simplified model is only an explanatory example, but the invention is not limited to this particular model, and a person skilled in the art realizes that it can be replaced by any equivalent form proposed on the basis of the inventive spirit.

Referring to FIG. 4, the input voltage V_INFrom

input lines

201, 202 to oneA Buck Buck converter having an input line 202 with a reference ground GND1 and an input voltage V on an input line 201_INIs a potential that is present with respect to a ground reference potential GND1 (or ground, common ground, and/or system ground, etc.). A switching transistor Q1 used for power conversion may be, for example, a MOSFET of NMOS type, the drain terminal (input terminal) of the switching transistor Q1 being connected to the input line 201, and a sense resistor R being connected between a node N1 at the source terminal (output terminal) and a first terminal of an inductor L1_CS1And an output capacitor C is connected between a node N2 at the other second end of the inductor L1 and a reference ground potential GND1_OUTAnother freewheeling diode D_FW1Is connected to a ground reference potential GND1 and the freewheeling diode D_FW1Is connected to node N1, and ultimately we generate the desired output voltage V at output node N2_OUTFor providing an operating voltage to the LED load 114. The anode terminal of the first LED of the first one of the series of one or more LED loads 114 is connected to the output node N2, and the cathode terminal of the last one of the series of LED loads 114 is connected to the ground reference GND 1. The current sampling in fig. 4 is: a detection resistor R is connected between the node N1 and the first end (with a floating ground GND2) of the inductor L1_CS1And the monitored current flows through the detection resistor R_CS1The current multiplied by the resistance of the resistor can be converted into a detection voltage V_CS。

In fig. 4, the Buck converter has a Floating port GND2(Floating GND) configured and having a Floating ground potential, such as sense resistor R_CS1And the first end of the inductor L1 has the one floating ground GND 2. The reference voltage of the voltage converter is the chip ground or the floating ground GND2, and the input voltage V_INReference ground GND1, i.e. system ground, is used, it being clear that these are actually different potentials. Especially, when the gate of the power switch Q1 is controlled to switch between the on state and the off state, the potentials of the two grounds are different, so the embodiment of fig. 4 is called a floating-ground BUCK type BUCK circuit, and the topology structure greatly simplifies the manufacturing of the transformer,the size of the transformer is reduced, the requirement on the voltage withstanding value of the MOS switching tube Q1 is lower, the efficiency is improved, and meanwhile, the structure naturally reduces ripples, so that the output capacitor C_OUTCan be small.

In FIG. 4, since the voltage V is sampled_CSCan be substantially characterized or converted into the current flowing through the load, and only the sampling voltage V is controlled and limited_CSThe current value flowing through the load is controlled, the generated preset average value current output to the load is controllable, and the light emitting diode is controlled in a constant current mode. Sampled voltage V for controlling the magnitude of current flowing through load 114_CSA first terminal, e.g., a non-inverting input terminal, of the error amplifier A2, and a reference voltage V_REFThen to a second terminal, e.g., an inverting input, of the error amplifier a 2. The sawtooth wave V generated by the Oscillator (OSC)125 in FIG. 3_SLOThe second terminal, e.g., the inverting input terminal, of the PWM comparator A1 is input to the error amplifier A2 at the first capacitor C₁The integrated voltage V generated at the node N3 at the ungrounded end_COMPIs input to a first terminal, e.g., a non-inverting input terminal, of the PWM comparator A1, thereby generating a PWM signal S by the PWM comparator A1_PWMAnd is used for driving the switching tube Q1. The dimming unit 116 includes a first diode D1 and first and second resistors R1 and R2 connected in series between an output node N2 and a floating ground GND2, wherein an anode terminal of the first diode D1 is connected to the output node N2, and the first and second resistors R1 and R2 are connected in series between a cathode terminal of the first diode D1 and the floating ground GND 2. Wherein the dimming unit 116 further comprises a second diode D2 and a third resistor R3, the second diode D2 and the third resistor R3 are connected in series with a common node N4 at the interconnection of the first resistor R1 and the second resistor R2 and the first capacitor C₁A node N3 at the non-grounded end, and a second capacitor C of the dimming unit 116₂A second capacitor C₂In parallel with the second resistor R2. Second capacitor C₂And the cathode terminal of the second diode D2 are connected to provide an average voltage value V_SAMAnd the third resistor R3 is connected to the second resistor at the common node N4Anode terminal of diode D2 and first capacitor C₁A first capacitor C between the node N3 at one end₁A second capacitor C₂And the opposite end is connected to a floating ground GND 2.

Because of the floating Buck circuit architecture, the chip ground of the voltage converter, i.e., the floating ground GND2 (e.g., the first end of the inductor L1 is configured as GND2) and the bus ground providing the input voltage, i.e., the ground reference GND1 (e.g., the input line 202 is configured as GND1) belonging to the ground are not the same ground, and both the chip ground and the system ground are changed at any time, the sampling point for extracting the change voltage of the inductor L1 should be based on the floating ground GND2, which will be explained in detail further below. The operation mechanism of the dimming unit 116 is that when the dimming unit 116 is in the first normal operation state, the sine wave input voltage V is not applied_ACPhase cut, the resistance values of the first and second resistors R1, R2 may be configured to be adjusted such that V_SAM+V_TH≈V_COMPThe relation represents the voltage V of the node N3_COMPVoltage V approximately equal to node N4_SAMPlus the forward conduction voltage drop V across the second diode D2_TH(the so-called forward turn-on voltage of the Diode is sometimes also referred to as the threshold voltage). It is to be noted here that the diode forward conduction voltage drop V is different in nature_THA slight difference is that, for example, the forward conduction voltage drop of a silicon diode is about 0.7 volts, while the conduction voltage drop of a germanium diode is about 0.3 volts, and the schottky diode is lower. The dimming unit 116 does not operate in this phase, and the preset average current flowing through the load 114 can be controlled to be almost constant.

When a sine wave voltage V is input_ACAt the beginning of phase angle cut, the dimmer unit 116 enters a second operating state phase in which the comparator A1 is affected by two loops, the first loop being the average voltage value V sampled by rectification via the BUCK circuit, the sampled node N2_SAMIntegral voltage V_COMPComparator A1, and modulated signal S_PWMThe current fed back to the Buck converter begins to decrease in energy at node N2 in the first loop, and the integrated discharge period at node N4 yields the average voltageValue V_SAMThe decrease is started. Second loop, the control module 115 detects the current flowing through the load 114, i.e., the sampled voltage V_CSTo begin decreasing, the comparator A1 and error amplifier A2 loop strives to increase the PWM duty cycle in an attempt to normalize the output current flowing through the load 114, which in turn results in the integrated voltage V at node N3_COMPRises, thereby generating a voltage difference. It can be easily understood that the integrated voltage V at node N3_COMPThe voltage is affected by the combination of the two loops, once the current output by the error amplifier A2 increases, but due to the integrated voltage V at node N3_COMPAnd node N4 outputs an average voltage value V_SAMA non-negligible voltage difference exists between the two signals, which immediately makes the integrated voltage V at the node N3_COMPThe electricity drops. In one aspect, a sine wave V is input_ACThe reduction of the cut angle, i.e. the conduction angle theta, results in an input voltage V_INIs reduced, and on the other hand, the modulation signal S of the control switch Q1_PWMThe duty cycle of the light source cannot be increased, so that the average current finally output to the load 114 is naturally reduced to achieve the dimming effect.

The dimming unit 116 is in the second operating state (inputting sine wave V)_ACChamfered) specific operating modes will be described one by one below. In fig. 4, a resistor R4 connected between the node N3 and the output of the error amplifier a2 is an internal resistor of the chip, for example, the resistor R4 is a parasitic/intrinsic output resistor of the error amplifier a2, which has a much larger resistance value than the third resistor R3. Sine wave voltage V_ACAfter being cut off a portion of the angle by the triac dimmer 111, the second loop mentioned above attempts to force the integrated voltage V at node N3 in order to maintain a constant current_COMPRise substantially due to the error voltage V output from the output of the error amplifier A2_EAIncrease induced. At the same time due to the sine-wave voltage V_ACCut off a part of the angle resulting in a decrease of the potential of the sampling node N2, here for the output voltage V_OUTAverage voltage value V of sampling_SAM(at node N4) is the voltage integrated over the discharge portion of inductor L1, with the average voltage value V_SAMOf the tendency of variation and the conduction angle theta of the alternating currentThe variation trends are consistent, i.e. the synchronous increase or decrease, finally makes V_EA＞V_SAM－V_TH，V_THIs the forward conduction voltage drop or threshold voltage of the second diode D2. Then there is current flowing between the third resistor R3 and the output resistor R4 of the error amplifier a2, but due to the first capacitor C1 and the second capacitor C2, the average voltage V is obtained at this stage_SAM(at node N4) and the integrated voltage V_COMP(at node N3) is actually close to DC, i.e. the whole circuit tries to integrate the voltage V_COMPFixed at a predetermined voltage, so that the modulated signal S_PWMTends to be substantially fixed throughout the power frequency.

But the voltage V output from the output terminal of the error amplifier a2_EAIncreasing, by the average voltage value V of the sample_SAM(at node N4) and the voltage V at the output of the error amplifier A2_EAThe voltage difference between the first diode D2 and the third resistor R3 and the resistor R4 will change the integral voltage V_COMPValue (at node N3), integral voltage V_COMPCorresponding to making a sawtooth wave V_SLOAnd integral voltage V_COMPThe crossing point of (2) occurs in advance, so the conduction time of the main switch tube Q1 is shortened, and the modulation signal S can be enabled_PWMThe duty cycle or period of (a) is reduced.

V_COMP＝V_SAM+V_TH+(V_EA-V_SAM-V_TH)×R3/(R3+R4)……(1)

V_COMP＝V_TH+(V_EA×R3+V_SAM×R4-V_TH×R3)/(R3+R4)……(2)

The physical meaning of the characterization of the functional relation (1) represents the voltage V of the node N3_COMPMinus the forward conduction voltage drop V of the second diode D2_THAnd the voltage V of the node N4 is subtracted_SAMThe difference is divided by the resistance R3 to obtain the current flowing through the third resistor R3, which is equal to the current flowing through the third resistor R3 and the resistor R4. Voltage V_EAMinus the forward conduction voltage drop V of the second diode D2_THAnd the voltage V of the node N4 is subtracted_SAMAfter the difference of (2), is further dividedThe current flowing through the third resistor R3 and the resistor R4 is represented by the resistance value (R3+ R4). Relation (2) is an equivalent variant of relation (1), i.e. V on the right side of the equation of functional relation (1)_SAMFirst multiplied by one (R)₃+R₄) Is further divided by one (R)₃+R₄) And then combining the same terms on the right side of the equation to obtain the functional relation (2).

R3 and R4 in the functional relations (1) and (2) represent the respective resistances of the third resistor R3 and the resistor R4, respectively, and it has been mentioned above that the resistor R4 is the parasitic/intrinsic output resistor of the error amplifier A2, and its resistance R4 is much larger than that of the third resistor R3, and furthermore, the voltage V is_SAMIs also much higher than the voltage V_EARate of change of (1), then V_SAMThe rate of change of xr 4 is much greater than V_EAXr 3, V can be omitted from the numerator of the functional formula (2) as long as we can reasonably arrange the resistance values R1, R2, R3 and R4_EAXr 3 term, such that the voltage V_COMPApproximately equal to the voltage V at the node N4_SAMThe linear change law is maintained. In other words, when the sine wave V is inputted_ACPhase-angle-cut, results in a voltage V sampled at node N2_SAMDecreases, further causing the voltage V at node N4_SAMFollow voltage V_SAMThe linearity decreases, resulting in a modulated signal S_PWMWith the duty cycle or period of the voltage V_SAMThe linearity is decreased, and the on-time of the switching tube Q1 is decreased in the period, so that the energy flowing into the inductor L1 is also decreased in the discharging stage, and the preset average current flowing through the load 114 is decreased to directly decrease the LED light intensity.

In summary, as long as the average voltage of the sampling point N2 changes linearly along with the change of the cut angle of the sine wave, the voltage V at the node N3 can be enabled to be changed in the whole Buck circuit_COMPAlso linearly varies with the magnitude of variation of the cut angle of the sine wave, and further S can be realized_PWMThe duty cycle of the waveform varies linearly with the angle of cut, and it can be seen that the advantages achieved by the present invention are readily appreciated by those skilled in the art.

The embodiment of FIG. 4 is a relatively more accurately calculated toneThe optical unit 116 changes the modulation signal S output by the control module 115_PWMThe method of (3), but in driving schemes where the accuracy requirements are not very high, the second diode D2 and the second capacitor C may also be omitted from the dimming cell 116 shown in fig. 4₂And a third resistor R3, the embodiment of fig. 5 is different from the embodiment of fig. 4 in that the three components are omitted, and the others are not different. The dimming unit 116 includes a first diode D1 and first and second resistors R1, R2 connected in series between the output node N2 and a floating ground GND2, an anode terminal of the first diode D1 is connected to the output node N2, the first and second resistors R1, R2 are connected in series between a cathode terminal of the first diode D1 and the floating ground GND2, and the first and second resistors R1, R2 provide an average voltage V_SAMIs coupled to a node N3 at one end of a first capacitor C1, and the other end of the first capacitor C1 is connected to a floating ground GND 2. Since the node N3 is directly coupled to the node N4, the average voltage V is realized through the node N4_SAMDirectly clamping the integrated voltage V of node N3_COMPIntegral voltage V_COMPThe variation of the voltage is followed by the output voltage V sampled and extracted at the output node N2_OUTAverage voltage value V of_SAMThe average voltage value V that changes with the change of the conduction angle theta_SAMDirectly varying the modulated signal S_PWMFor example, the average voltage value V is set to be smaller when the cut angle is smaller and the conduction angle theta is slightly larger_SAMAnd an integral voltage V_COMPAre all slightly increased, or the average voltage value V is obtained when the cut angle is increased and the conduction angle theta is slightly decreased_SAMAnd an integral voltage V_COMPAre slightly reduced. The desired dimming function of embodiment 4 can be basically achieved in the embodiment of fig. 5, and the voltage V at the node N3 can be obtained in the Buck circuit as long as the voltage at the sampling point N2 changes linearly as the sine wave is cut off_COMPThe S is further realized by linear change along with the size of the cut angle of the sine wave_PWMThe duty cycle of the waveform varies linearly with the variation of the cut angle, and the dimming measures are not described in detail since they are described in detail above.

It must be stated that the topologies used as examples in fig. 4-5 are only intended to demonstrate to the reader of the present application more generally the general meaning of the spirit of the invention in the applicable range of voltage converters, but do not constitute any particular limitation, they can be replaced by various applicable other topologies of any kind of transformation.

In the above, it is explained that the BUCK floats on the ground, the chip ground and the bus ground are not at the same potential, and the chip ground and the bus voltage change at any time, and it is explained in more detail that the source potential of the MOS switch Q1 (i.e. the actual reference ground of the driving signal for driving the MOS switch) follows the diode D_FW1Is turned on and off to occur at about-V_THAnd + V_INVariation of such amplitude is dithered, here V_THIs a diode D_FW1Is instead V_INThe voltage is input, so that the modulation signal is actually referenced to the floating ground reference potential GND2 when the switch tube Q1 is driven by the modulation signal to switch between ON and OFF. Considering that direct sampling on the bus may not be able to perform real-time reactive feedback on the voltage after the phase-cut angle, the sampling point N2 becomes the sum output voltage V_OUTThe power supply ends are the same, the voltage average value V is obtained by sampling from a main inductor L1 and rectifying through a first diode D1_SAM. Cutting off sine wave V when thyristor TRIAC dimmer_ACAfter a part of angles, the energy stored by the main inductor L1 is reduced compared with the energy during normal operation, the average voltage across the inductor L1 is reduced, and the average voltage V obtained after rectification and filtering is reduced_SAMWill also decrease resulting in an integrated voltage V across the first capacitor C1_COMPReduced, but because the original function of the control module itself considers V_COMPNeed to rise, or frequency need to change, but external drive capability is greater than internal drive capability so V at node N3_COMPIs determined externally, and the integral voltage V is forced to be_COMPThe voltage value of (c) is decreased accordingly. Similarly, the dimming function realized by the circuit can also be applied to some topological situations of Non-Floating GND (Non-Floating GND), the following contents of the invention will introduce the FLYBACK, Buck-Boost and the Non-Floating ground (NFG) circuit of the traditional Buck, and since the chip ground of the Non-Floating ground (NFG) and the system ground are one ground, the bus can be directly connected with the chip ground of the Non-Floating ground (NFG)And (4) upsampling. Fig. 6 is substantially similar to fig. 2, but the voltage converter 113 is of the non-floating ground (NFG) type, so the dimming cell no longer outputs the voltage V from the previous output_OUTEnd-capturing the sampled voltage, in turn from providing the input voltage V_INThe sampled voltage is captured on the bus. In addition, the following description of the present invention will be made with reference to fig. 7-9 to describe common or unusual power conversion topologies extended based on the inventive spirit of fig. 6, and further to prove the general applicability of the dimming unit in the voltage converter provided in the inventive spirit of the present invention.

In the flyback voltage converter of fig. 7, a sinusoidal input alternating current V_ACThe conduction angle theta is adjusted by the silicon controlled dimmer 111, and the sine wave alternating current V passes through the phase-cut angle_ACRectified by the bridge rectifier 112, and then provides the input voltage V to the transformer T of the flyback converter_IN. Note that in this embodiment, the dimming unit 116 is at the input voltage V_INUp-sampling and capturing the input voltage V_INAverage voltage value V of_SAMInput voltage V on bus_INThe pulsating voltage with the ac component output from the rectifier 112 may be used, or the output of the rectifier 112 may be passed through the input capacitor C_INInput voltage V embodied as a DC component after filtering_IN. The primary winding of the flyback voltage converter stores energy during the on-phase of the transistor Q2 and transfers energy to the secondary winding during the off-phase of the transistor Q2. Switching tube Q2, primary winding of transformer and detection resistor R_CS2Connected in series to an input voltage V_INAnd a ground reference ground potential GND1, the drain terminal (input terminal) of the switch tube Q2 is connected to one end of the primary winding, and the other end of the primary winding receives an input voltage V_INThe detection resistor R is connected between the source terminal (output terminal) of the main switch tube Q2 and the ground reference potential GND1_CS2. While one end of the secondary winding is grounded at GND1 and the other end is passed through a rectifying diode D_RECAn output node at the cathode of the diode provides an output voltage V_OUTAn output capacitor C_OUTConnected between ground GND1 and the output node. At which the operating voltage is provided to the LED load 114, one of the series-connectedOr the anode terminal of the first LED of the plurality of LED loads 114 is connected to the output node, and the cathode terminal of the last LED of the series of LED loads 114 is connected to the ground reference GND 1. When the dimming unit 116 is in the first normal operating state stage, the sine wave input voltage V does not need to be adjusted_ACPerforming phase angle cutting, and adjusting the resistance of the first and second resistors R1, R2 to V_SAM+V_TH≈V_COMPI.e. representing the voltage V at node N3_COMPV approximately equal to node N4_SAMPlus a forward conduction voltage drop V of a second diode D2_THThe dimming unit 116 does not operate at this stage.

When a sine wave voltage V is input_ACAt the beginning of phase angle cut, the dimmer unit 116 enters a second operating state phase in which the comparator a1 is affected by two loops, the first being the sampled input voltage V_INAverage voltage value V of rectification sampling_SAMIntegral voltage V_COMPComparator A1, and modulated signal S_PWMCurrent is fed back to the flyback voltage converter. In the first loop, from the input voltage V_INThe obtained energy begins to decrease, and an average voltage value V is obtained at a node N4_SAMThe decrease is started. The second loop is, the detection resistor R_CS2Upper sampled voltage V_CSA second terminal, e.g., an inverting input terminal, of the error amplifier A2, a reference voltage V_REFThen to a first, e.g., non-inverting, terminal of the error amplifier a 2. Sawtooth wave V generated by simultaneous oscillator 125_SLOConnected to a first terminal, e.g., a non-inverting input terminal, of the PWM comparator A1, and an error amplifier A2 is connected to a first capacitor C₁The integrated voltage V generated at the node N3 at the ungrounded end_COMPTo a second terminal, e.g., an inverting input terminal, of PWM comparator a 1. In some optional but not necessary embodiments, it is also possible to use the inverse signal of the output result of the PWM comparator a1 as the modulation signal. If the control module 115 detects the sampled voltage V_CSI.e., the average current through the load 114 decreases, the integrated voltage V of the first capacitor C1 at node N3_COMPAttempting to increase to regulate boost flow through the primary winding, switching tube Q2 and sensingResistance R_CS2I.e., increasing the duty cycle of the modulated signal controlling the switching transistor Q2. Although the integral voltage V_COMPAttempting to increase, but due to the integrated voltage V at node N3_COMPGreater than the average voltage value V at node N4_SAMPlus a second diode D₂Conducting voltage drop V_THThe integrated voltage V at the node N3 is immediately made_COMPIs pulled low. On the one hand, due to the input sine-wave voltage V_ACPhase angle cut to result in an input voltage V_INAnd the sampled average voltage value V_SAMThe decrease results in a decrease in the peak current on the primary side, so the preset average current flowing through the load 114 also decreases; on the other hand, the modulation signal is used to drive the NMOS switch tube Q2 but the modulation signal S_PWMThe duty cycle of the light source cannot be increased, so that the average current output to the load 114 is decreased to achieve the dimming effect.

Referring to fig. 7, the dimming unit 116 includes a voltage source connected in series to the input voltage V_INAnd a first diode D1, a first resistor R1 and a second resistor R2 between the ground GND1, wherein an anode terminal of the first diode D1 is connected to the input voltage VIN, and the first resistor R1 and the second resistor R2 are connected in series between a cathode terminal of the first diode D1 and the ground GND 1. A second diode D2 and a third resistor R3 are further provided, the second diode D2 and the third resistor R3 are connected in series between a common node N4 at the interconnection of the first resistor R1 and the second resistor R2 and a node N3 at one end of the first capacitor C1, and a second capacitor C2 is further included in parallel with the second resistor R2, one end of the second capacitor C2 is connected to provide an average voltage value V_SAMThe other ends of the first capacitor C1 and the second capacitor C2 are connected to the ground GND 1. Since the positions of the second diode D2 and the third resistor R3 can be reversed, there are two cases: an anode terminal of the second diode D2 is connected to a node N3 at the ungrounded end of the first capacitor C1, and a third resistor R3 (fig. 7) is connected between a cathode terminal of the second diode D2 and the common node N4; or the cathode terminal of the second diode D2 is connected to the common node N4, and a third resistor R3 is connected between the anode terminal of the second diode D2 and the ungrounded node N3 of the first capacitor C1 (fig.)Not shown in (a). In the second operating state phase of the dimming unit 116 (input sine wave V)_ACChamfered angle), a sine wave voltage V is input_ACAfter being cut off a portion of the angle by the triac dimmer 111, the loop attempts to force the integrated voltage V at node N3 in order to maintain a constant current_COMPAnd (4) lifting. But due to the sine wave voltage V_ACCut off a part of the angle to result in the input voltage V of the sampling node_INThe potential of (2) is lowered corresponding to the source of the switching tube Q2 and the detection resistor R_CS2The current signal sampled at the interconnection decreases and the error voltage V output at the output of the error amplifier a2_EAIncreased, finally by the average voltage value V of the sample_SAM(at node N4) and the voltage V at the output of the error amplifier A2_EAThe voltage difference between them, a bleed path is created through the second diode D2 and the third resistor R3, which changes the integrated voltage V_COMPThe value (at node N3) causes it to decrease, resulting in a decrease in the duty cycle of the modulated signal driving the switch Q2, which shortens the on-time of the switch Q2 during the cycle.

The embodiment of fig. 8 is substantially similar to that of fig. 7, except that the scope of application is no longer the flyback converter mentioned above, but a Buck-Boost type voltage converter, noting that the polarity of the output voltage at the output node of the Buck-Boost topology is opposite compared to the input voltage. A first terminal of an inductor L2 is connected to a node N5, and a freewheeling diode D is connected between the other second terminal of the inductor L2 and a node N6_FW2Freewheel diode D_FW2Is connected to the second terminal of the inductor L2, and a freewheeling diode D_FW2Is connected to a node N6, an output capacitor C_OUTA freewheeling diode D connected between nodes N5 and N6_FW2An inductor L2 is also connected between nodes N5 and N6, and an output capacitor C_OUTAnd diode D_FW2And an inductor L2 are connected in parallel. A detection resistor R is connected between the anode terminal of the first LED of the series-connected one or more LED loads 114 and the output node N6_CS3And the cathode terminal of the last LED in the series connected LED loads 114 is connected to node N5. The drain of a main switch Q3 is connected to inductor L2Second terminal and freewheeling diode D_FW2And the source of the switching transistor Q3 is connected to the input voltage V_INA sensing resistor R is connected between the reference ground potential GND1_S. A current sense amplifier A3 has its positive input connected to node N6 and its negative input connected to sense resistor R_CS3A node interconnected with the anode terminal of the first LED of the series-connected LED loads 114, such that the current sense amplifier A3 is used to sense the current flowing through the load 114 and is embodied as a sampled voltage V output from the output of the amplifier A3_CS(is the current and the resistance R_CS3The product of (a) and (b). A current sense amplifier A4 having a positive input connected to the sense resistor R_SA node interconnected with the source of the NMOS switch transistor Q3, a negative input terminal of a current sense amplifier A4 connected to the ground reference GND1, the current sense amplifier A4 for sensing the current flowing through the sense resistor R_SA current signal on the capacitor. The circuit of the dimming unit 116 is the same as that of fig. 7 and will not be repeated, wherein the output terminal of the error amplifier a2 is connected to the node N3 at the ungrounded end of the first capacitor C1, and the detection resistor R is connected to the output terminal of the first capacitor C1_CS3Voltage V of the sample fed back_CSA second terminal, e.g., an inverting input terminal, of the error amplifier A2, a reference voltage V_REFThen to a first, e.g., non-inverting, terminal of the error amplifier a 2. Alternatively, the output of the current sense amplifier A4 and the sawtooth waveform V generated by the Oscillator (OSC)_SLOThe superposition compensated signal is input to a first terminal, e.g., a non-inverting input terminal, of a PWM comparator A1, and an error amplifier A2 is disposed on a first capacitor C₁The integrated voltage V generated by the ungrounded end node N3_COMPTo a second terminal, e.g., an inverting input, of comparator a 1.

Referring to FIG. 8, input voltage V_INWhen the current is input to the node N5, the inductor L2 stores energy and the current flows through the inductor L2, the switch tube Q3 and the inductive resistor R in the conducting stage of the switch tube Q3_STo ground GND 1. In the off stage of the switch tube Q3, the inductor L2 releases energy, and the current flows through the freewheeling diode D_FW2And flows through the detection resistor R_CS3And a series LED load 114. The switching tube Q3 is driven by the modulation signal to switch between on and offThe control signal is actually referenced to the ground, which is the ground reference potential GND1, and the chip ground is the same as the system ground, which is the same as FIG. 9, so that the anode of the first diode D1 in the dimming unit 116 is connected to the node N5, which is equivalent to the fact that the dimming unit 116 can directly provide the input voltage V_INSampling on the bus.

Referring to FIG. 8, if the control module 115 detects a current flowing through the load 114, i.e., a converted sampled voltage V_CSStarting to decrease, the integrated voltage V of the first capacitor C1 at node N3_COMPThe increase is attempted to adjust the boost current through inductor L2, switch Q3 and sense resistor R_SI.e., tends to increase the duty cycle of the modulated signal controlling the switching transistor Q3. But due to the integrated voltage V at node N3_COMPAnd node N4 outputs an average voltage value V_SAMThere is a voltage difference between them, and the resulting bleed-off path will cause the integrated voltage V at node N3_COMPAnd (4) descending. In one aspect, input sine wave V_ACIs chamfered to cause an input voltage V_INEffective value and voltage value V of_SAMReducing, on the other hand, the modulation signal S controlling the switching tube Q2_PWMThe average current output to the load 114 decreases to achieve the dimming effect.

The embodiments of fig. 9 and 8 are substantially similar, except that the scope of application is no longer a Buck-Boost type voltage converter, but a Buck voltage converter. One of which is a freewheeling diode D_FW3A freewheeling diode D connected in series with the inductor L3 between a node N7 and a node N8_FW3Is connected to node N7, and a freewheeling diode D_FW3An inductor L3 is connected between the anode terminal of the inductor L3 and a node N8, wherein the first terminal of the inductor L3 is connected with a freewheeling diode D_FW3And a second terminal of the inductor L3 is connected to the node N8. The anode terminal of the first LED of the first series of one or more LED loads 114 is connected to node N7, and the cathode terminal of the last LED of the series of LED loads 114 is connected to node N8. An NMOS switch transistor Q4 having a drain connected to the first terminal of the inductor L3 and the freewheeling diode D_FW3The node position of the anode interconnection of the switching tube Q4, and the source terminal of the switching tube Q4 and the input voltageV_INA detection resistor R is connected between the reference ground potential GND1_CS4. The working principle of the Buck Buck voltage converter is that the rectified input voltage V_INWhen the current is inputted to the node N7 and the switch tube Q4 is turned on, the current flows through the LED load 114, the inductor L3, the switch tube Q4 and the detection resistor R which are connected in series_CS4Flowing to ground GND1, inductor L3 stores energy, and inductor L3 releases energy during the off phase of switch Q4, and the current flowing through inductor L3 flows through freewheeling diode D_FW3To the series LED load 114 to node N8. Therefore, in which the anode of the first diode D1 in the dimming unit 116 is connected to the node N7, it is equivalent that the dimming unit 116 can directly provide the input voltage V_INSampling on the bus.

The output terminal of the error amplifier A2 is connected to the ungrounded node N3 of the first capacitor C1 at the sensing resistor R_CS4The detected voltage V sampled at the interconnection with the source terminal of the switching tube Q4_CSA second terminal, e.g., an inverting input terminal, of the error amplifier A2, a reference voltage V_REFThen to a first, e.g., non-inverting, terminal of the error amplifier a 2. Simultaneously appearing as a triangular or sawtooth wave V_SLOThe first terminal, e.g., the non-inverting input terminal, of the PWM comparator A1 is input to the error amplifier A2 through the first capacitor C₁The integrated voltage V generated by the ungrounded end node N3_COMPTo a second terminal, e.g., an inverting input, of comparator a 1. Modulating signal S generated by output end of PWM comparator A1_PWMDriving the gate control terminal G of the switching transistor Q4. The sampled sense resistor R if the control module 115 senses the current through the load 114_CS4Starting to decrease, the integrated voltage V of the first capacitor C1 at node N3_COMPThere will be an adaptive attempt to increase the duty cycle of the modulated signal controlling the switch Q4, i.e., tending to drive the current through the load 114, the inductor L3, the switch Q4 and the sense resistor R_CS4The peak current of (c). However, in the feed-forward dimming operation, the AC voltage V is input to the sine wave_ACPulling down the sampled voltage value V after phase angle cutting_SAMAnd due to the integrated voltage V at node N3_COMPAnd the average voltage value V at node N4_SAMWhen a voltage difference exists between them, the node will be immediately drivenIntegral voltage V at N3_COMPAnd (4) descending. So that a sine wave V is input_ACPhase angle cut to result in an input voltage V_INEffective value and voltage value V of_SAMReducing and controlling the modulating signal S of the switching tube Q4_PWMThe duty cycle of the LED load 114 cannot be increased, and the combined effect of the duty cycle and the LED load is to decrease the preset average current output to the LED load 114 to achieve the desired dimming effect.

In the embodiments of fig. 7-9, the input voltage V_INThe rectified voltage is obtained, because the bus and the chip ground are the same ground, the average value of the voltage on the bus can be directly detected, when the bus passes through the silicon controlled TRIAC, the effective value of the voltage is reduced, the average voltage of the bus can be obtained through filtering by the second capacitor C2, when the angle of the silicon controlled TRIAC is larger, the voltage on the second capacitor C2 is smaller, the current flowing through the third resistor R3 is larger, and V is larger_COMPThe smaller the voltage is, so that the duty ratio or the period of the PWM modulation signal is forced to be fixed or changed, and the dimming function can be realized by realizing the high PF value. Since the ground of the bus is sampled and the voltage is high, attention needs to be paid to the withstand voltage value of the first resistor R1, and the positions of the third resistor R3 and the second diode D2 can be interchanged. Also, the dimming cells in the embodiments of fig. 7-9 may be replaced by a simplified version of the dimming cell 116 of fig. 5, eliminating the second diode D2 and the second capacitor C₂And a third resistor R3. The node N3 is directly coupled to the node N4, substantially by the average voltage value V of the node N4_SAMClamping the integrated voltage V at node N3_COMPIntegral voltage V_COMPIs followed by a change in the output node N2/or V_INSampling and capturing output voltage V_OUT/or V_INAverage voltage value V of_SAMThe average voltage value V that changes with the change of the conduction angle theta_SAMDirectly varying the modulated signal S_PWMThe same circuit as long as the input voltage V is used_INWith the sine wave being linearly varied by the tangent angle, the voltage V at the node N3 can be obtained_COMPThe S is further realized by linear change along with the size of the cut angle of the sine wave_PWMVariation of duty ratio of waveform with cut angleThe linear variation is not described in detail since the dimming measures are described in detail above.

The above-described topologies used as examples are intended to be illustrative only and not to constitute any particular limitation, and the existing white light LED driving schemes are of a wide variety, and the present application only outlines a few representative examples that illustrate the basic idea of the present application, so that it should be understood that the topologies described herein can be replaced by any variety of other applicable topologies by those skilled in the art, which should fully appreciate the essence of the inventive spirit of the present application when reading the present text or understanding the scope of the appended claims.

While the present invention has been described with reference to the preferred embodiments and illustrative embodiments, it is to be understood that the invention as described is not limited to the disclosed embodiments. Various alterations and modifications will no doubt become apparent to those skilled in the art after having read the above description. Therefore, the appended claims should be construed to cover all such variations and modifications as fall within the true spirit and scope of the invention. Any and all equivalent ranges and contents within the scope of the claims should be considered to be within the intent and scope of the present invention.

Claims

1. A dimming driving circuit, comprising:

a silicon controlled dimmer for adjusting the conduction angle of the received alternating current;

the voltage converter generates preset average current by the input voltage provided by the alternating current after the alternating current is output through the phase-cut angle of the silicon controlled dimmer and rectified, and outputs the preset average current to the load;

the control module is used for driving a switching tube which is used for switching between on and off in the voltage converter and used for determining whether to transmit voltage and/or current to the load by using the input voltage through the generated modulation signal;

the dimming unit is used for detecting the change condition of the conduction angle of the alternating current and enabling the duty ratio of the modulation signal to change along with the change trend of the size of the conduction angle;

the voltage converter comprises a Buck-type voltage converter, a flyback-type voltage converter and a Buck-Boost-type voltage converter;

the voltage converter is configured with a floating ground reference potential different from the ground reference potential of the input voltage, so that the modulation signal is referenced to the ground by the floating ground reference potential when the switch tube is driven by the modulation signal, and the dimming unit samples and acquires the average voltage value of the output voltage at the voltage output node of the voltage converter; wherein

An error amplifier in the control module compares and amplifies a difference between a reference voltage and a sampling voltage for controlling the magnitude of current flowing through the load, the error voltage output by the error amplifier generates an integral voltage on a first capacitor, and the dimming unit pulls down the integral voltage to force the duty ratio of the modulation signal to be reduced when the conduction angle is reduced to reduce the average voltage value.

2. The dimming driving circuit according to claim 1, wherein the dimming cell comprises a first diode and first and second resistors connected in series between the output node and the floating ground reference potential, an anode of the first diode being connected to the output node and the first and second resistors being connected in series between a cathode of the first diode and the floating ground reference potential;

further comprising a second diode and a third resistor connected in series between a common node at which the first and second resistors are interconnected and a first terminal of the first capacitor, and a second capacitor connected in parallel with the second resistor, wherein the first terminal of the second capacitor and the cathode of the second diode are both connected at said common node for generating said average voltage value, and the third resistor is connected between the anode of said second diode and the first terminal of the first capacitor, and the second terminals of the first and second capacitors are arranged to be connected to the floating ground reference potential.

3. The dimming driving circuit according to claim 1, wherein the dimming cell comprises a first diode and first and second resistors connected in series between the output node and the floating ground reference potential, an anode of the first diode being connected to the output node and the first and second resistors being connected in series between a cathode of the first diode and the floating ground reference potential;

a common node at the interconnection of the first and second resistors providing the average voltage value is coupled to a first terminal of the first capacitor, a second terminal of the first capacitor being configured to be connected to the floating ground reference potential.

4. The dimming driving circuit according to claim 2, wherein the dimming cell is disabled when a sum of the average voltage value and a forward conduction voltage of the second diode approaches to be equal to the integration voltage;

when the thyristor dimmer changes the conduction angle of the alternating current to the sum of the average voltage value and the forward conduction voltage of the second diode is lower than the voltage output by the output end of the error amplifier, the second diode and the third resistor between the first end of the first capacitor and the common node form a current path, and therefore the integral voltage of the first end of the first capacitor is pulled down.

5. The dimming driving circuit according to claim 3, wherein the integrated voltage is directly clamped by the average voltage value, so that the variation of the integrated voltage is consistent with the variation of the average voltage value, and the average voltage value consistent with the variation trend of the conduction angle directly changes the duty ratio of the modulation signal.

6. The dimming driving circuit according to claim 1, wherein the voltage converter is configured with a ground reference that is the same as a ground reference of the input voltage, the modulation signal is referenced to the ground reference when the switching tube is driven by the modulation signal, and the dimming unit samples the input voltage received by the voltage converter to obtain an average voltage value of the input voltage; wherein

An error voltage output by an error amplifier in the control module generates an integral voltage on a first capacitor, wherein the error amplifier compares and amplifies a difference value between a reference voltage and a sampling voltage for controlling the magnitude of current flowing through a load, and the dimming unit pulls down the integral voltage and forces the duty ratio of the modulation signal to be reduced when the conduction angle is reduced to reduce the average voltage value.

7. The dimming driving circuit according to claim 6, wherein the dimming unit comprises a first diode and first and second resistors connected in series between the input voltage and a ground reference potential, an anode of the first diode receiving the input voltage and the first and second resistors connected in series between a cathode of the first diode and the ground reference potential;

further comprising a second diode and a third resistor connected in series between a common node at the interconnection of the first and second resistors and a first terminal of said first capacitor, and a second capacitor connected in parallel with the second resistor, a first terminal of said second capacitor being connected to said common node providing said average voltage value, and respective second terminals of the first and second capacitors being connected to the ground reference potential.

8. The dimming driving circuit according to claim 7, wherein an anode of the second diode is connected to the first end of the first capacitor, and the third resistor is connected between a cathode of the second diode and the common node; or

The cathode end of the second diode is connected to the common node, and the third resistor is connected between the anode end of the second diode and the first end of the first capacitor.

9. The dimming driving circuit according to claim 6, wherein the dimming unit comprises a first diode and first and second resistors connected in series between the input voltage and a ground reference potential, an anode of the first diode receiving the input voltage and the first and second resistors connected in series between a cathode of the first diode and the ground reference potential; and

a common node at the interconnection of the first and second resistors providing the average voltage value is coupled to a first terminal of the first capacitor, a second terminal of the first capacitor being connected to a ground reference potential.

10. The dimming driving circuit according to claim 7, wherein the dimming cell is disabled when a sum of the average voltage value and a forward conduction voltage of the second diode approaches to be equal to the integration voltage;

11. The dimming driving circuit according to claim 9, wherein the integrated voltage is directly clamped by the average voltage value, so that the variation of the integrated voltage is consistent with the variation of the average voltage value, and the average voltage value consistent with the variation trend of the conduction angle directly changes the duty ratio of the modulation signal.

12. The dimming driving circuit according to claim 1 or 6, wherein the integrated voltage generated on the first capacitor and a sawtooth wave are compared by a comparator, and the comparator outputs the modulation signal.