CN106356407A - Thin film transistor and preparation method thereof as well as array substrate and preparation method thereof - Google Patents

Thin film transistor and preparation method thereof as well as array substrate and preparation method thereof Download PDF

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Publication number
CN106356407A
CN106356407A CN201610950863.4A CN201610950863A CN106356407A CN 106356407 A CN106356407 A CN 106356407A CN 201610950863 A CN201610950863 A CN 201610950863A CN 106356407 A CN106356407 A CN 106356407A
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layer
active layer
photoresist
thin film
substrate
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杨成绍
操彬彬
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Priority to CN201610950863.4A priority Critical patent/CN106356407A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)

Abstract

The invention provides a thin film transistor and a preparation method thereof as well as an array substrate and a preparation method thereof, relates to the technical field of display and aims at improving the stability of the thin film transistor. The thin film transistor comprises a substrate and an active layer arranged on the substrate, wherein the active layer comprises a source electrode region, a drain electrode region and a channel region; the thin film transistor further comprises an ultraviolet barrier layer which is arranged above the active layer and corresponds to the channel region at least, and the ultraviolet barrier layer is used for absorbing ultraviolet light.

Description

Thin film transistor and preparation method thereof, array substrate and preparation method thereof
Technical Field
The invention relates to the technical field of display, in particular to a thin film transistor and a preparation method thereof, and an array substrate and a preparation method thereof.
Background
In recent years, with the development of various Display technologies, such as LCD (Liquid Crystal Display), OLED (Organic Light-Emitting Diode), flexible Display, and transparent Display, products using large-sized and high-resolution Display panels are becoming more and more popular.
The display panel comprises an array substrate, wherein the array substrate comprises a thin film transistor. The thin film transistor includes an active layer, a source electrode, and a drain electrode.
An active layer of an existing thin film transistor has good light transmittance to a visible light wave band, when light with a wavelength larger than or equal to a threshold wavelength in irradiation light irradiates an active layer, the active layer transmits the irradiation light, an I-V curve (characteristic transfer curve) of the thin film transistor is stable, but when ultraviolet light with a wavelength smaller than the threshold wavelength in the irradiation light irradiates the active layer, the active layer has a good absorption effect on the ultraviolet light, and after a channel region in the active layer absorbs the ultraviolet light, the I-V curve of the thin film transistor starts to drift greatly and is unstable, so that the threshold voltage of the thin film transistor usually moves in a large amplitude to the negative direction, and the function failure of a device is caused.
Disclosure of Invention
The embodiment of the invention provides a thin film transistor and a preparation method thereof, and an array substrate and a preparation method thereof, which can improve the stability of the thin film transistor.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
in a first aspect, a thin film transistor is provided, which includes a substrate, an active layer disposed on the substrate, the active layer including a source region, a drain region, and a channel region; the light-emitting diode further comprises an ultraviolet light blocking layer which is arranged above the active layer and at least corresponds to the channel region, and the ultraviolet light blocking layer is used for absorbing ultraviolet light.
Preferably, the material of the ultraviolet light blocking layer is infrared quantum dots; the excitation wavelength of the infrared quantum dot material is 100-420nm, and the emission wavelength is 800-1100 nm;
the material of the infrared quantum dots comprises at least one of CdS, CdSe, CdTe, ZnSe and AgS; when the infrared quantum dots are made of CdS, CdTe, CdSe doped ZnS and CdSe doped ZnSe, the particle size of the infrared quantum dots is 5-15 nm; when the material of the infrared quantum dots is AgS, the particle size of the infrared quantum dots is 7-20 nm.
Preferably, the material of the ultraviolet light blocking layer is photoresist after carbonization treatment.
In view of the above, preferably, the thin film transistor further includes a gate electrode and a gate insulating layer disposed between the active layer and the substrate, and a source electrode, a drain electrode and a passivation layer disposed on a side of the active layer away from the substrate; wherein the ultraviolet light blocking layer is disposed over the passivation layer.
Or the thin film transistor further comprises a grid electrode and a grid insulating layer which are arranged between the active layer and the substrate, and an etching barrier layer, a source electrode, a drain electrode and a passivation layer which are arranged on one side of the active layer far away from the substrate; the active layer is an oxide semiconductor active layer; wherein the ultraviolet light blocking layer is disposed over the passivation layer.
In a second aspect, a method for fabricating a thin film transistor is provided, which includes forming an active layer on a substrate, the active layer including a source region, a drain region, and a channel region; the method further comprises the step of forming an ultraviolet light blocking layer at least corresponding to the channel region above the active layer, wherein the ultraviolet light blocking layer is used for absorbing ultraviolet light.
Preferably, the forming of the ultraviolet blocking layer includes: forming a photoresist layer at least corresponding to the channel region on the substrate on which the active layer is formed; and carbonizing the photoresist layer to form the ultraviolet light blocking layer.
Further preferably, the method further comprises forming a gate electrode and a gate insulating layer between the active layer and the substrate, and forming a source electrode and a drain electrode on a side of the active layer away from the substrate.
Or, the method further comprises the steps of forming a grid electrode and a grid insulating layer between the active layer and the substrate, and forming an etching barrier layer, a source electrode and a drain electrode on one side of the active layer away from the substrate; the active layer is an oxide semiconductor active layer.
Forming the photoresist layer, including: forming a passivation layer film on the substrate on which the source electrode and the drain electrode are formed, and forming photoresist; placing a half-tone mask plate above the photoresist, and exposing and developing the photoresist; completely reserving the photoresist at the position corresponding to the active layer, completely removing the photoresist at the position corresponding to the via hole, and semi-reserving the photoresist at the rest positions; wherein the completely remained photoresist at least covers the channel region of the active layer; etching the passivation layer film to form the passivation layer; and carrying out ashing treatment on the photoresist above the passivation layer to form a photoresist layer at least corresponding to the channel region of the active layer.
Preferably, the carbonization treatment mode is dry etching treatment; or annealing is carried out in a vacuum or inert gas environment at the temperature of 250-350 ℃; wherein the annealing time is 0.5-2 h.
In a third aspect, an array substrate is provided, which includes the thin film transistor of the first aspect.
In a fourth aspect, a method for manufacturing an array substrate is provided, and a thin film transistor is manufactured by the method for manufacturing a thin film transistor according to the second aspect.
The embodiment of the invention provides a thin film transistor and a preparation method thereof, an array substrate and a preparation method thereof.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1(a) is a first schematic structural diagram of a thin film transistor according to an embodiment of the present invention;
fig. 1(b) is a schematic structural diagram of a thin film transistor according to an embodiment of the present invention;
FIG. 2 is a first flowchart of a method for forming an ultraviolet light blocking layer according to an embodiment of the present invention;
FIG. 3(a) is a first schematic view of a process for preparing an ultraviolet light blocking layer according to an embodiment of the present invention;
FIG. 3(b) is a schematic view of a second process for preparing an ultraviolet light blocking layer according to an embodiment of the present invention;
FIG. 4(a) is a first schematic view illustrating a process of forming a photoresist layer according to an embodiment of the present invention;
FIG. 4(b) is a second schematic view illustrating a process of fabricating a photoresist layer according to an embodiment of the present invention;
FIG. 4(c) is a third schematic view illustrating a process of fabricating a photoresist layer according to an embodiment of the present invention;
FIG. 4(d) is a fourth schematic view illustrating a process of fabricating a photoresist layer according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of an array substrate according to an embodiment of the present invention.
Reference numerals:
100-half tone mask plate; 10-a substrate; 11-a gate; 12-a gate insulating layer; 13-a source electrode; 14-a drain electrode; 15-a passivation layer; 151-a passivation layer film; 16-etching the barrier layer; 17-a pixel electrode; 20-an active layer; 21-a source region; 22-a drain region; 23-a channel region; 30-an ultraviolet light blocking layer; 31-a photoresist layer; 32-photoresist.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An embodiment of the present invention provides a thin film transistor, as shown in fig. 1(a) and 1(b), including a substrate 10, an active layer 20 disposed on the substrate 10, the active layer 20 including a source region 21, a drain region 22, and a channel region 23; the thin film transistor further includes an ultraviolet blocking layer 30 disposed above the active layer 20 and corresponding to at least the channel region 23, and the ultraviolet blocking layer 30 is configured to absorb ultraviolet light.
As shown in fig. 1(a) and 1(b), the thin film transistor further includes a gate electrode 11 and a gate insulating layer 12 disposed between the active layer 20 and the substrate 10, and a source electrode 13 and a drain electrode 14 disposed on a side of the active layer 20 away from the substrate 10.
First, the type of the thin film transistor is not limited, and the thin film transistor may be an amorphous silicon thin film transistor, a polysilicon thin film transistor, an oxide thin film transistor, an organic thin film transistor, or the like, according to the material of the active layer 20.
Note that a specific structure of the thin film transistor is not limited, and the structures of the thin film transistors in fig. 1(a) and 1(b) are merely schematic.
Second, the ultraviolet blocking layer 30 corresponds to at least the channel region 23, that is, as shown in fig. 1(a), an orthographic projection of the ultraviolet blocking layer 30 on the substrate 10 is larger than an orthographic projection of the channel region 23 on the substrate 10 and smaller than an orthographic projection of the active layer 20 on the substrate 10; it is also possible that, as shown in fig. 1(b), the orthographic projection of the ultraviolet-blocking layer 30 on the substrate 10 is equal to the orthographic projection of the channel region 23 on the substrate 10.
The material and thickness of the ultraviolet blocking layer 30 are not limited, and the ultraviolet blocking layer can absorb ultraviolet light.
In addition, the specific location of the uv blocking layer 30 on the substrate 10 is not limited, and may be located above the active layer 20, and the location of the uv blocking layer 30 in fig. 1(a) and 1(b) is only illustrative and is not limited.
Thirdly, the ultraviolet light absorption mode of the ultraviolet light blocking layer 30 is not limited, and the channel region 23 is not irradiated by ultraviolet light. For example, but not limited to, uv light may be absorbed, converted, reflected, etc. to avoid exposure to uv light in the channel region 23.
The embodiment of the invention provides a thin film transistor, wherein the ultraviolet blocking layer 30 is arranged above the active layer 20, and the ultraviolet blocking layer 30 at least corresponds to the channel region 23 in the active layer 20, so that ultraviolet light irradiated to the position of the channel region 23 can be absorbed by the ultraviolet blocking layer 30, and the ultraviolet light is prevented from being irradiated to the channel region 23, and therefore, compared with the prior art, the stability of the thin film transistor can be improved.
Optionally, the ultraviolet light blocking layer 30 is made of infrared quantum dots; the excitation wavelength of the infrared quantum dot material is 100-420nm, and the emission wavelength is 800-1100 nm.
That is, a material capable of exciting ultraviolet light with a wavelength of 100-420nm into infrared light with a wavelength of 800-1100 nm in the infrared quantum dot material is used as the material of the ultraviolet blocking layer 30.
In the embodiment of the invention, the ultraviolet light barrier layer 30 is made of the infrared quantum dots, and the ultraviolet light (with the wavelength less than 420 nm) which has a large influence on the channel region 23 can be converted into the infrared light (with the wavelength more than 800 nm) which has a small influence on the channel region 23 through the ultraviolet light barrier layer 30, so that the influence of the ultraviolet light on the thin film transistor is reduced, and the stability of the thin film transistor is improved. In addition, the light rays of the infrared quantum dots excited by the ultraviolet light are infrared light, and the infrared light is invisible light, so that the normal display of the display panel is not influenced.
Preferably, the material of the infrared quantum dots comprises at least one of CdS (cadmium sulfide), CdSe (cadmium selenide), CdTe (cadmium telluride), ZnSe (zinc selenide), AgS (silver sulfide); wherein, when the material of the infrared quantum dots is CdS, CdTe, CdSe doped ZnS or CdSe doped ZnSe, the particle size of the infrared quantum dots is 5-15 nm; when the material of the infrared quantum dots is AgS, the particle size of the infrared quantum dots is 7-20 nm.
Since the materials such as CdS, CdSe, CdTe, ZnSe, AgS, etc. are easily available and low in cost, the above materials are preferably used as the material of the ultraviolet blocking layer 30 in the embodiment of the present invention. On the basis, the ultraviolet light barrier layer 30 converts ultraviolet light with a certain wavelength into infrared light by limiting the particle size of the material.
Optionally, the material of the ultraviolet blocking layer 30 is a photoresist after carbonization treatment.
Because the photoresist can remove hydrogen atoms and oxygen atoms in an oxygen-free or inert gas atmosphere at a high temperature environment, the residual main component is amorphous carbon, the color gradually becomes black in the carbonization treatment process, and the surface of the photoresist also becomes rough, thereby playing a good light absorption role. Therefore, in the embodiment of the invention, the ultraviolet light is prevented from irradiating the channel region 23 by absorbing the ultraviolet light by the photoresist after the carbonization treatment, the preparation process is simple, the material is easy to obtain, and the production cost is low.
In view of the above, it is preferable that, as shown in fig. 1(a), the thin film transistor further includes a passivation layer 15 disposed on the source and drain electrodes 13 and 14 on the side away from the substrate 10; wherein the uv blocking layer 30 is disposed over the passivation layer 15.
According to the embodiment of the invention, the ultraviolet light barrier layer 30 is arranged above the passivation layer 15, so that the structure is simple and the preparation is convenient.
Preferably, the active layer 20 is an oxide semiconductor active layer.
The material of the active layer may be IGZO (indium gallium zinc oxide), for example.
The oxide semiconductor has the advantages of high carrier mobility, low preparation temperature, excellent large-area uniformity, high optical transmittance and the like, and the thin film transistor adopting the oxide semiconductor material as the active layer 20 is suitable for preparing novel display devices such as a high-resolution liquid crystal display panel, an organic light-emitting diode display panel, a flexible display panel, a transparent display panel and the like, so the oxide semiconductor is preferably used as the material of the active layer 20.
The forbidden band width of the oxide semiconductor is generally 3.2eV-3.6eV, which is easy to absorb the ultraviolet light with short wavelength, but not easy to absorb the infrared light with longer wavelength, so that the thin film transistor with the ultraviolet blocking layer 30 has high stability and better performance by using the oxide semiconductor as the material of the active layer 20.
Preferably, as shown in fig. 1(b), the active layer 20 is an oxide semiconductor active layer; the thin film transistor further includes an etch stopper layer 16 disposed between the oxide semiconductor active layer and the source and drain electrodes 13 and 14.
According to the embodiment of the invention, the etching barrier layer 16 is arranged between the oxide semiconductor active layer and the source electrode 13 and the drain electrode 14 to form the etching barrier type thin film transistor, and the etching barrier layer 16 can avoid the influence on the oxide semiconductor active layer when the source electrode 13 and the drain electrode 14 are formed by etching, so that the requirement on etching liquid is reduced.
The embodiment of the invention also provides a preparation method of the thin film transistor, which comprises the steps of forming an active layer 20 on the substrate 10, wherein the active layer 20 comprises a source region 21, a drain region 22 and a channel region 23; the method further includes forming an ultraviolet light blocking layer 30 at least corresponding to the channel region 23 over the active layer, the ultraviolet light blocking layer 30 for absorbing ultraviolet light.
The embodiment of the invention provides a preparation method of a thin film transistor, which is characterized in that an ultraviolet light blocking layer 30 is formed above an active layer 20, and the ultraviolet light blocking layer 30 at least corresponds to a channel region 23 in the active layer 20, so that ultraviolet light irradiated to the position of the channel region 23 can be absorbed by the ultraviolet light blocking layer 30, and the ultraviolet light is prevented from being irradiated to the channel region 23, therefore, compared with the prior art, the stability of the thin film transistor can be improved.
Preferably, the material of the ultraviolet light blocking layer 30 is photoresist after carbonization treatment.
Because the photoresist can remove hydrogen atoms and oxygen atoms in an oxygen-free or inert gas atmosphere at a high temperature environment, the residual main component is amorphous carbon, the color gradually becomes black in the carbonization treatment process, and the surface of the photoresist also becomes rough, thereby playing a good light absorption role. Therefore, in the embodiment of the invention, the ultraviolet light is prevented from irradiating the channel region 23 by absorbing the ultraviolet light by the photoresist after the carbonization treatment, the preparation process is simple, the material is easy to obtain, and the production cost is low.
Further preferably, as shown in fig. 2, the forming of the ultraviolet blocking layer 30 specifically includes the following steps:
s10, as shown in fig. 3(a), a photoresist layer 31 corresponding to at least the channel region 23 is formed on the substrate 10 on which the active layer 20 is formed.
Here, the photoresist layer 31 may be obtained by coating photoresist, exposing and developing.
S20, as shown in fig. 3(b), the photoresist layer 31 is carbonized to form the uv blocking layer 30.
According to the embodiment of the invention, the photoresist layer 31 is formed above the active layer 20, and the ultraviolet light barrier layer 30 is formed by carbonizing the photoresist layer 31, so that ultraviolet light is prevented from irradiating the channel region 23, and the preparation process is simple.
Further preferably, the method further includes forming a gate electrode 11 and a gate insulating layer 12 between the active layer 20 and the substrate 10, and forming a source electrode 13 and a drain electrode 14 on a side of the active layer 20 away from the substrate 10, and forming a photoresist layer 31, including:
s100, as shown in fig. 4(a), a passivation layer film 151 is formed on the substrate 10 on which the source and drain electrodes 13 and 14 are formed, and a photoresist 32 is formed.
The photoresist 32 is of many kinds, and can be classified into a negative type and a positive type according to its chemical reaction mechanism and development principle. The insoluble matter formed after illumination is negative glue; on the contrary, the positive glue is insoluble in some solvents and becomes a soluble substance after being irradiated by light. Different kinds of photoresist correspond to different mask plates. The embodiment of the present invention does not limit the kind of the photoresist 32, and the photoresist may be a positive photoresist or a negative photoresist.
S200, as shown in fig. 4(b), placing the halftone mask plate 100 above the photoresist 32, exposing and developing the photoresist 32, so that the photoresist 32 at the position corresponding to the active layer 20 is completely retained, the photoresist 32 at the position corresponding to the via hole is completely removed, and the photoresist 32 at the other positions is semi-retained; wherein the photoresist 32 that remains completely covers at least the channel region 23 of the active layer 20.
The halftone mask 100 includes a completely transparent portion, a completely opaque portion, and a semi-transparent portion. If the photoresist 32 is a positive photoresist, the completely transparent portion of the halftone mask plate 100 corresponds to the completely removed photoresist portion, the completely opaque portion corresponds to the completely reserved photoresist portion, and the semi-transparent portion corresponds to the semi-reserved photoresist portion; if the photoresist 32 is a negative photoresist, the completely transparent portion of the halftone mask plate 100 corresponds to the completely remaining photoresist portion, the completely opaque portion corresponds to the completely removed photoresist portion, and the semi-transparent portion corresponds to the semi-remaining photoresist portion.
S300, as shown in fig. 4(c), the passivation layer thin film 151 is etched to form the passivation layer 15.
S400, as shown in fig. 4(d), the photoresist 32 on the passivation layer 15 is subjected to ashing treatment, and the photoresist layer 31 corresponding to at least the channel region 23 of the active layer 20 is formed.
In the embodiment of the invention, only the photoresist layer 31 corresponding to at least the channel region 23 of the active layer 20 is reserved after the photoresist 32 coated during the preparation of the passivation layer 15 is exposed, developed and ashed, so that the influence of ultraviolet light on the thin film transistor can be reduced and the stability of the thin film transistor can be improved on the basis of not increasing the number of masks. The preparation method is simple and easy to implement and has low cost.
Preferably, the carbonization treatment is dry etching treatment.
That is, the photoresist layer 31 is bombarded with high-energy ions, such as hydrogen and helium, to generate a high temperature of the photoresist layer 31 for carbonization.
On the basis, preferably, during the carbonization treatment of the photoresist layer 31 by the dry etching treatment, the cooling of the substrate 10 is weakened, so that the temperature of the substrate 10 is relatively raised, and the carbonization treatment process is accelerated.
In the embodiment of the invention, the photoresist layer 31 is carbonized by adopting a dry etching treatment mode, the process is mature, and the method is simple. In addition, if the passivation layer 15 is formed in the step S300 by dry etching, the photoresist layer 31 may be carbonized by the same dry etching apparatus as that used in the step S300, so as to save the cost.
Alternatively, it is preferred that the annealing is performed in a vacuum or inert gas environment at a temperature of 250 ℃.; wherein the annealing time is 0.5-2 h.
In the embodiment of the invention, the hydrogen atoms and the oxygen atoms in the photoresist layer 31 are removed by performing high-temperature annealing in a vacuum or inert gas environment, so that the process is mature and the method is simple.
The embodiment of the invention also provides an array substrate which comprises the thin film transistor.
When the array substrate is applied to a Liquid Crystal Display (LCD), as shown in fig. 5, the array substrate further includes a pixel electrode 17 electrically connected to a drain electrode of the thin film transistor; further, a common electrode may be included. Here, the structure of the array substrate in fig. 5 is only an illustration and is not limited at all.
When the array substrate is applied to an Organic Light Emitting Diode (OLED) display panel, the array substrate further includes an anode electrically connected to a drain of the thin film transistor, a cathode, and an Organic material functional layer between the anode and the cathode.
The embodiment of the invention provides an array substrate, wherein the ultraviolet blocking layer 30 is arranged above the active layer 20, and the ultraviolet blocking layer 30 at least corresponds to the channel region 23 in the active layer 20, so that ultraviolet light irradiated to the position of the channel region 23 can be absorbed by the ultraviolet blocking layer 30, and the ultraviolet light is prevented from being irradiated to the channel region 23, and therefore, compared with the prior art, the stability of a thin film transistor can be improved.
The embodiment of the invention also provides a preparation method of the array substrate, which comprises the step of preparing the thin film transistor by the preparation method of the thin film transistor.
The embodiment of the invention provides a preparation method of an array substrate, which is characterized in that an ultraviolet blocking layer 30 is formed above an active layer 20, and the ultraviolet blocking layer 30 at least corresponds to a channel region 23 in the active layer 20, so that ultraviolet light irradiated to the position of the channel region 23 can be absorbed by the ultraviolet blocking layer 30, and the ultraviolet light is prevented from being irradiated to the channel region 23, and therefore, compared with the prior art, the stability of a thin film transistor can be improved.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims (10)

1. A thin film transistor includes a substrate, an active layer disposed on the substrate, the active layer including a source region, a drain region, and a channel region; the light-emitting diode is characterized by further comprising an ultraviolet light blocking layer which is arranged above the active layer and at least corresponds to the channel region, and the ultraviolet light blocking layer is used for absorbing ultraviolet light.
2. The thin film transistor according to claim 1, wherein a material of the ultraviolet-blocking layer is an infrared quantum dot; the excitation wavelength of the infrared quantum dot material is 100-420nm, and the emission wavelength is 800-1100 nm;
the material of the infrared quantum dots comprises at least one of CdS, CdSe, CdTe, ZnSe and AgS;
when the infrared quantum dots are made of CdS, CdTe, CdSe doped ZnS and CdSe doped ZnSe, the particle size of the infrared quantum dots is 5-15 nm;
when the material of the infrared quantum dots is AgS, the particle size of the infrared quantum dots is 7-20 nm.
3. The thin film transistor according to claim 1, wherein a material of the ultraviolet-blocking layer is a photoresist after a carbonization treatment.
4. The thin film transistor according to any one of claims 1 to 3, further comprising a gate electrode and a gate insulating layer provided between the active layer and the substrate;
the source electrode, the drain electrode and the passivation layer are arranged on one side of the active layer, which is far away from the substrate; or,
the etching barrier layer, the source electrode, the drain electrode and the passivation layer are arranged on one side of the active layer, which is far away from the substrate; the active layer is an oxide semiconductor active layer;
wherein the ultraviolet light blocking layer is disposed over the passivation layer.
5. A preparation method of a thin film transistor comprises the steps of forming an active layer on a substrate, wherein the active layer comprises a source region, a drain region and a channel region; the method is characterized by further comprising the step of forming an ultraviolet light blocking layer at least corresponding to the channel region above the active layer, wherein the ultraviolet light blocking layer is used for absorbing ultraviolet light.
6. The method of manufacturing according to claim 5, wherein forming the ultraviolet-blocking layer comprises:
forming a photoresist layer at least corresponding to the channel region on the substrate on which the active layer is formed;
and carbonizing the photoresist layer to form the ultraviolet light blocking layer.
7. The method of claim 6, further comprising forming a gate electrode and a gate insulating layer between the active layer and the substrate;
and forming a source electrode and a drain electrode on one side of the active layer away from the substrate; or,
forming an etching barrier layer, a source electrode and a drain electrode on one side of the active layer far away from the substrate; the active layer is an oxide semiconductor active layer;
forming the photoresist layer, including:
forming a passivation layer film on the substrate on which the source electrode and the drain electrode are formed, and forming photoresist;
placing a half-tone mask plate above the photoresist, and exposing and developing the photoresist; completely reserving the photoresist at the position corresponding to the active layer, completely removing the photoresist at the position corresponding to the via hole, and semi-reserving the photoresist at the rest positions; wherein the completely remained photoresist at least covers the channel region of the active layer;
etching the passivation layer film to form the passivation layer;
and carrying out ashing treatment on the photoresist above the passivation layer to form a photoresist layer at least corresponding to the channel region of the active layer.
8. The production method according to claim 6 or 7, wherein the carbonization treatment is a dry etching treatment; or,
annealing is carried out in a vacuum or inert gas environment at the temperature of 250-350 ℃; wherein the annealing time is 0.5-2 h.
9. An array substrate comprising the thin film transistor according to any one of claims 1 to 4.
10. A method of manufacturing an array substrate, wherein a thin film transistor is manufactured by the method of manufacturing a thin film transistor according to any one of claims 5 to 8.
CN201610950863.4A 2016-10-26 2016-10-26 Thin film transistor and preparation method thereof as well as array substrate and preparation method thereof Pending CN106356407A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106876481A (en) * 2017-05-04 2017-06-20 京东方科技集团股份有限公司 A kind of oxide thin film transistor and its manufacture method, array base palte, display device
CN106910779A (en) * 2017-04-06 2017-06-30 京东方科技集团股份有限公司 Thin film transistor (TFT), array base palte and preparation method thereof and display device
WO2018223745A1 (en) * 2017-06-08 2018-12-13 京东方科技集团股份有限公司 Display panel and manufacturing method thereof, and display device
WO2019006988A1 (en) * 2017-07-07 2019-01-10 Boe Technology Group Co., Ltd. Array substrate, display apparatus, and method of fabricating array substrate
WO2024021117A1 (en) * 2022-07-29 2024-02-01 京东方科技集团股份有限公司 Array substrate, display panel, display device, and tiled display device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010007488A1 (en) * 2000-01-07 2001-07-12 Nec Corporation Color filter
CN101907807A (en) * 2009-06-02 2010-12-08 乐金显示有限公司 Display device having oxide thin film transistor and fabrication method thereof
CN104157697A (en) * 2014-07-29 2014-11-19 京东方科技集团股份有限公司 Oxide thin film transistor and array substrate as well as manufacturing methods thereof and display device
CN104425542A (en) * 2013-08-26 2015-03-18 昆山工研院新型平板显示技术中心有限公司 Organic light-emitting display apparatus and preparation method thereof
CN104701337A (en) * 2013-12-04 2015-06-10 群创光电股份有限公司 Active-matrix electroluminescent display device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010007488A1 (en) * 2000-01-07 2001-07-12 Nec Corporation Color filter
CN101907807A (en) * 2009-06-02 2010-12-08 乐金显示有限公司 Display device having oxide thin film transistor and fabrication method thereof
CN104425542A (en) * 2013-08-26 2015-03-18 昆山工研院新型平板显示技术中心有限公司 Organic light-emitting display apparatus and preparation method thereof
CN104701337A (en) * 2013-12-04 2015-06-10 群创光电股份有限公司 Active-matrix electroluminescent display device
CN104157697A (en) * 2014-07-29 2014-11-19 京东方科技集团股份有限公司 Oxide thin film transistor and array substrate as well as manufacturing methods thereof and display device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106910779A (en) * 2017-04-06 2017-06-30 京东方科技集团股份有限公司 Thin film transistor (TFT), array base palte and preparation method thereof and display device
CN106876481A (en) * 2017-05-04 2017-06-20 京东方科技集团股份有限公司 A kind of oxide thin film transistor and its manufacture method, array base palte, display device
CN106876481B (en) * 2017-05-04 2020-11-03 京东方科技集团股份有限公司 Oxide thin film transistor, manufacturing method thereof, array substrate and display device
WO2018223745A1 (en) * 2017-06-08 2018-12-13 京东方科技集团股份有限公司 Display panel and manufacturing method thereof, and display device
US10930788B2 (en) 2017-06-08 2021-02-23 Boe Technology Group Co., Ltd. Display panel and manufacturing method thereof, and display device
WO2019006988A1 (en) * 2017-07-07 2019-01-10 Boe Technology Group Co., Ltd. Array substrate, display apparatus, and method of fabricating array substrate
CN109216373A (en) * 2017-07-07 2019-01-15 京东方科技集团股份有限公司 Array substrate and preparation method thereof
US11387308B2 (en) 2017-07-07 2022-07-12 Boe Technology Group Co., Ltd. Array substrate, display apparatus, and method of fabricating array substrate
WO2024021117A1 (en) * 2022-07-29 2024-02-01 京东方科技集团股份有限公司 Array substrate, display panel, display device, and tiled display device

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