CN106340511A - LED chip and its packaging method - Google Patents
LED chip and its packaging method Download PDFInfo
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- CN106340511A CN106340511A CN201610930913.2A CN201610930913A CN106340511A CN 106340511 A CN106340511 A CN 106340511A CN 201610930913 A CN201610930913 A CN 201610930913A CN 106340511 A CN106340511 A CN 106340511A
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- Prior art keywords
- led chip
- encapsulation structure
- light
- translucent encapsulation
- emitting area
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- 238000000034 method Methods 0.000 title claims abstract description 30
- 238000004806 packaging method and process Methods 0.000 title abstract description 8
- 239000004065 semiconductor Substances 0.000 claims abstract description 31
- 238000005538 encapsulation Methods 0.000 claims description 49
- 239000000463 material Substances 0.000 claims description 45
- 239000000758 substrate Substances 0.000 claims description 19
- 239000000084 colloidal system Substances 0.000 claims description 10
- 238000012856 packing Methods 0.000 claims description 8
- 239000011521 glass Substances 0.000 claims description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract description 2
- 150000004767 nitrides Chemical class 0.000 description 21
- 230000004888 barrier function Effects 0.000 description 13
- 238000002360 preparation method Methods 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 6
- 239000010408 film Substances 0.000 description 5
- 239000004020 conductor Substances 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000004020 luminiscence type Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000009738 saturating Methods 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- 241001300398 Vitrina Species 0.000 description 1
- HXFVOUUOTHJFPX-UHFFFAOYSA-N alumane;zinc Chemical compound [AlH3].[Zn] HXFVOUUOTHJFPX-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 229910001195 gallium oxide Inorganic materials 0.000 description 1
- 229910021389 graphene Inorganic materials 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/005—Processes relating to semiconductor body packages relating to encapsulations
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Device Packages (AREA)
Abstract
The invention provides an LED chip and its packaging method wherein the LED chip comprises an LED chip unit with at least one lighting face; and a half transparent packaging structure, the opening at one side of which forms holding space for the LED chip unit. The half transparent packaging structure contains phosphor, and at least a portion of the outgoing light of the at least one lighting face is emitted from the semiconductor packaging structure. The LED chip and the packaging method increase the performance of an LED chip product.
Description
Technical field
The invention belongs to photoelectron technical field, more particularly, to a kind of led chip and its method for packing.
Background technology
The advantages of light emitting diode (light emitting diode, led) is because of its high brightness, low in calories, long-life, quilt
Referred to as 21 century the most promising green illumination light source, is used for various application products and includes light source, lighting apparatus, intelligence
Terminal etc..And, today that wearable electronic get most of the attention increasingly lightening in intelligent terminal, the package size of led chip and work(
The fusion of energy becomes increasingly important.
Chip size packages (chip scale package, csp) technology as a kind of new encapsulation technology, in the next generation
Attract industry concern, tool has greater room for improvement in discrete power led application.Lifting with flip-chip yield and production capacity
The expansion of scale, embodiment is become apparent from by its price advantage.Today, it is indoor, some that csp has not only rested on research and development
Produce in enormous quantities in application, and show its advantage and value.At present, the csp technology of most of upside-down mounting led chips typically will be through
Cross upside-down mounting binding, sprayed with fluorescent powder, moulded lens, cutting, five making steps of testing, sorting.
Above-mentioned existing csp technology is directly to smear fluorescent material in the light-emitting area of led chip, not only complex process, and
Easily in uneven thickness, situation in irregular shape in phosphor powder layer, will be uneven for the emergent light spot leading to led chip, pole
The properties of product of big impact led chip.
Content of the invention
In view of this, the present invention proposes a kind of led chip and its method for packing, to improve the properties of product of led chip.
In a first aspect, embodiments providing a kind of led chip, this chip includes:
Led chip unit, including at least one light-emitting area;
Translucent encapsulation structure, a side opening is formed with receiving space, and it is empty that described led chip unit is arranged on described receiving
Interior, contain fluorescent material in described translucent encapsulation structure, at least part of emergent ray of at least one light-emitting area described passes through
Described semiconductor package sends.
Alternatively, the emergent light of all light-emitting areas all sends through described semiconductor package.
Alternatively, described led chip unit includes substrate, and forms ray structure over the substrate;
Described light-emitting area is the back side and the side of described substrate.
Alternatively, arrange one layer between the described light-emitting area of described translucent encapsulation structure and described led chip unit
Transparent with machine colloidal materials.
Alternatively, described translucent encapsulation structure is formed in one structure.
Alternatively, described translucent encapsulation structure is the glass containing fluorescent material or the colloid film containing fluorescent material.
Alternatively, described translucent encapsulation structure has multiple periodicity bump maps on the bottom surface deviating from described receiving space
Case.
Alternatively, described periodicity relief pattern is taper and/or semicircle.
Second aspect, embodiments provides a kind of method for packing of led chip, and the method includes:
Multiple led chip units are placed into there is the translucent encapsulation structure that a side opening forms multiple receiving spaces
Interior, contain fluorescent material in described translucent encapsulation structure, at least part of emergent ray of at least one light-emitting area described passes through institute
State semiconductor package to send;
Described translucent encapsulation structure is cut, forms single discrete led chip.
Alternatively, described be placed into multiple led chip units has a side opening and forms the semi-transparent of multiple receiving spaces
Also included before in bright encapsulating structure:
Apply the organic colloid material of layer of transparent on the receiving space surface of described translucent encapsulation structure;
Described described translucent encapsulation structure is cut, formed single discrete led chip before also include:
Described translucent encapsulation structure is toasted to solidify described organic colloid material.
Embodiments provide a kind of led chip and its method for packing, semi-transparent by led chip unit is arranged on
In the receiving space of bright encapsulating structure, in translucent encapsulation structure, contain fluorescent material, at least partly the going out of at least one light-emitting area
Penetrate light to send through semiconductor package.Whole technical process is simple, and cost is few and luminescent device light-emitting area is many, technique
Method is simple, stable electrical properties.
Brief description
The exemplary embodiment of the present invention or prior art will be described in detail by referring to accompanying drawing below, make the general of this area
Logical technical staff becomes apparent from the above-mentioned and other feature and advantage of the present invention, in accompanying drawing:
A kind of led chip profile figure that Fig. 1 provides for the embodiment of the present invention one;
A kind of led chip unit profile that Fig. 2 provides for the embodiment of the present invention one;
A kind of led chip profile figure that Fig. 3 provides for the embodiment of the present invention one;
A kind of led chip profile figure that Fig. 4 provides for the embodiment of the present invention one;
A kind of led chip profile figure that Fig. 5 provides for the embodiment of the present invention one;
A kind of led chip preparation method flow chart that Fig. 6 provides for the embodiment of the present invention two;
The corresponding profile of each step of a kind of led chip preparation method that Fig. 7 a- Fig. 7 b provides for the embodiment of the present invention two;
A kind of led chip preparation method flow chart that Fig. 8 provides for the embodiment of the present invention two;
The corresponding profile of each step of a kind of led chip preparation method that Fig. 9 a- Fig. 9 o provides for the embodiment of the present invention two.
Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that, in order to just
Part related to the present invention rather than entire infrastructure is illustrate only in description, accompanying drawing.
A kind of led chip profile figure that Fig. 1 provides for the embodiment of the present invention one.Fig. 2 provides for the embodiment of the present invention one
A kind of led chip unit profile.A kind of led chip profile figure that Fig. 3 provides for the embodiment of the present invention one.Fig. 4 is the present invention
A kind of led chip profile figure that embodiment one provides.A kind of led chip profile figure that Fig. 5 provides for the embodiment of the present invention one.
Referring to Fig. 1, the invention provides a kind of led chip, this chip includes: led chip unit 10, including at least one
Light-emitting area.Translucent encapsulation structure 20, a side opening is formed with receiving space 30, and led chip unit 10 is arranged on receiving space
In 30, in figure dotted line frame inner region, contains fluorescent material, at least portion of at least one light-emitting area described in translucent encapsulation structure 20
Emergent ray is divided to send through semiconductor package 20.
Embodiments provide a kind of led chip, by led chip unit is arranged on translucent encapsulation structure
In receiving space, in translucent encapsulation structure, contain fluorescent material, at least part of emergent ray of at least one light-emitting area is through partly
Conductor package structure sends.Whole technical process is simple, and cost is few and luminescent device light-emitting area is many, stable electrical properties.This
Inventive embodiments by allowing led chip light emitting with the translucent encapsulation structure containing fluorescent material, wherein light-emitting area be more than or equal to
One, increased the chance of emergent light, improve luminous efficiency.
Alternatively, in technique scheme, the emergent light of all light-emitting areas all sends through semiconductor package 20.
Alternatively, referring to Fig. 2, in technique scheme, led chip unit 10 includes substrate 110, and is formed at lining
Ray structure on bottom 110.Light-emitting area is the back side 1100 of described substrate 110 and 4 sides 1101 of led chip unit, that is,
There are 5 light-emitting areas, substantially increase the luminous efficiency of led chip unit 10.
Exemplarily, with reference to Fig. 2, in technique scheme, led chip unit 10 includes substrate 110, in substrate 110
Ray structure be: the iii nitride semiconductor layer 111 of N-shaped, positioned at the top of substrate 110.In N-shaped iii group-III nitride half
The top of conductor layer 111 is one layer of multiple quantum well active layer 112.It is p-type iii race nitrogen above multiple quantum well active layer 112
Compound semiconductor layer 113.Above p-type iii nitride semiconductor layer 113 it is and p-type iii nitride semiconductor layer
The first electrode layer 114 that 113 are joined directly together.There is the iii nitride semiconductor layer reaching N-shaped on first electrode layer 114 surface
111 the first groove 115.It is insulating barrier 116 on the surface of first electrode layer 114 surface and the first groove 115.Insulating barrier 116
There is the second groove 117 reaching described first electrode layer 114 on surface.It is the in insulating barrier 116 surface and the second groove 117
Two electrode layers 118, the second electrode lay 118 is electrically connected with first electrode layer 114.In insulating barrier 116 surface and the first groove 115
For the 3rd electrode layer 119, the 3rd electrode layer 119 is electrically connected with the iii nitride semiconductor layer 111 of N-shaped, the second electrode lay
118 are not connected to the 3rd electrode layer 119.Wherein, insulating barrier 116 is the multilayer dielectricity with low absorptance, high optical reflectance
Film layer, for example, can be silica, silicon nitride, aluminum oxide and gallium oxide etc., but be not limited to above-mentioned material.It has height
The multicycle bragg structure of reflectivity, the earth silicon/titanic oxide dielectric film of such as multicycle.Decrease led chip
The light that unit sends appears, and increased external quantum efficiency.Film layer first electrode layer 114 be metal oxide transparent conducting layer and
One of high optical reflectance metal level.Metallic diaphragm for example can adopt ag, au, al, pt and rh etc..Metal oxide
The material of transparency conducting layer can be including but not limited to following material: tin indium oxide, gallium-doped zinc oxide, mix the oxidation of aluminium
Zinc and Graphene etc. have the material of high transmission rate, high conductivity.First electrode layer 114 and p-type iii group-III nitride semiconductor
Good Ohmic contact is defined between layer 113.
Alternatively, referring to Fig. 3, between the light-emitting area of translucent encapsulation structure 20 and led chip unit, one layer of setting is saturating
Bright organic colloid material 40.Exemplarily, transparent organic colloid material can be the organic materials such as epoxy resin.
Alternatively, referring to Fig. 4, described translucent encapsulation structure 20 is formed in one structure.Wherein, integrated formed structure is
Refer to this semi-transparent configuration to complete not by splicing, bonding many this materials of part during making.It is integrally formed knot
Structure ensures the uniformity of enough fluorescent material, to ensure the uniformity of hot spot.
Alternatively, translucent encapsulation structure 20 is the glass containing fluorescent material or the colloid film containing fluorescent material.Because
There is fluorescent material, so the light that light emitting diode issues is after light-emitting area, a part of excitated fluorescent powder sends corresponding color
Light, the light that fluorescent material issues can obtain, with being optically coupled together that diode sends, the hot spot wanted.
Alternatively, in technique scheme, translucent encapsulation structure 20 has on the bottom surface deviating from described receiving space
Multiple periodicity relief patterns.It should be noted that the shape of pattern does not limit.
Alternatively, described periodicity relief pattern is taper and/or semicircle.
Referring to Fig. 3 and Fig. 4, described periodicity relief pattern is taper 200.Referring to Fig. 5, periodicity relief pattern is semicircle
Shape 201.Periodicity relief pattern can also include taper and semicircle simultaneously.Such periodicity relief pattern is to increase
Luminance.
Embodiment two
A kind of led chip preparation method flow chart that Fig. 6 provides for the embodiment of the present invention two.Fig. 7 a- Fig. 7 b is the present invention
The corresponding profile of each step of a kind of led chip preparation method that embodiment two provides.Fig. 8 provides for the embodiment of the present invention two
A kind of led chip preparation method flow chart.A kind of led chip preparation method that Fig. 9 a- Fig. 9 o provides for the embodiment of the present invention two
The corresponding profile of each step.
On the basis of above-described embodiment one, the embodiment of the present invention two provides a kind of method for packing of led chip, needs
Illustrate, the led chip packaging method that the led chip that above-described embodiment is related to can be by providing in the present embodiment is complete
Become.Referring to Fig. 6, the method step is as follows:
Step 110, multiple led chip units are placed into there is the translucent envelope that a side opening forms multiple receiving spaces
In assembling structure, in translucent encapsulation structure, contain fluorescent material, at least part of emergent ray of at least one light-emitting area passes through partly leads
Body encapsulating structure sends.
Referring to Fig. 7 a, multiple led chip units 10 are placed into have that a side opening forms multiple receiving spaces 30 half
In transparent encapsulating structure 20, in translucent encapsulation structure 20, contain fluorescent material, at least part of emergent light of at least one light-emitting area
Line sends through described semiconductor package.The light that i.e. led chip unit sends by translucent encapsulation structure 20 be used as send out
Light face.It should be noted that increasing with transparency, the ratio of the light of led chip unit of outgoing is improving.For same
For block translucent encapsulation structure 20, transparency is higher, and the content of fluorescent material reduces relatively.The addition of fluorescent material should have one
Individual preferred content range, on the one hand, the light transmission of enough ratios out, increases external quantum efficiency.On the other hand, led chip
The illumination of unit is mapped on fluorescent material and inspires fluorescent material and send light, and both light can be coupled, and forms the light wanted
Spot.
Step 120, double transparent encapsulating structure are cut, and form single discrete led chip.
Referring to Fig. 7 b, double transparent encapsulating structure 20 carries out longitudinally cutting, defines single discrete led chip.
Embodiments provide a kind of led chip packaging method, by led chip unit is arranged on translucent envelope
In the receiving space of assembling structure, in translucent encapsulation structure, contain fluorescent material, at least part of emergent light of at least one light-emitting area
Line sends through semiconductor package.Whole technical process is simple, and cost is few and luminescent device light-emitting area is many, process
Simply, stable electrical properties.
Exemplarily, the preparation method referring to the led chip unit 10 mentioned in Fig. 8 above-described embodiment one is as follows:
Step 210, offer substrate.
Referring to Fig. 9 a, substrate 110 can be for example Sapphire Substrate, and silicon carbide substrates or other insulation transparent serve as a contrast
Bottom.
Step 211, above substrate formed N-shaped iii nitride semiconductor layer.
Step 212, above n-type semiconductor layer formed one layer of multiple quantum well active layer.
Step 213, above multiple quantum well active layer formed p-type iii nitride semiconductor layer.
Referring to Fig. 9 b~Fig. 9 d, sequentially form N-shaped iii nitride semiconductor layer 111, volume above substrate 110
Sub- trap active layer 112 and p-type iii nitride semiconductor layer 113.
Step 214, above the iii nitride semiconductor layer of p-type formed with p-type iii nitride semiconductor layer
The first electrode layer being joined directly together.
Reference picture 9e, forms and p-type iii group-III nitride semiconductor above p-type iii nitride semiconductor layer 113
The first electrode layer 114 that layer 113 is joined directly together.Exemplarily, can to include metal oxide saturating for thin film first electrode layer 114
One of bright conductive layer and high optical reflectance metal level.
Step 215, carry out etching groove in first electrode layer surface, to form the iii group-III nitride semiconductor reaching N-shaped
First groove of layer.
Referring to Fig. 9 f, carry out etching groove on first electrode layer 114 surface, to form the iii group-III nitride reaching N-shaped half
First groove 115 of conductor layer.Lithographic method can be for example dry etching can also be wet etching.
Step 216, the surface of first electrode layer surface and the first groove formed insulating barrier.
Referring to Fig. 9 g, form insulating barrier 116 on the surface of the surface of first electrode layer 114 and the first groove 115.Insulation
Layer 116 exemplarily, can be sio2, the insulating materials such as sin.Preparation method can be for example oxidation or depositing technics.
Step 217, the insulating barrier on etching the first bottom portion of groove surface, expose the iii nitride semiconductor layer of N-shaped.Right
Insulating barrier carries out etching groove, forms the second groove reaching first electrode layer.
Referring to Fig. 9 h, etch the insulating barrier 116 on the first groove 115 surface bottom portion surface, expose N-shaped iii group-III nitride half
Conductor layer 111.Second groove 117 on insulating barrier 116 surface also to be formed simultaneously, the depth of the second groove 117 extends to first
Electrode layer 114.
Step 218, form the second electrode lay, the second electrode lay and first electrode in surface of insulating layer and the second groove
Layer electrical connection;Form the 3rd electrode layer, the iii group-III nitride of the 3rd electrode layer and N-shaped in surface of insulating layer and the second groove
Semiconductor layer electrically connects, and the second electrode lay is not connected to described 3rd electrode layer.
Referring to Fig. 9 i, form the second electrode lay 118 in insulating barrier 116 surface and the second groove 117.3rd electrode
119 with N-shaped iii nitride semiconductor layer 111 directly contact.Another part is had to extend into the top of insulating barrier 116.Example
Property ground, the second electrode lay 118 and the 3rd electrode 119 can using one of au, al, cu, ag, fe, ti, cr, pt, ni or
Multiple make.Process can be for example magnetron sputtering technique.
It should be noted that above-mentioned steps are for convenience of description, the encapsulation of introduction taking single discrete led chip as a example
Method.But it is tangible produce during, whole wafer piece has the led chip unit region of repetition it is therefore desirable to by its
It is divided into multiple discrete led chip units, discrete led chip unit includes the second electrode lay 118 and the 3rd electrode layer
119 and all material of the second electrode lay 118 and the 3rd electrode layer 119 vertical direction.And whole wafer piece is divided into list
After individual led chip unit, it to be sorted, chip close for photoelectric parameter is concentrated in together.
Step 219, by the fluorescent material of doses and vitrina are mixed to get translucent encapsulation structure.
Exemplarily, referring to Fig. 9 j, there is the side of multiple pros periodic arrangement distribution on the surface of translucent encapsulation structure 20
It is receiving space 30 to pit.The size of the length and width than led chip unit for the size of the length and width of wherein square pit is bigger, recessed
The high size in hole is more smaller than the height of led chip unit.Minimum spacing between pit is that pit lower surface (deviates from pit one
Side) material thickness twice about.
Step 220, the back side of the substrate of discrete luminescence chip is placed on the described appearance of described translucent encapsulation structure
Receive in space.The back side of substrate and side is made to form one layer of translucent encapsulation structure containing fluorescent material.Along perpendicular to discrete
The translucent encapsulation structure containing fluorescent material between luminescence chip is cut, and forms single discrete luminescent device.
Alternatively, multiple led chip units are placed into and there is the translucent envelope that a side opening forms multiple receiving spaces
Also included before in assembling structure:
Referring to Fig. 9 k, apply the organic colloid material 40 of layer of transparent on the receiving space surface of translucent encapsulation structure 20.
Double transparent encapsulating structure is cut, and also includes before forming single discrete led chip:
Double transparent encapsulating structure is toasted to solidify organic colloidal materials.It should be noted that the temperature of baking oven exists
In the range of 100 DEG C~200 DEG C, the time of baking is 20 minutes~60 minutes.
Exemplarily, translucent encapsulation structure 20 has multiple periodicity bump maps on the bottom surface deviating from described receiving space
Case.It should be noted that the shape of pattern does not limit.
Can be taper 200 referring to periodicity relief pattern described in Fig. 9 l.Referring to Fig. 9 m, described periodicity relief pattern can
Think semicircle 201.Periodicity relief pattern can also include taper and semicircle simultaneously.Such periodicity relief pattern is
In order to increase luminance.Fig. 9 n is corresponding discrete led chip after cutting, and its periodicity relief pattern can be taper.Figure
9o is corresponding discrete led chip after cutting, and its periodicity relief pattern can be semicircle.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art various obvious changes,
Readjust and substitute without departing from protection scope of the present invention.Therefore although being carried out to the present invention by above example
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other Equivalent embodiments more can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (10)
1. a kind of led chip is it is characterised in that include:
Led chip unit, including at least one light-emitting area;
Translucent encapsulation structure, a side opening is formed with receiving space, and described led chip unit is arranged on described receiving space
Interior, contain fluorescent material in described translucent encapsulation structure, at least part of emergent ray of at least one light-emitting area described passes through institute
State semiconductor package to send.
2. led chip according to claim 1 it is characterised in that
The emergent light of all described light-emitting areas all sends through described semiconductor package.
3. led chip according to claim 1 it is characterised in that
Described led chip unit includes substrate, and forms ray structure over the substrate;
Described light-emitting area is the back side and the side of described substrate.
4. led chip according to claim 1 is it is characterised in that include:
The organic gel of layer of transparent is set between the described light-emitting area of described translucent encapsulation structure and described led chip unit
Body material.
5. led chip according to claim 1 is it is characterised in that include:
Described translucent encapsulation structure is formed in one structure.
6. led chip according to claim 1 is it is characterised in that include:
Described translucent encapsulation structure is the glass containing fluorescent material or the colloid film containing fluorescent material.
7. led chip according to claim 1 is it is characterised in that described translucent encapsulation structure is deviating from described receiving
Multiple periodicity relief patterns are had on the bottom surface in space.
8. led chip according to claim 7 is it is characterised in that include:
Described periodicity relief pattern is taper and/or semicircle.
9. a kind of method for packing of led chip is it is characterised in that include:
Multiple led chip units are placed into and there is a side opening are formed in the translucent encapsulation structure of multiple receiving spaces, institute
State and in translucent encapsulation structure, contain fluorescent material, at least part of emergent ray of at least one light-emitting area described is partly led through described
Body encapsulating structure sends;
Described translucent encapsulation structure is cut, forms single discrete led chip.
10. led chip according to claim 9 method for packing it is characterised in that described by multiple led chip units
It is placed into have before a side opening is formed in the translucent encapsulation structure of multiple receiving spaces and also include:
Apply the organic colloid material of layer of transparent on the receiving space surface of described translucent encapsulation structure;
Described described translucent encapsulation structure is cut, formed single discrete led chip before also include:
Described translucent encapsulation structure is toasted to solidify described organic colloid material.
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Cited By (1)
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CN109244222A (en) * | 2018-09-28 | 2019-01-18 | 厦门乾照光电股份有限公司 | A kind of LED flip chip and preparation method thereof |
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