CN106331955B

CN106331955B - Audio signal processing method, device and system, transmitting equipment and receiving equipment

Info

Publication number: CN106331955B
Application number: CN201610950248.3A
Authority: CN
Inventors: 张伟; 吴健; 翟立新; 何大剑
Original assignee: Shenzhen Myir Acoustic Technology Development Co ltd
Current assignee: Shenzhen Myir Acoustic Technology Development Co ltd
Priority date: 2016-10-26
Filing date: 2016-10-26
Publication date: 2022-07-26
Anticipated expiration: 2036-10-26
Also published as: CN106331955A

Abstract

The invention discloses a method, a device and a system for processing an audio signal, a sending device and a receiving device. Wherein, the method comprises the following steps: the method comprises the steps that a sending device obtains a first audio signal, wherein the first audio signal is an audio signal to be transmitted and collected from an audio source; the sending equipment processes the first audio signal to obtain an audio data packet, wherein the audio data packet at least comprises: a physical address of the first audio signal and the receiving device; the transmitting device transmits the audio data packet to the receiving device. The invention solves the technical problems that the audio signal processing method in the prior art is complex in configuration and cannot realize plug and play.

Description

Audio signal processing method, device and system, transmitting equipment and receiving equipment

Technical Field

The present invention relates to the field of audio signal processing, and in particular, to a method, an apparatus, and a system for processing an audio signal, and a transmitting device and a receiving device.

Background

In scenes such as concerts and the like, audio signals are often required to be transmitted to a console for processing, and the current traditional solutions have two types:

the first is to transmit audio signals through an analog line, which is not easy to obtain, so if a project does not prepare enough wires and needs to be purchased temporarily, it is difficult to purchase appropriate wires in the market, which brings difficulties to construction. On the other hand, the analog lines are easily disturbed and cannot be completely filtered once the disturbance is introduced.

The second is to transmit audio signals through the ethernet, and currently, solutions for transmitting audio signals through the ethernet exist in the market, but most of the solutions have large delay and complex configuration, and cannot achieve plug and play.

Aiming at the problems that the processing method of the audio signal in the prior art is complex in configuration and cannot realize plug and play, an effective solution is not provided at present.

Disclosure of Invention

The embodiment of the invention provides a method, a device and a system for processing an audio signal, a sending device and a receiving device, which are used for at least solving the technical problems that the configuration of the method for processing the audio signal in the prior art is complex and the plug and play cannot be realized.

According to an aspect of the embodiments of the present invention, there is provided an audio signal processing method, including: the method comprises the steps that a sending device obtains a first audio signal, wherein the first audio signal is an audio signal to be transmitted and collected from an audio source; the sending equipment processes the first audio signal to obtain an audio data packet, wherein the audio data packet at least comprises: a physical address of the first audio signal and the receiving device; the transmitting device transmits the audio data packet to the receiving device.

Further, the sending device processes the first audio signal to obtain the audio data packet includes: the sending equipment performs analog-to-digital conversion on the first audio signal to obtain a second audio signal, wherein the first audio signal is an analog signal, and the second audio signal is a digital signal; the sending equipment performs format conversion on the first audio signal according to a preset format to obtain audio data; and the sending equipment processes the audio data according to a preset protocol to obtain an audio data packet.

Further, the transmitting apparatus processes the audio data in units of frames.

Further, after the sending device transmits the audio data packet to the receiving device through the ethernet, the method further includes: receiving the audio data packet by the receiving equipment; the receiving equipment processes the audio data packet to obtain a first audio signal; the receiving device outputs a first audio signal.

Further, the receiving device processes the audio data packet to obtain the first audio signal includes: the receiving equipment processes the audio data packet according to a preset protocol to obtain audio data; the receiving equipment performs format conversion on the audio data according to a preset format to obtain a second audio signal; and the receiving equipment performs digital-to-analog conversion on the second audio signal to obtain a first audio signal.

Further, after the receiving device processes the audio data packet to obtain the first audio signal, the method further includes: the receiving equipment stores the first audio signal into a buffer queue; the receiving device reads the first audio signals from the buffer queue in sequence.

Further, when the sending device processes the first audio signal to obtain the audio data packet, the method further includes: the sending equipment receives key state information input from the outside; the sending equipment drives an LED lamp of the sending equipment to display according to the key state information; the sending device processes the first audio signal and the key state information to obtain an audio data packet, wherein the audio data packet further comprises: key status information.

Further, after the sending device transmits the audio data packet to the receiving device through the ethernet, the method further includes: the receiving equipment processes the audio data packet according to a preset protocol to obtain key state information; and the receiving equipment drives the LED lamp of the receiving equipment to display according to the key state information.

According to another aspect of the embodiments of the present invention, there is also provided an apparatus for processing an audio signal, including: the device comprises an acquisition module, a processing module and a processing module, wherein the acquisition module is used for acquiring a first audio signal, and the first audio signal is an audio signal to be transmitted and is acquired from an audio source; a processing module, configured to process the first audio signal to obtain an audio data packet, where the audio data packet at least includes: a physical address of the first audio signal and the receiving device; and the sending module is used for sending the audio data packet to the receiving equipment.

According to another aspect of the embodiments of the present invention, there is also provided an audio signal processing system, including: the audio source is used for collecting a first audio signal to be transmitted; the sending device is connected with the audio source and used for processing the first audio signal to obtain an audio data packet, wherein the audio data packet at least comprises: a physical address of the first audio signal and the receiving device; and the receiving equipment is connected with the sending equipment through a network cable and used for receiving the audio data packet.

Further, the transmission apparatus includes: the digital-to-analog converter is used for performing analog-to-digital conversion on the first audio signal to obtain a second audio signal, wherein the first audio signal is an audio signal to be transmitted and is acquired from an audio source, the first audio signal is an analog signal, and the second audio signal is a digital signal; the processor is connected with the digital-to-analog converter and used for carrying out format conversion on the first audio signal according to a preset format to obtain audio data; and the Ethernet controller is connected with the processor and used for processing the audio data according to a preset protocol to obtain an audio data packet and sending the audio data packet.

Furthermore, the receiving device is further configured to process the audio data packet to obtain a first audio signal; the system further comprises: and the audio output unit is connected with the receiving equipment and used for outputting the first audio signal.

Further, the reception apparatus includes: the Ethernet controller is used for processing the audio data packet according to a preset protocol to obtain audio data; the processor is connected with the Ethernet controller and used for carrying out format conversion on the audio data according to a preset format to obtain a second audio signal; and the digital-to-analog converter is connected with the processor and is used for performing digital-to-analog conversion on the second audio signal to obtain a first audio signal.

Further, the processor includes: the first end of the first interface is connected with the digital-to-analog converter; the first processing unit is connected with the second end of the first interface; and the first end of each second interface is connected with the processing unit, and the second end of each second interface is connected with the Ethernet controller.

Further, the processor further comprises: the third interface is used for receiving key state information input from the outside and driving the LED lamp to display; the two second interfaces are also used for outputting key state information.

Further, the processor further comprises: the fourth interface is connected with the controller and used for receiving the control parameters output by the controller, wherein the control parameters at least comprise: the transmission form of the physical address is one of the following: unicast format and broadcast format.

Further, the processor is an FPGA.

Further, the ethernet controller comprises: the second processing unit is used for processing the audio data to obtain an audio data packet or processing the audio data packet to obtain audio data; and the fifth interface is connected with the second processing unit and used for outputting the audio data packet or receiving the audio data packet.

Further, the model of the ethernet controller is DM 9000.

Further, the fifth interface is an RJ45 interface carrying a transformer.

Further, the model of the digital-to-analog converter is CS5368 or CS 4382.

According to another aspect of the embodiments of the present invention, there is also provided an audio signal transmitting apparatus including: the digital-to-analog converter is connected with the audio source and used for performing analog-to-digital conversion on the acquired first audio signal to obtain a second audio signal, wherein the first audio signal is an audio signal to be transmitted and acquired from the audio source, the first audio signal is an analog signal, and the second audio signal is a digital signal; the processor is connected with the digital-to-analog converter and used for carrying out format conversion on the first audio signal according to a preset format to obtain audio data; and the Ethernet controller is respectively connected with the processor and the receiving equipment and used for processing the audio data according to a preset protocol to obtain an audio data packet and sending the audio data packet.

According to another aspect of the embodiments of the present invention, there is also provided an audio signal receiving apparatus including: the Ethernet controller is connected with the sending equipment and used for processing the received audio data packet according to a preset protocol to obtain audio data; the processor is connected with the Ethernet controller and used for carrying out format conversion on the audio data according to a preset format to obtain a second audio signal; and the digital-to-analog converter is respectively connected with the processor and the audio output unit and is used for performing digital-to-analog conversion on the second audio signal to obtain a first audio signal and outputting the first audio signal, wherein the first audio signal is an analog signal, and the second audio signal is a digital signal.

According to another aspect of the embodiments of the present invention, there is also provided a storage medium, where the storage medium includes a stored program, and when the program runs, an apparatus in which the storage medium is located is controlled to execute the method for processing an audio signal in any one of the above embodiments.

According to another aspect of the embodiments of the present invention, there is also provided a processor, configured to execute a program, where the program executes to perform the method for processing an audio signal according to any one of the above embodiments.

In the embodiment of the invention, the sending equipment acquires the first audio signal, processes the first audio signal to obtain the audio data packet, and sends the audio data packet to the receiving equipment, so that the purpose of processing and transmitting the audio signal is realized. It is easy to notice that the audio data packet contains the physical address of the receiving device, i.e. the sending device and the receiving device operate in the MAC layer, and can be plug-and-play without IP addresses, thereby solving the technical problems that the processing method of the audio signal in the prior art is complex in configuration and cannot be plug-and-play. Therefore, through the scheme provided by the embodiment of the invention, the effect that the use habit is similar to that of an analog line and the effect of plug and play can be achieved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:

fig. 1 is a flowchart of a method of processing an audio signal according to an embodiment of the present invention;

fig. 2 is a schematic diagram of an apparatus for processing an audio signal according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of an audio signal processing system according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of an alternative audio signal processing system according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of an alternative processor in accordance with embodiments of the invention;

FIG. 6 is a schematic diagram of an alternative processing system for transmitting audio signals over Ethernet in accordance with embodiments of the present invention;

FIG. 7 is a schematic diagram of an alternative external interface to an FPGA in accordance with embodiments of the present invention;

FIG. 8 is a schematic diagram of interface signals of an optional FPGA clock, reset, key, display interface according to an embodiment of the present invention;

FIG. 9 is a schematic diagram of interface signals of an alternative I2S interface of an FPGA according to an embodiment of the invention;

fig. 10 is a schematic diagram of interface signals of an optional Eth0 ethernet interface of an FPGA according to an embodiment of the present invention;

fig. 11 is a schematic diagram of interface signals of an optional Eth1 ethernet interface of an FPGA according to an embodiment of the present invention;

FIG. 12 is a schematic diagram of interface signals of an MCU _ SPI interface of an alternative FPGA according to an embodiment of the present invention;

fig. 13 is a schematic diagram of an apparatus for transmitting an audio signal according to an embodiment of the present invention; and

fig. 14 is a schematic diagram of an audio signal receiving apparatus according to an embodiment of the present invention.

Detailed Description

In order to make those skilled in the art better understand the technical solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, shall fall within the protection scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the signals so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

Example 1

In accordance with an embodiment of the present invention, there is provided an embodiment of a method for processing an audio signal, it should be noted that the steps illustrated in the flowchart of the drawings may be performed in a computer system such as a set of computer executable instructions, and that while a logical order is illustrated in the flowchart, in some cases the steps illustrated or described may be performed in an order different than that herein.

Fig. 1 is a flowchart of a method for processing an audio signal according to an embodiment of the present invention, as shown in fig. 1, the method including the steps of:

step S102, a sending device acquires a first audio signal, wherein the first audio signal is an audio signal to be transmitted and collected from an audio source.

Specifically, the audio source may be an 8-channel analog audio source, and outputs an 8-channel analog audio signal; the first Audio signal may be an 8-channel analog Audio signal, and the transmitting device may be a device AE8 (abbreviation of Audio to Ethernet 8 channels) that outputs the Audio signal via Ethernet.

Step S104, the sending device processes the first audio signal to obtain an audio data packet, where the audio data packet at least includes: the first audio signal and a physical address of the receiving device.

Specifically, the physical address may be a MAC address of the receiving device, that is, the transmitting device operates in a MAC layer.

Step S106, the sending device sends the audio data packet to the receiving device.

Specifically, the receiving device may be a device EA8 (short for Ethernet to Audio 8 channels) that receives an Audio data packet sent by AE8 through Ethernet, AE8 and EA8 are two ends of Ethernet communication, and may be connected through a network cable, and the receiving device also operates in the MAC layer.

In an alternative, taking a concert scenario as an example, the voice sent by the singer may be collected by a microphone, and 8 paths of analog audio signals are output to the AE8, the AE8 is responsible for packing the 8 paths of analog audio signals into ethernet packets (i.e., the above audio packets), and the ethernet packets are transmitted to the EA8 at the remote end through a network cable, and the EA8 may receive the ethernet packets from the ethernet network. Specifically, after the AE8 acquires the 8channels of analog audio signals, the 8channels of analog audio signals may be packaged according to the MAC address of EA8, so as to implement data processing of the MAC layer of the sending device, and obtain an audio data packet that is finally sent to the receiving device.

According to the embodiment of the invention, the sending equipment acquires the first audio signal, processes the first audio signal to obtain the audio data packet, and sends the audio data packet to the receiving equipment, so that the purpose of processing and transmitting the audio signal is achieved. It is easy to notice that the audio data packet contains the physical address of the receiving device, i.e. the sending device and the receiving device operate in the MAC layer, and can be plug-and-play without IP addresses, thereby solving the technical problems that the processing method of the audio signal in the prior art is complex in configuration and cannot be plug-and-play. Therefore, through the scheme provided by the embodiment of the invention, the effect that the use habit is similar to that of an analog line and the effect of plug and play can be achieved.

Optionally, in the foregoing embodiment of the present invention, in step S104, the processing, by the sending device, the first audio signal to obtain the audio data packet includes:

step S1042, performing analog-to-digital conversion on the first audio signal by the sending device to obtain a second audio signal, where the first audio signal is an analog signal and the second audio signal is a digital signal.

In an optional scheme, since an analog line is not easy to obtain and is easy to interfere, and interference cannot be completely eliminated after being introduced, in the above embodiment of the present invention, after receiving 8channels of analog audio signals, AE8 may perform analog-to-digital AD conversion on the 8channels of analog audio signals through an internal analog-to-digital conversion unit to obtain 8channels of digital audio signals, that is, the above second audio signal, and transmit the digital signals instead of the transmission analog signals, so that interference is not easy to occur in the transmission process.

Step S1044 is that the sending device performs format conversion on the first audio signal according to a preset format to obtain audio data.

Specifically, the preset format may be an I2S format (Inter-IC Sound, audio frequency built in an integrated circuit), which is a transmission standard established by audio data transmission between digital audio devices, in the embodiment of the present invention, the I2S parameters are: a sampling rate of 48KHz and a sampling accuracy of 24 bits are exemplified for explanation.

In an optional scheme, after an analog-to-digital conversion unit inside the AE8 converts an analog audio signal into a digital audio signal, the analog-to-digital conversion unit transmits the converted 8channels of digital audio signals to a Field Programmable Gate Array FPGA (short for Field-Programmable Gate Array), because the digital audio signal adopts an interface standard of an I2S format, the FPGA needs to perform format conversion on the digital audio signal, complete the docking between the digital audio signal output by the analog-to-digital conversion unit and an ethernet data packet, and perform format conversion according to an I2S parameter, so as to convert all digital audio signals of an I2S format into audio data that can be recognized by an ethernet protocol processing unit.

Step S1046, the sending device processes the audio data according to a preset protocol, so as to obtain an audio data packet.

Specifically, since the audio data packet includes the MAC address of the receiving device, the predetermined protocol may be a MAC layer protocol.

Optionally, in the foregoing embodiment of the present invention, the sending device processes the audio data in units of frames.

It should be noted here that AE8 and EA8 are two independent boards, and although they both use a 12.288M crystal oscillator as a clock source of an analog-to-digital conversion unit (AD/DA), the frequencies of the two crystal oscillators may not be identical, and there is a certain difference between them, and the size of the difference depends on the precision of the crystal oscillator, where the precision of the crystal oscillator used in audio is typically several tens of PPM (parts Per Million, abbreviated as Part Per Million). The difference of two crystal oscillator frequencies can cause 'sliding codes' on communication, and the mode for solving the 'sliding codes' generally comprises the steps of controlling the crystal oscillator oscillation frequency to repair the 'sliding codes' or increasing a buffer area to increase the time of overflow caused by the sliding codes, but each mode has respective advantages and disadvantages, for example, some modes cause the frequency oscillation fluctuation to be increased, and some modes cause the communication delay to be increased. Since the processing method provided by the present invention is particularly sensitive to delay, it is possible to use a method of packetizing one frame of audio data into one ethernet packet, where the delay of decapsulating the ethernet packet is about 2 frames of data 2 × 1/48000 ═ 40us, where no buffer for audio data is provided in the receiving device. Under the condition of no buffer area, the probability of occurrence of the sliding code is increased, but the influence on the sound quality is very small when the sliding code occurs, and if the crystal oscillator of the receiving equipment is faster than that of the sending end, and the receiving equipment and the like are not as much as the audio signal of the sending equipment, the receiving equipment rebroadcasts the previous audio signal; if the clock of the receiving device is slower than the transmitting device, an audio signal received by the receiving device from the transmitting device at the time of the sliding code occurrence may have been overwritten without being used.

In an optional scheme, the FPGA may transmit the converted audio data to the ethernet protocol processing unit, and the ethernet protocol processing unit may package each frame of audio data output by the FPGA according to a MAC layer protocol, package a MAC address of the EA8 in each audio data packet, and transmit each packaged audio data packet to the EA8 through an ethernet cable, thereby implementing MAC layer processing on the audio data.

Through the steps S1042 to S1046, the sending device may perform analog-to-digital conversion on the first audio signal to obtain a second audio signal, perform format conversion on the first audio signal according to a preset format to obtain audio data, and process the audio data according to a preset protocol to obtain an audio data packet, thereby implementing conversion of an analog audio signal into a digital audio signal, and process the digital audio signal through an MAC layer, and transmit the digital audio signal through an ethernet cable.

Optionally, in the foregoing embodiment of the present invention, after the sending device sends the audio data packet to the receiving device in step S106, the method further includes:

in step S108, the receiving device receives the audio data packet.

Step S110, the receiving device processes the audio data packet to obtain a first audio signal.

In step S112, the receiving apparatus outputs a first audio signal.

In an optional scheme, the EA8 device is responsible for receiving an ethernet packet from the ethernet, and may receive the ethernet packet sent by AE8, and unpack the ethernet packet to obtain an original 8-way analog audio signal, and drive an audio output unit such as a sound box to play an audio signal, so as to transmit the audio signal to a remote audio output unit through a network cable.

Optionally, in the foregoing embodiment of the present invention, in step S110, the processing, by the receiving device, the audio data packet to obtain the first audio signal includes:

step S1102, the receiving device processes the audio data packet according to a preset protocol to obtain audio data.

Step S1104, the receiving device performs format conversion on the audio data according to a preset format to obtain a second audio signal.

In step S1106, the receiving device performs digital-to-analog conversion on the second audio signal to obtain a first audio signal.

It should be noted here that, in the processing of the audio signal, the transmitting device and the receiving device are two devices with mutually reverse processes, and both devices include an analog-to-digital conversion unit, an FPGA, and an ethernet protocol processing unit, in the transmitting device AE8, the flow direction of the audio signal is from the audio source to the ethernet, and in the receiving device EA8, the flow direction of the audio signal is from the ethernet to the audio output unit.

In an optional scheme, after receiving an ethernet data packet from the ethernet, an ethernet protocol processing unit inside the EA8 may unpack according to an MAC layer protocol to obtain audio data, transmit the audio data to the FPGA, the FPGA performs format conversion on the audio data according to I2S parameters to obtain 8channels of digital audio signals, and transmit the 8channels of digital audio signals to the analog-to-digital converter, where the analog-to-digital converter performs digital-to-analog-digital-to-Digital (DA) conversion on the 8channels of digital audio signals after format conversion, converts the digital audio signals into analog audio signals, and obtains the original 8channels of analog audio signals.

Optionally, in the foregoing embodiment of the present invention, before the receiving apparatus outputs the first audio signal in step S112, the method further includes:

in step S114, the receiving device stores the first audio signal in a buffer queue.

Specifically, the buffer queue may be a First-in First-out queue FIFO (abbreviation of First Input First Output).

Step S116, the receiving device sequentially reads the first audio signals from the buffer queue.

In an optional scheme, in order to solve the sliding code problem of two free oscillation crystal oscillators, a FIFO buffer method may also be adopted in the present invention, EA8 may store in a FIFO after unpacking each received ethernet data packet, if the clock cycle of reading the FIFO is slower than the clock cycle of writing, the audio data stored in the FIFO may be accumulated, and when the audio data stored in the FIFO is accumulated to a certain depth, an FPGA inside EA8 may perform a judgment and take a measure of packet loss.

Through the steps S114 to S116, the receiving device stores the first audio signal into the buffer queue, and sequentially reads the first audio signal from the buffer queue, thereby greatly reducing the probability of generating the sliding code.

Optionally, in the embodiment of the present invention, in step S104, when the sending device processes the first audio signal to obtain the audio data packet, the method further includes:

in step S118, the transmitting device receives externally input key state information.

Specifically, the Key state information may be a Key state that a worker inputs whether the test ethernet communication is normal by externally connecting a Key, and the Key is pressed and not pressed corresponding to two states of information, for example, the Key state information corresponding to the Key being pressed is 1, and the Key state information corresponding to the Key not being pressed is 0.

And step S120, the sending equipment drives the LED lamp of the sending equipment to display according to the key state information.

Step S122, the sending device processes the first audio signal and the key status information to obtain an audio data packet, where the audio data packet further includes: key press status information.

In an alternative scheme, at the same time of transmitting audio data at AE8, the status of the key is sampled and the LED lamp of AE8 is driven to display (pressed to be on and not pressed to be off), and the current LED status data is packaged into an ethernet packet and transmitted to EA8 together with the audio signal through the ethernet.

step S124, the receiving device processes the audio data packet according to a preset protocol, so as to obtain the key status information.

And step S126, the receiving equipment drives the LED lamp of the receiving equipment to display according to the key state information.

In an alternative scheme, the EA8 receives the ethernet data packet and also receives the key status information of the AE8, and after the EA8 unpacks the ethernet data packet to obtain the key status information, the EA8 may drive an LED lamp to display (pressed to be on, not pressed to be off) by using the case status information.

It should be noted here that if AE8/EA8 ethernet communication is normal, when the Key button is pressed, the LED lamps of AE8 and EA8 are simultaneously turned on, and when the Key button is released, the LED lamps of AE8 and EA8 are simultaneously turned off, so that the on-off state of the ethernet between AE8 and EA8 can be judged by pressing the Key button and observing whether the display of the LED lamp of EA8 changes.

Through the steps S120 to S126, the sending device receives the key state information input from the outside, drives the LED lamp of the sending device to display according to the key state information, and processes the first audio signal and the key state information to obtain an audio data packet; the receiving equipment processes the audio data packet according to a preset protocol to obtain the key state information, and drives the LED lamp of the receiving equipment to display according to the key state information, so that whether Ethernet communication between the sending equipment and the receiving equipment is normal or not is tested, and the accuracy and the effectiveness of audio signal processing are improved.

It should be further noted here that, 8channels of analog audio signals are transmitted to the receiving device through the transmitting device via the ethernet, and are restored to 8channels of analog audio signals, and in the whole processing process, there is a total delay of about 0.57ms, which is mainly generated by the following three aspects:

1. the 8 analog audio signals are converted into 8 digital audio signals by the analog-to-digital conversion unit of AE8, as shown in table 1 below, in the above embodiment of the present invention, the sampling frequency FS is 48KHz, and the Total Delay is 12 ÷ (48 × 1000) s ═ 0.25 ms.

2. EA8 receives ethernet packets from ethernet and converts the 8-channel digital audio signals into 8-channel analog audio signals through the analog-to-digital conversion unit, as shown in table 2 below, in the above embodiment of the present invention, the sampling frequency FS is 48KHz, and the Total Delay is 10.4 ÷ (48 × 1000) s ═ 0.22 ms.

3. AE8 packs digital audio signals, EA8 unpacks Ethernet data packets, and EA8 stores analog audio signals after analog-to-digital conversion into FIFO buffer, so that a time delay of about 0.1ms is generated.

TABLE 1

TABLE 2

As can be seen from the above, compared with the existing solution of transmitting audio over ethernet, the solution provided by the above embodiments of the present application can reduce the processing delay of the audio signal.

Example 2

According to an embodiment of the present invention, an embodiment of an apparatus for processing an audio signal is provided.

Fig. 2 is a schematic diagram of an audio signal processing apparatus according to an embodiment of the present invention, as shown in fig. 2, the apparatus including:

the obtaining module 21 is configured to obtain a first audio signal by a sending device, where the first audio signal is an audio signal to be transmitted and is acquired from an audio source.

A processing module 23, configured to process, by a sending device, the first audio signal to obtain an audio data packet, where the audio data packet at least includes: the first audio signal and a physical address of the receiving device.

And a sending module 25, configured to send the audio data packet to the receiving device by the sending device.

Specifically, the receiving device may be an EA8 (abbreviated as Ethernet to Audio 8 channels) that receives an Audio packet sent by AE8 through Ethernet, AE8 and EA8 are both ends of Ethernet communication, and may be connected through a network cable, and the receiving device also operates in the MAC layer.

Through the embodiment of the invention, the sending equipment acquires the first audio signal, processes the first audio signal to obtain the audio data packet, and sends the audio data packet to the receiving equipment, so that the purpose of processing and transmitting the audio signal is realized. It is easy to notice that the audio data packet contains the physical address of the receiving device, i.e. the sending device and the receiving device operate in the MAC layer, and can be plug-and-play without IP addresses, thereby solving the technical problems that the processing method of the audio signal in the prior art is complex in configuration and cannot be plug-and-play. Therefore, through the scheme provided by the embodiment of the invention, the effect that the use habit is similar to that of an analog line and the effect of plug and play can be achieved.

Example 3

According to an embodiment of the invention, an embodiment of a system for processing an audio signal is provided.

Fig. 3 is a schematic diagram of an audio signal processing system according to an embodiment of the present invention, as shown in fig. 3, the system including:

the audio source 31 is configured to acquire a first audio signal to be transmitted.

Specifically, the audio source may be an 8-channel analog audio source, and output an 8-channel analog audio signal; the first audio signal described above may be an 8-way analog audio signal.

A sending device 33, connected to the audio source, for processing the first audio signal to obtain an audio data packet, where the audio data packet at least includes: the first audio signal and a physical address of the receiving device.

Specifically, the sending device may be a device AE8 (abbreviation of Audio to Ethernet 8 channels) that outputs the Audio signal through the Ethernet, and the physical address may be a MAC address of the receiving device, that is, the sending device operates in the MAC layer.

The receiving device 35 is connected to the sending device through a network cable, and is configured to receive the audio data packet.

In an alternative scheme, taking a concert scene as an example, the voice sent by the singer can be collected by a microphone, and 8 paths of analog audio signals are output to AE8, AE8 is responsible for packaging the 8 paths of analog audio signals into ethernet packets (i.e. the above audio packets), and the ethernet packets are transmitted to EA8 at a remote end through a network cable, and EA8 can receive the ethernet packets from the ethernet. Specifically, after the AE8 acquires the 8channels of analog audio signals, the 8channels of analog audio signals may be packed according to the MAC address of the EA8, so as to implement data processing of the MAC layer of the sending device, and obtain an audio data packet that is finally sent to the receiving device.

According to the embodiment of the invention, the sending equipment acquires the first audio signal, processes the first audio signal to obtain the audio data packet, and sends the audio data packet to the receiving equipment, so that the purpose of processing and transmitting the audio signal is achieved. It is easy to notice that the audio data packet contains the physical address of the receiving device, i.e. the sending device and the receiving device operate on the MAC layer, and can be plug-and-play without IP addresses, thereby solving the technical problems that the processing method of the audio signal in the prior art is complex in configuration and cannot be plug-and-play. Therefore, through the scheme provided by the embodiment of the invention, the effect that the use habit is similar to that of an analog line and the effect of plug and play can be achieved.

Optionally, in the above embodiment of the present invention, as shown in fig. 4, the sending device 33 includes:

the digital-to-analog converter 331 is configured to perform analog-to-digital conversion on a first audio signal to obtain a second audio signal, where the first audio signal is an audio signal to be transmitted and is acquired from an audio source, the first audio signal is an analog signal, and the second audio signal is a digital signal.

Optionally, in the above embodiment of the present invention, the model of the digital-to-analog converter is CS 5368.

The processor 333 is connected to the digital-to-analog converter, and configured to perform format conversion on the first audio signal according to a preset format to obtain audio data.

Optionally, in the above embodiment of the present invention, the processor is an FPGA.

And the ethernet controller 335 is connected to the processor, and configured to process the audio data according to a preset protocol to obtain an audio data packet, and send the audio data packet.

Optionally, in the above embodiment of the present invention, the model of the ethernet controller is DM 9000.

It should be noted here that AE8 and EA8 are two independent boards, and although they both use a 12.288M crystal oscillator as a clock source of an analog-to-digital conversion unit (AD/DA), the frequencies of the two crystal oscillators may not be identical, and there is a certain difference between them, and the size of the difference depends on the precision of the crystal oscillator, where the precision of the crystal oscillator used in audio is typically several tens of PPM (parts Per Million, abbreviated as Part Per Million). The difference of two crystal oscillator frequencies can cause 'sliding codes' on communication, and the mode for solving the 'sliding codes' generally comprises the steps of controlling the crystal oscillator oscillation frequency to repair the 'sliding codes' or increasing a buffer area to increase the time of overflow caused by the sliding codes, but each mode has respective advantages and disadvantages, for example, some modes cause the frequency oscillation fluctuation to be increased, and some modes cause the communication delay to be increased. Since the processing system provided by the present invention is particularly sensitive to latency, it is possible to use a method of encapsulating a frame of audio data into an ethernet packet, where the delay of decapsulating the ethernet packet is about 2 frames 2 × 1/48000 to 40us, where no buffer for audio data is provided in the receiving device. Under the condition of no buffer area, the probability of occurrence of the sliding code is increased, but the influence on the sound quality is very small when the sliding code occurs, and if the crystal oscillator of the receiving equipment is faster than that of the sending end, and the receiving equipment and the like are not as much as the audio signal of the sending equipment, the receiving equipment rebroadcasts the previous audio signal; if the clock of the receiving device is slower than the transmitting device, an audio signal received by the receiving device from the transmitting device at the time of the sliding code occurrence may have been overwritten without being used.

In an alternative, AE8 is mainly composed of an Audio analog-to-digital conversion unit (i.e., the digital-to-analog converter described above), an FPGA core board (i.e., the processor described above), and an Ethernet protocol processing unit (i.e., the Ethernet controller described above), with Audio signals from an Audio source Audio to Ethernet. The core device of the audio analog-to-digital conversion unit is CS5368, and the audio analog-to-digital conversion unit mainly has the functions of performing AD conversion on 8 paths of input audio sources (analog signals), picking up the analog audio signals and converting the analog audio signals into digital audio signals to an FPGA; the FPGA core board has the main functions of completing the butt joint between digital audio signals output by the CS5368 and Ethernet data packets of the DM9000, managing and configuring the CS5368/DM9000 and the like, a man-machine control interface, a display interface and the like, and is a core unit of the whole project; the main device of the ethernet protocol processing unit is DM9000, which carries the audio data output by the FPGA to the ethernet for transmission, and finally transmits the audio data packet to the EA8 device through the ethernet cable.

Through the scheme, sending equipment can carry out analog-to-digital conversion to first audio signal, obtain second audio signal, according to predetermineeing the format, carry out format conversion to first audio signal, obtain audio data, and according to predetermineeing the agreement, handle audio data, obtain the audio data package, thereby realize converting analog audio signal into digital audio signal, and handle through the MAC layer, transmit through the ethernet net twine, be difficult for receiving the interference in transmission process, use to be accustomed to similar analog line, the configuration is convenient, can plug and play, and reduce the influence of sliding code to audio signal.

Optionally, in the embodiment of the present invention, the receiving device is further configured to process the audio data packet to obtain the first audio signal, and as shown in fig. 4, the system further includes: an audio output unit 41, connected to the receiving device, for outputting the first audio signal.

Optionally, in the above embodiment of the present invention, as shown in fig. 4, the receiving device 35 includes:

and the ethernet controller 335 is configured to process the audio data packet according to a preset protocol to obtain audio data.

And the processor 333 is connected to the ethernet controller, and is configured to perform format conversion on the audio data according to a preset format to obtain a second audio signal.

The digital-to-analog converter 331 is connected to the processor, and configured to perform digital-to-analog conversion on the second audio signal to obtain a first audio signal.

Optionally, in the above embodiment of the present invention, the model of the digital-to-analog converter is CS 4382.

In an alternative, EA8 is mainly composed of an Ethernet protocol processing unit (i.e. the Ethernet controller mentioned above), an FPGA core board (i.e. the processor mentioned above) and an Audio analog-to-digital conversion unit (i.e. the digital-to-analog converter mentioned above), and the Audio signal flows in the opposite direction from AE8, from Ethernet to Audio source Audio. The main device of the Ethernet protocol processing unit is DM9000, and the part receives a voice data packet from the Ethernet and transmits the voice data packet to the FPGA for processing; the FPGA core board has the main functions of completing the butt joint between the Ethernet data packet of DM9000 and the CS4382, managing and configuring CS4382/DM9000 and the like, a man-machine control interface, a display interface and the like, and is a core unit of the whole project; the core device of the audio digital-to-analog conversion unit is CS4382, which mainly functions to convert 8-channel digital audio signals into analog signals through DA (digital-to-analog) for driving the sound production unit to output audio.

In another optional scheme, in order to solve the problem of sliding codes of two free oscillation oscillators, a method of using FIFO buffer may be further adopted in the present invention, EA8 may be stored in FIFO after unpacking each received ethernet data packet, if the clock cycle of reading FIFO is slower than the clock cycle of writing, the audio data stored in FIFO may be accumulated, and when the audio data stored in FIFO is accumulated to a certain depth, FPGA inside EA8 may perform judgment and take a measure of packet loss.

Through the scheme, the receiving device stores the first audio signal into the buffer queue and reads the first audio signal from the buffer queue in sequence, so that the probability of generating the sliding code is greatly reduced.

Optionally, in the above embodiment of the present invention, as shown in fig. 5, the processor 333 includes:

a first interface 51, a first end of which is connected to the digital-to-analog converter 331.

Specifically, the first interface may be an I2S interface (AE8/EA8) of the FPGA, and the I2S interface (AE8/EA8) supports 8 analog-to-digital or digital-to-analog conversion (the number of supported paths depends on the specification of the AD/DA chip).

The first processing unit 53 is connected to the second end of the first interface.

Specifically, the first processing unit may be a processing unit inside an FPGA.

Two second interfaces 55, a first end of each second interface being connected to the processing unit and a second end of each second interface being connected to the ethernet controller 335.

Specifically, the two second interfaces may be ethernet interfaces Eth _0 and Eth _ 1.

In an optional scheme, for AE8, the I2S interface receives audio data transmitted by CS5368, and outputs the audio data from ethernet interfaces Eth0 and Eth1 to an ethernet protocol processing unit through an internal bus, so as to implement a function of sending local I2S audio data to an ethernet; for EA8, data received from ethernet interface Eth0 or Eth1 may be sent to CS4382 audio DA chip on board through the I2S interface, and CS4382 performs digital-to-analog conversion to drive the audio output unit, thereby implementing the function of receiving audio data from ethernet.

It should be noted here that, in the above embodiment of the present invention, two ethernet interfaces Eth _0 and Eth _1 are provided, and for AE8, both ethernet interfaces output the audio data of CS5368, so the content of the audio data output by both ethernet interfaces is the same, and the benefit of AE8 maintaining both ethernet interfaces is that: firstly, one Ethernet interface can be used as a main audio output port to drive a sound box, and the other Ethernet interface can copy audio data to a monitoring room, so that the monitoring room can monitor in real time; in addition, AE8 will have the capability of carrying up to 256 audio in the future and will be implemented with only one cable tandem speaker interface, at which time an open circuit at any node in the tandem will result in no data being received by the following speakers; in order to solve the problem, two network ports reserved by AE8 are output, so that a bidirectional backup ring can be formed during networking, the two ports are backup for each other, and as long as the two rings do not simultaneously fail on an intermediate node, sound data can be successfully transmitted, thereby providing a guarantee for the robustness of the system. In the current test of AE8/EA8, two ethernet interfaces of AE8 output audio at the same time, two ethernet ports of EA8 receive audio data at the same time, and if AE8/EA8 are linked by two network cables, audio transmission is not affected when any one ethernet cable fails or is pulled out, and the system can be automatically switched to another normal network port. Therefore, AE8 has two roles in outputting duplicate audio through two ports: monitoring and backing up; the EA8 can receive two sound source data through two network ports, and can achieve the purpose of redundant backup, thereby the robustness of the whole system is stronger, and the EA8 can be controlled through a control command, so that one path of audio is selected to be output to the DA.

It should be further noted that, in the above embodiment of the present invention, the priority of the ethernet interface Eth0 is higher than that of the ethernet interface Eth1, that is, if both the ethernet interfaces Eth0 and Eth1 have normal data streams, the EA8 selects to obtain audio data from the ethernet interface Eth0, and only when the ethernet interface Eth0 fails and does not have normal audio streams, the EA8 will switch to the ethernet interface Eth1 to obtain audio data from the ethernet interface Eth 1.

Optionally, in the above embodiment of the present invention, as shown in fig. 5, the processor 333 further includes:

and a third interface 57 connected to the first processing unit 53, for receiving externally input key status information and driving the LED lamp to display the information.

Specifically, the third interface may be various signal interfaces such as a clock, a reset, a key, an LED display, and the like, where the part of the interface mainly provides a clock and a reset signal for the FPGA, and the key and the LED display provide convenience for the state test of the system, for example, in the communication process of AE8 and EA8, by pressing a test key on AE8, it can be quickly determined whether the ethernet communication is normal by observing whether the LED0 of EA8 is turned on; the Key state information may be a Key state that a worker inputs through an external Key to test whether ethernet communication is normal, and the Key state information corresponds to two states of being pressed and not pressed, for example, the Key state information corresponding to the Key being pressed is 1, and the Key state information corresponding to the Key not being pressed is 0.

The two second interfaces 55 are also used for outputting key status information.

In an alternative scheme, at the same time of transmitting audio data at AE8, the status of the key is sampled and the LED lamp of AE8 is driven to display (pressed to be on and not pressed to be off), and the current LED status data is packaged into an ethernet packet and transmitted to EA8 together with the audio signal through the ethernet. The EA8 receives the ethernet packet and also the key status information of the AE8, and after the EA8 unpacks the ethernet packet to obtain the key status information, the EA8 may drive the LED lamp to display (on when pressed, not off when pressed) by using the case status information.

It should be noted here that if AE8/EA8 ethernet communication is normal, when the Key button is pressed, the LED lamps of AE8 and EA8 are turned on at the same time, and when the Key button is released, the LED lamps of AE8 and EA8 are turned off at the same time, so that the on-off state of the ethernet between AE8 and EA8 can be determined by pressing the Key button and observing whether the display of the LED lamp of EA8 changes.

In the mode, the sending equipment receives the key state information input from the outside, drives the LED lamp of the sending equipment to display according to the key state information, and processes the first audio signal and the key state information to obtain an audio data packet; the receiving equipment processes the audio data packet according to a preset protocol to obtain the key state information, and drives the LED lamp of the receiving equipment to display according to the key state information, so that whether Ethernet communication between the sending equipment and the receiving equipment is normal or not is tested, and the accuracy and effectiveness of audio signal processing are improved.

a fourth interface 59, a first end of which is connected to the controller 511, and a second end of which is connected to the first processing unit 53, for receiving the control parameters output by the controller, where the control parameters at least include: the transmission form of the physical address is one of the following: unicast format and broadcast format.

Specifically, the Controller may be a microcontroller MCU (Micro Controller Unit), the fourth interface may be an MCU _ SPI interface, and in the design of the FPGA, an SPI interface communicating with the MCU is reserved, at present, the single chip may read information such as a version number of the FPGA through the SPI interface, and may also read audio data received by the FPGA through the SPI interface, and analyze the data to drive the channel to display the LED. In addition, the single chip microcomputer controls the working state of the FPGA through the SPI, and parameters which can be controlled at present are 1: and when the FPGA is controlled to send the data packet, the destination MAC address is sent in a unicast mode or in a broadcast mode. 2: and controlling whether the FPGA adopts a buffer switching algorithm (namely whether the receiving equipment adopts a FIFO buffer method). Further, the encryption function of the FPGA can be realized by reserving the SPI.

It should be noted here that in a scenario where AE8 interfaces only with EA8, all AEs 8 may share one MAC address, all EAs 8 may share another MAC address, and as long as AE8 and EA8 have different MAC addresses, it is ensured that MAC addresses of both parties of communication are different, thereby avoiding MAC collision. Therefore, the setting of AE8 or EA8 can be adopted by the dial switch, so that respective MAC addresses are selected, and AE8 and EA8 both know the MAC address of the other party, thereby avoiding the process of acquiring MAC through a complex protocol before communication and realizing the function of plug and play.

However, in order to be compatible with future loudspeaker concatenation, in a scene where EA8 is connected with EA8 in series, that is, EA8 is no longer connected with AE8 only, EA8 may be connected with EA 8. In this case, if all EA8 still share a MAC address, concatenation of two EAs 8 results in MAC collisions. If each EA8 is assigned with a different MAC address, the two parties connected in series need to obtain the MAC address of the other party by means of ARP protocol or the like before communication, which inevitably leads to complication of the whole system, greatly increases communication delay, and deteriorates plug and play experience. To simplify this problem, EA8 may use the broadcast packet to deliver audio data, and the use of the broadcast packet eliminates the need to obtain the MAC address of the opposite party, so that data communication can be established immediately, thereby achieving plug and play.

Optionally, in the foregoing embodiment of the present invention, as shown in fig. 4, the ethernet controller 335 includes:

the second processing unit 3351 is configured to process the audio data to obtain an audio data packet, or process the audio data packet to obtain the audio data.

Specifically, the second processing unit may be a processing unit in an ethernet protocol processing unit.

And a fifth interface 3353 connected to the second processing unit, for outputting the audio data packet or receiving the audio data packet.

Optionally, in the above embodiment of the present invention, the fifth interface is an RJ45 interface carrying a transformer.

In an alternative scheme, the ethernet protocol processing unit may be composed of a DM9000 and an RJ45 interface with a transformer, audio data output by the FPGA may be carried on the ethernet for transmission through a processing unit in the ethernet protocol processing unit, and finally, the RJ45 interface transmits the audio data packet to the EA8 device through an ethernet cable, and the EA8 device may receive the audio data packet through an RJ45 interface and unpack the audio data packet into audio data through a processing unit in the ethernet protocol processing unit for transmission to the PFGA.

A preferred embodiment of the present invention will be described in detail with reference to fig. 6 to 12.

As shown in fig. 6, the audio signal processing system may include 8 analog audio sources, AE8, EA8 and 8 speakers, AE8 and EA8 are two ends of ethernet communication, where AE8 is responsible for converting the 8 analog audio signals into digital signals, packaging the digital signals into ethernet packets, and transmitting the ethernet packets to remote EA8 through ethernet interface RJ45 and network cable, and EA8 is responsible for receiving the ethernet packets from the ethernet, unpacking the ethernet packets, and transmitting the unpacked ethernet packets to digital-to-analog conversion module CS4382 to convert the analog audio signals into original audio signals. AE8 is mainly composed of: the Audio analog-to-digital conversion unit comprises an FPGA core board and an Ethernet protocol processing unit, wherein Audio data of AE8 are from Audio to Ethernet, a core device of the Audio analog-to-digital conversion unit is CS5368, and the Audio analog-to-digital conversion unit mainly has the functions of performing AD conversion on 8 paths of input Audio sources (analog signals), picking up the analog Audio signals and converting the analog Audio signals into digital Audio signals to the FPGA, the current digital signals adopt an interface standard of an I2S format, and the current I2S parameters are as follows: a sampling rate of 48KHz, a sampling accuracy of 24 bits; the FPGA core board has the main functions of completing the butt joint between digital audio signals output by the CS5368 and Ethernet data packets of the DM9000, managing and configuring the CS5368/DM9000 and the like, a man-machine control interface, a display interface and the like, and is a core unit of the whole project; the main devices of the ethernet protocol processing unit are DM9000 and an RJ45 interface with a transformer, which carries the voice data packets output by the FPGA onto the ethernet for transmission, and finally transmits the audio signals from the RJ45 interface to the EA8 device through the ethernet cable. EA8 is mainly composed of: the device comprises an Ethernet protocol processing unit, an FPGA core board and an Audio digital-to-analog conversion unit, wherein the Audio data flow direction of EA8 is opposite to that of AE8, AE8 flows from Audio to Ethernet, EA8 flows from Ethernet to Audio, the main components of the Ethernet protocol processing unit are DM9000 and an RJ45 interface with a transformer. The part receives a voice data packet from the Ethernet and transmits the voice data packet to the FPGA for processing; the FPGA core board has the main functions of completing the butt joint between the Ethernet data packet of DM9000 and the CS4382, managing and configuring CS4382/DM9000 and the like, a man-machine control interface, a display interface and the like, and is a core unit of the whole project; the core device of the audio digital-to-analog conversion unit is CS4382, which mainly functions to convert 8-channel digital audio signals into analog signals through DA, so as to drive the sound generation unit to output audio.

As shown in fig. 7, the external interface of the FPGA is mainly composed of the following 5 parts: the interface mainly provides a clock and a reset signal for the FPGA, and the key and the LED display provide convenience for the state test of the system, for example, in the communication process of AE8 and EA8, whether the LED lamp of EA8 is lighted or not can be quickly judged by pressing the test key on AE8 to judge whether the Ethernet communication is normal or not; an I2S interface (AE8/EA8), for AE8, the I2S interface receives audio data from CS5368(CS5368 is an AD conversion chip), and outputs the audio data from ethernet Eth0 and Eth1 through an internal bus, so as to implement a function of sending local I2S audio data to ethernet; for the EA8, data received from Eth0 or Eth1 is sent to the CS4382 audio DA chip on the board through the I2S interface, and the CS4382 performs digital-to-analog conversion to drive the generation unit, thereby implementing the function of receiving audio data from the ethernet. The I2S interface (AE8/EA8) supports 8 paths of analog-to-digital or digital-to-analog conversion (the number of supported paths depends on the specification of an AD/DA chip); an Eth — 0 ethernet interface; eth — 1 ethernet interface, for AE8, Eth1 outputs the same audio data as Eth0, providing listening or backup functionality. For EA8, when Eth0 Ethernet transmission is interrupted, EA8 is automatically switched to Eth1, and audio data are received from Eth1, so that redundancy backup of Ethernet is realized, and the robustness of the whole system is improved; the MCU _ SPI interface reserves an SPI port communicating with the MCU in the design of the FPGA, at present, the single chip microcomputer can read information such as the version number of the FPGA through the SPI port, can also read audio data received by the FPGA through the SPI port, and analyzes the data to drive a channel to display the LED. In addition, the single chip microcomputer also controls the working state of the FPGA through the SPI, and parameters which can be controlled at present are as follows, 1: when the FPGA sends the data packet, the destination MAC address is sent in a unicast mode or in a broadcast mode. 2: and controlling whether the FPGA adopts a buffer switching algorithm, and further realizing the encryption function of the FPGA.

As shown in fig. 8, the various signal interfaces of the clock, reset, key, LED display, etc. include the following interface signals: OSC _ 50M' 50M clock of external crystal oscillator; emclk: the clock output by the FPGA to the DM9000, and the DM9000 uses a single 25M crystal oscillator at present and does not use the signal; cpu _ rstn: an externally input reset signal for resetting the entire logic; keys: the Key inputs signals, at present, Key [0] is used for resetting the demo board, Key [1] is used for testing whether Ethernet communication is normal; LED: the LED lamp is matched with a Key Key and used for testing whether Ethernet communication is normal or not; seg: the drive pin of seven-segment digital tube is not used at present.

As shown in FIG. 9, the I2S interface (AE8/EA8) includes the following interface signals: ctl _ cs1, ctl _ clk, ctl _ mosi, ctl _ miso: the four signals are SPI ports configured by the CPU of CS5368/4382 and can also be used as I2C ports configured by the CPU, and the CS5368/4382 works in a hard configuration mode at present; osc _12m 288: the clock input of an external 12.288MHz crystal oscillator, AE8/EA8 in the embodiment of the invention works in a common mode (non-USB mode) with 48KHz utilization rate, so the required crystal oscillator is as follows: 48K 256 ═ 12.288M; i2s _ sclk: in order to support multiple channels, all the AD/DA work in a slave mode, that is, the AD/DA fetches a bit clock from the outside, so that an FPGA is required to output a bit clock, and the FPGA outputs the bit clock to ensure synchronization of clocks of multiple modules; i2s _ lrck: I2S left and right channel selection clocks, in the above embodiment of the present invention, any one I2S data line is data of 2 channels (or one stereo data) transferred, and whether the left channel or the right channel is represented by the level of I2s _ lrck; the i2s _ lrck is output by the FPGA as the i2s _ sclk, so that a plurality of AD/DA can be synchronized; i2s _ inout 1: this is the data signal of I2S, which is input if AE8, and output if EA8, each I2s _ inout passes 2 channels of audio data, so that only 4I 2s _ inout, I2s _ inout1, I2s _ inout2, I2s _ inout3, and I2s _ inout4, are needed for the audio data of 8 channels.

As shown in fig. 10, the ethernet interface Eth _0 may include the following interface signals: eth _0 is a main Ethernet interface, and on AE8, the FPGA sends audio data to DM9000 through the interface, and finally sends out data packets through RJ 45; for EA8, the FPGA receives audio data from the interface, which is ultimately sent to the DA chip. dm9000_ int: the interrupt signal of DM9000 for EA8, whenever a new packet is received, informs the FPGA of the arrival of the new packet by pulling up the signal, and after the packet is taken by the FPGA, clears the signal through a register. For AE8, the signal is not pulled high (since AE8 has no packets to receive) so no processing is required; dm9000_ rst _ n: a reset signal of DM9000, which is pulled down to reset DM 9000; dm9000_ cs _ n: the chip select signal of DM9000, by pulling down the signal to select DM 9000; dm9000_ cmd _ n: since DM9000 has no address signal, and is actually address and data multiplexed, a signal is needed to identify whether it is data or address at a time. The DM9000 is identified by the signal; dm9000_ rd _ n: a read enable signal of DM 9000; dm9000_ wr _ n: write enable signal of DM 9000; dm9000_ data: data signal of DM9000, which is a multiplex signal, the first multiplex being a multiplex of address and data and identifying whether it is address or data by DM9000_ cmd _ n; the other multiplexing is input and output multiplexing, and write data and read data of the DM9000 are transmitted by the signal.

As shown in fig. 11, the ethernet interface Eth _1 may include the following interface signals: eth _1 is an ethernet backup interface, and at AE8, the FPGA sends audio data to Eth0 and copies a copy of the audio data to the interface, so that audio monitoring or redundant backup can be implemented; for EA8, when eth0 is disconnected, the FPGA automatically switches to the interface to receive audio data, thereby realizing the backup function of audio input. The interface signal of eth1 is the same as eth0 in function, specifically as follows: enetc _ int: the interrupt signal of DM9000 for EA8, whenever a new packet is received, informs the FPGA of the arrival of the new packet by pulling up the signal, and after the packet is taken by the FPGA, clears the signal through a register. For AE8, the signal is not pulled high (since AE8 has no packets to receive) so no processing is required. enetc _ rst _ n: a reset signal of DM9000, which is pulled down to reset DM 9000; enetc _ cs _ n: the chip select signal of DM9000, by pulling down the signal to select DM 9000; enetc _ cmd _ n: since the DM9000 has no address signal, and actually the address and the data are multiplexed, a signal is required to identify whether the data or the address is present at a glance. The DM9000 is identified by the signal; enetc _ rd _ n: a read enable signal of DM 9000; enetc _ wr _ n: write enable signal of DM 9000; enetc _ data: DM9000, which is a multiplexed signal, the first multiplexing is the multiplexing of address and data. And identifies whether it is an address or data by dm9000_ cmd _ n; the other multiplexing is input and output multiplexing, and the write data and the read data of the DM9000 are transmitted by the signal.

As shown in fig. 12, the mcu _ spi interface may include the following interface signals: the interface is a communication interface between the FPGA and the singlechip mcu. The current communication mode is that the MCU is a master device and the FPGA is a slave device. In addition, the MCU can read the current audio data of each channel through the interface, so that the amplitude of the signal level can be judged and then the LED level indicator lamps of each channel are driven to display. spi3_ cs: the chip selection signal of the SPI is driven by a main device MCU; spi3_ sclk: the clock signal of the SPI is driven by the MCU; spi3_ mosi: a master output slave input signal of the SPI is driven by a main equipment MCU; spi3_ miso: the master input slave output signal of the SPI is driven by the FPGA of the main equipment.

It should be further noted here that, the 8 paths of analog audio signals are transmitted to the receiving device through the sending device via the ethernet, and are restored to the 8 paths of analog audio signals, and in the whole processing process, there is a total delay of about 0.57ms, which is mainly generated by the following three aspects:

1. as shown in table 1, in the above embodiment of the present invention, the sampling frequency FS is 48KHz, and the Total Delay is 12 ÷ (48 × 1000) s ÷ 0.25 ms.

2. EA8 receives ethernet packets from the ethernet, and converts the 8-channel digital audio signals into 8-channel analog audio signals through the analog-to-digital conversion unit, as shown in table 2, in the above embodiment of the present invention, the sampling frequency FS is 48KHz, and the Total Delay is 10.4 ÷ (48 × 1000) s ═ 0.22 ms.

3. AE8 packs digital audio signals, EA8 unpacks Ethernet data packets, and EA8 stores analog audio signals after analog-to-digital conversion in FIFO buffer, resulting in a delay of about 0.1 ms.

As can be seen from the above, compared with the existing solution of transmitting audio over ethernet, the scheme provided by the above embodiments of the present application can reduce the processing delay of the audio signal.

Example 4

According to an embodiment of the present invention, there is provided an embodiment of an apparatus for transmitting an audio signal.

Fig. 13 is a schematic diagram of a transmitting apparatus of an audio signal according to an embodiment of the present invention, as shown in fig. 13, the transmitting apparatus including:

the digital-to-analog converter 131 is connected to the audio source and configured to perform analog-to-digital conversion on the acquired first audio signal to obtain a second audio signal, where the first audio signal is an audio signal to be transmitted and acquired from the audio source, the first audio signal is an analog signal, and the second audio signal is a digital signal.

The processor 133 is connected to the digital-to-analog converter, and configured to perform format conversion on the first audio signal according to a preset format to obtain audio data.

And the ethernet controller 135 is connected to the processor and the receiving device, respectively, and is configured to process the audio data according to a preset protocol to obtain an audio data packet, and send the audio data packet.

Optionally, in the foregoing embodiment of the present invention, the model of the ethernet controller is DM 9000.

Specifically, since the audio data packet includes the MAC address of the receiving device, the preset protocol may be a MAC layer protocol.

It should be noted here that AE8 and EA8 are two independent boards, and although they both use a 12.288M crystal oscillator as a clock source of an analog-to-digital conversion unit (AD/DA), the frequencies of the two crystal oscillators may not be completely the same, and there must be a certain difference between them, the size of the difference depends on the precision of the crystal oscillator, where the precision of the crystal oscillator used in audio frequency is typically several tens of PPM (parts Per Million, abbreviated by Part Per Million). The difference of two crystal oscillator frequencies can cause 'sliding codes' on communication, and the mode for solving the 'sliding codes' generally comprises the steps of controlling the crystal oscillator oscillation frequency to repair the 'sliding codes' or increasing a buffer area to increase the time of overflow caused by the sliding codes, but each mode has respective advantages and disadvantages, for example, some modes cause the frequency oscillation fluctuation to be increased, and some modes cause the communication delay to be increased. Since the processing system provided by the present invention is particularly sensitive to delay, it is possible to use a method of packetizing a frame of audio data into an ethernet packet, where the delay of decapsulating the ethernet packet is about 2 frames of data 2 × 1/48000-40 us, where no buffer for audio data is provided in the receiving device. Under the condition of no buffer area, the probability of occurrence of the sliding code is increased, but the influence on the sound quality is very small when the sliding code occurs, if the crystal oscillator of the receiving equipment is faster than that of the sending end, and the receiving equipment and the like are not as late as the audio signal of the sending equipment, the receiving equipment replays the previous audio signal; if the clock of the receiving device is slower than the transmitting device, an audio signal received by the receiving device from the transmitting device at the time of the sliding code occurrence may have been overwritten without being used.

In an alternative, AE8 is mainly composed of an Audio analog-to-digital conversion unit (i.e., the digital-to-analog converter described above), an FPGA core board (i.e., the processor described above), and an Ethernet protocol processing unit (i.e., the Ethernet controller described above), with Audio signals from an Audio source Audio to Ethernet. The core device of the audio analog-to-digital conversion unit is CS5368, which mainly has the functions of performing AD conversion on 8 paths of input audio sources (analog signals), picking up the analog audio signals and converting the analog audio signals into digital audio signals to the FPGA; the FPGA core board has the main functions of completing the butt joint between the digital audio signals output by the CS5368 and Ethernet data packets of the DM9000, managing and configuring the CS5368/DM9000 and the like, a man-machine control interface, a display interface and the like, and is a core unit of the whole project; the main device of the ethernet protocol processing unit is DM9000, which carries the audio data output by the FPGA to the ethernet for transmission, and finally transmits the audio data packet to the EA8 device through the ethernet cable.

According to the embodiment of the invention, the digital-to-analog converter performs analog-to-digital conversion on the acquired first audio signal to obtain the second audio signal, the processor performs format conversion on the first audio signal according to the preset format to obtain the audio data, the ethernet controller processes the audio data according to the preset protocol to obtain the audio data packet, and the audio data packet is sent, so that the purposes of processing and transmitting the audio signal are achieved. It is easy to notice that the analog-to-digital converter converts the first audio signal into the second audio signal, so as to convert the analog audio signal into the digital audio signal, and the digital audio signal is not easily interfered in the transmission process, and the audio data packet contains the physical address of the receiving device, i.e. the sending device and the receiving device operate on the MAC layer, and do not need the IP address, and can be used in plug and play, thereby solving the technical problems that the audio signal processing method in the prior art is complex in configuration and cannot be used in plug and play. Therefore, through the scheme provided by the embodiment of the invention, the effects that the use habit is similar to that of an analog line, the configuration is convenient, the sliding code can be used in a plug-and-play mode, and the influence of the sliding code on the audio signal is reduced can be achieved.

Example 5

According to an embodiment of the invention, an embodiment of a receiving device for an audio signal is provided.

Fig. 14 is a schematic diagram of a receiving apparatus of an audio signal according to an embodiment of the present invention, as shown in fig. 14, the receiving apparatus including:

the ethernet controller 141 is connected to the sending device, and is configured to process the received audio data packet according to a preset protocol to obtain audio data.

It should be noted here that AE8 and EA8 are two independent boards, and although they both use a crystal oscillator of 12.288MHz as a clock source of an analog-to-digital conversion unit (AD/DA), the frequencies of the two crystal oscillators may not be identical, and there is a certain difference between them, and the size of the difference depends on the precision of the crystal oscillator, where the precision of the crystal oscillator used in audio is typically several tens of PPM (parts Per Million, abbreviated as Part Per Million). The difference of the two crystal oscillator frequencies can cause 'sliding codes' on communication, and the mode for solving the 'sliding codes' generally comprises the steps of controlling the crystal oscillator oscillation frequency so as to repair the 'sliding codes' or increasing a buffer area so as to increase the time of overflow caused by the sliding codes, but each mode has respective advantages and disadvantages, for example, some modes cause the frequency oscillation fluctuation to be increased, and some modes cause the communication delay to be increased. Since the processing system provided by the present invention is particularly sensitive to delay, it is possible to use a method of packetizing a frame of audio data into an ethernet packet, where the delay of decapsulating the ethernet packet is about 2 frames of data 2 × 1/48000-40 us, where no buffer for audio data is provided in the receiving device. Under the condition of no buffer area, the probability of occurrence of the sliding code is increased, but the influence on the sound quality is very small when the sliding code occurs, and if the crystal oscillator of the receiving equipment is faster than that of the sending end, and the receiving equipment and the like are not as much as the audio signal of the sending equipment, the receiving equipment rebroadcasts the previous audio signal; if the clock of the receiving device is slower than the transmitting device, an audio signal received by the receiving device from the transmitting device at the time of the sliding code occurrence may have been overwritten without being used.

The processor 143 is connected to the ethernet controller, and configured to perform format conversion on the audio data according to a preset format to obtain a second audio signal.

Specifically, the preset format may be an I2S format (Inter-IC Sound, audio built in an integrated circuit), which is a transmission standard established for audio data transmission between digital audio devices, and in the embodiment of the present invention, the I2S parameters are: a sampling rate of 48KHz and a sampling accuracy of 24 bits are exemplified for explanation.

And the digital-to-analog converter 145 is respectively connected with the processor and the audio output unit, and is configured to perform digital-to-analog conversion on the second audio signal to obtain a first audio signal, and output the first audio signal, where the first audio signal is an analog signal and the second audio signal is a digital signal.

In an alternative, EA8 is mainly composed of an Ethernet protocol processing unit (i.e. the above-mentioned Ethernet controller), an FPGA core board (i.e. the above-mentioned processor) and an Audio analog-to-digital conversion unit (i.e. the above-mentioned digital-to-analog converter), and the Audio signal flows in the opposite direction from AE8 from Ethernet to Audio source Audio. The main device of the Ethernet protocol processing unit is DM9000, and the part receives a voice data packet from the Ethernet and transmits the voice data packet to the FPGA for processing; the FPGA core board has the main functions of completing the butt joint between the Ethernet data packet of DM9000 and the CS4382, managing and configuring CS4382/DM9000 and the like, a man-machine control interface, a display interface and the like, and is a core unit of the whole project; the core device of the audio digital-to-analog conversion unit is CS4382, which mainly functions to convert 8-channel digital audio signals into analog signals through DA (digital-to-analog) for driving the sound production unit to output audio.

It should be noted here that, in the processing of the audio signal, the sending device and the receiving device are two devices with mutually reversed processes, and both devices include an analog-to-digital conversion unit, an FPGA and an ethernet protocol processing unit, in the sending device AE8, the flow direction of the audio signal is from the audio source to the ethernet, and in the receiving device EA8, the flow direction of the audio signal is from the ethernet to the audio output unit.

According to the embodiment of the invention, the sending equipment acquires the first audio signal, processes the first audio signal to obtain the audio data packet, and sends the audio data packet to the receiving equipment, so that the purpose of processing and transmitting the audio signal is achieved. It is easy to notice that the analog-to-digital converter converts the first audio signal into the second audio signal, so as to convert the analog audio signal into the digital audio signal, and the digital audio signal is not easily interfered in the transmission process, and the audio data packet contains the physical address of the receiving device, i.e. the sending device and the receiving device operate on the MAC layer, and do not need the IP address, and can be used in plug and play, thereby solving the technical problems that the audio signal processing method in the prior art is complex in configuration and cannot be used in plug and play. Therefore, through the scheme provided by the embodiment of the invention, the effects that the use habit is similar to that of an analog line, the configuration is convenient, the sliding code can be used in a plug-and-play mode, and the influence of the sliding code on the audio signal is reduced can be achieved.

Through the above embodiment of the present invention, the ethernet controller processes the received audio data packet according to the preset protocol to obtain the audio data, the processor performs format conversion on the audio data according to the preset format to obtain the second audio signal, the digital-to-analog converter performs digital-to-analog conversion on the second audio signal to obtain the first audio signal, and outputs the first audio signal, thereby achieving the purpose of processing and transmitting the audio signal. It is easy to notice that the analog-to-digital converter converts the first audio signal into the second audio signal, so as to convert the analog audio signal into the digital audio signal, and the digital audio signal is not easily interfered in the transmission process, and the audio data packet contains the physical address of the receiving device, i.e. the sending device and the receiving device operate on the MAC layer, and do not need the IP address, and can be used in plug and play, thereby solving the technical problems that the audio signal processing method in the prior art is complex in configuration and cannot be used in plug and play. Therefore, through the scheme provided by the embodiment of the invention, the effects that the use habit is similar to that of an analog line, the configuration is convenient, the sliding code can be used in a plug-and-play mode, and the influence of the sliding code on the audio signal is reduced can be achieved.

Example 6

According to an embodiment of the present invention, there is provided a storage medium including a stored program, wherein an apparatus in which the storage medium is located is controlled to execute the audio signal processing method according to any one of the above-described embodiments 1 when the program is executed.

Example 7

According to an embodiment of the present invention, there is provided a processor configured to execute a program, where the program executes the method for processing an audio signal according to any one of the above embodiments 1.

The above-mentioned serial numbers of the embodiments of the present invention are only for description, and do not represent the advantages and disadvantages of the embodiments.

In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

In the embodiments provided in the present application, it should be understood that the disclosed technical content can be implemented in other manners. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed coupling or direct coupling or communication connection between each other may be an indirect coupling or communication connection through some interfaces, units or modules, and may be electrical or in other forms.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one position, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims

1. A method of processing an audio signal, comprising:

the method comprises the steps that a sending device obtains a first audio signal, wherein the first audio signal is an audio signal to be transmitted and is collected from an audio source;

the sending device processes the first audio signal to obtain an audio data packet, wherein the audio data packet at least comprises: a physical address of the first audio signal and a receiving device;

the sending equipment sends the audio data packet to the receiving equipment;

the sending device processes the first audio signal to obtain an audio data packet, including:

the sending equipment processes the audio data according to a preset protocol to obtain the audio data packet;

after the sending device sends the audio data packet to the receiving device, the method further comprises: the receiving device receives the audio data packet; the receiving device processes the audio data packet to obtain the first audio signal; the receiving device outputs the first audio signal; the processing, by the receiving device, the audio data packet to obtain the first audio signal includes: the receiving equipment processes the audio data packet according to a preset protocol to obtain audio data; the receiving equipment performs format conversion on the audio data according to a preset format to obtain a second audio signal; the receiving equipment performs digital-to-analog conversion on the second audio signal to obtain the first audio signal; before the receiving device outputs the first audio signal, the method further comprises: the receiving equipment stores the first audio signal into a buffer queue; and the receiving equipment sequentially reads the first audio signals from the buffer queue.

2. The method of claim 1, wherein the sending device processing the first audio signal to obtain an audio data packet comprises:

the sending equipment performs analog-to-digital conversion on the first audio signal to obtain a second audio signal, wherein the first audio signal is an analog signal, and the second audio signal is a digital signal;

and the sending equipment performs format conversion on the first audio signal according to a preset format to obtain audio data.

3. The method according to claim 2, wherein the transmitting device processes the audio data in units of frames.

4. The method according to any one of claims 1 to 3, wherein while the sending device processes the first audio signal to obtain an audio data packet, the method further comprises:

the sending equipment receives key state information input from the outside;

the sending equipment drives an LED lamp of the sending equipment to display according to the key state information;

the sending device processes the first audio signal and the key state information to obtain the audio data packet, wherein the audio data packet further includes: the key state information.

5. The method of claim 4, wherein after the sending device sends the audio data packet to the receiving device, the method further comprises:

the receiving equipment processes the audio data packet according to a preset protocol to obtain the key state information;

and the receiving equipment drives the LED lamp of the receiving equipment to display according to the key state information.

6. An apparatus for processing an audio signal, comprising:

the device comprises an acquisition module, a processing module and a processing module, wherein the acquisition module is used for acquiring a first audio signal, and the first audio signal is an audio signal to be transmitted and is acquired from an audio source;

a processing module, configured to process the first audio signal to obtain an audio data packet, where the audio data packet at least includes: a physical address of the first audio signal and a receiving device;

a sending module, configured to send the audio data packet to the receiving device;

the processing module is used for processing the audio data according to a preset protocol to obtain the audio data packet;

the apparatus is further configured to perform the steps of: after transmitting the audio data packet to the receiving apparatus, the receiving apparatus receives the audio data packet; the receiving device processes the audio data packet to obtain the first audio signal; the receiving device outputs the first audio signal; the receiving device processes the audio data packet to obtain the first audio signal, including: the receiving equipment processes the audio data packet according to a preset protocol to obtain audio data; the receiving equipment performs format conversion on the audio data according to a preset format to obtain a second audio signal; the receiving device performs digital-to-analog conversion on the second audio signal to obtain the first audio signal; before the receiving device outputs the first audio signal, the receiving device stores the first audio signal into a buffer queue; and the receiving equipment sequentially reads the first audio signals from the buffer queue.

7. A system for processing an audio signal, comprising:

the audio source is used for collecting a first audio signal to be transmitted;

a sending device, connected to the audio source, configured to process the first audio signal to obtain an audio data packet, where the audio data packet at least includes: a physical address of the first audio signal and a receiving device;

the receiving device is connected with the sending device through a network cable and is used for receiving the audio data packet;

the transmission apparatus includes:

the Ethernet controller is connected with the processor and used for processing the audio data according to a preset protocol to obtain the audio data packet and sending the audio data packet;

the receiving device is further configured to receive the audio data packet after the sending device sends the audio data packet to the receiving device; processing the audio data packet to obtain the first audio signal; outputting the first audio signal;

processing the audio data packet according to a preset protocol to obtain audio data; according to a preset format, carrying out format conversion on the audio data to obtain a second audio signal; performing digital-to-analog conversion on the second audio signal to obtain the first audio signal; storing the first audio signal in a buffer queue before outputting the first audio signal; and sequentially reading the first audio signals from the buffer queue.

8. The system of claim 7, wherein the sending device comprises:

the digital-to-analog converter is used for performing analog-to-digital conversion on a first audio signal to obtain a second audio signal, wherein the first audio signal is an audio signal to be transmitted and is acquired from an audio source, the first audio signal is an analog signal, and the second audio signal is a digital signal;

and the processor is connected with the digital-to-analog converter and used for carrying out format conversion on the first audio signal according to a preset format to obtain audio data.

9. The system of claim 7,

the receiving device is further configured to process the audio data packet to obtain the first audio signal;

the system further comprises: and the audio output unit is connected with the receiving equipment and used for outputting the first audio signal.

10. The system of claim 9, wherein the receiving device comprises:

the Ethernet controller is used for processing the audio data packet according to a preset protocol to obtain the audio data;

the processor is connected with the Ethernet controller and used for carrying out format conversion on the audio data according to a preset format to obtain a second audio signal;

and the digital-to-analog converter is connected with the processor and is used for performing digital-to-analog conversion on the second audio signal to obtain the first audio signal.

11. The system of claim 8 or 10, wherein the processor comprises:

a first interface, a first end of the first interface is connected with the digital-to-analog converter;

the first processing unit is connected with the second end of the first interface;

a first end of each second interface is connected with the processing unit, and a second end of each second interface is connected with the ethernet controller.

12. The system of claim 11, wherein the processor further comprises:

the third interface is connected with the first processing unit and used for receiving key state information input from the outside and driving the LED lamp to display the key state information;

the two second interfaces are also used for outputting the key state information.

13. The system of claim 11, wherein the processor further comprises:

a fourth interface, a first end of the fourth interface is connected to the controller, a second end of the fourth interface is connected to the first processing unit, and is configured to receive a control parameter output by the controller, where the control parameter at least includes: the sending form of the physical address is one of the following: unicast format and broadcast format.

14. The system of claim 11, wherein the processor is an FPGA.

15. The system according to claim 8 or 10, wherein the ethernet controller comprises:

the second processing unit is used for processing the audio data to obtain the audio data packet, or processing the audio data packet to obtain the audio data;

and the fifth interface is connected with the second processing unit and used for outputting the audio data packet or receiving the audio data packet.

16. The system of claim 15, wherein the ethernet controller is model DM 9000.

17. The system of claim 15, wherein the fifth interface is an RJ45 interface carrying a transformer.

18. The system according to claim 8 or 10, wherein the digital-to-analog converter is of the type CS5368 or CS 4382.

19. An apparatus for transmitting an audio signal, comprising:

the digital-to-analog converter is connected with an audio source and used for performing analog-to-digital conversion on an obtained first audio signal to obtain a second audio signal, wherein the first audio signal is an audio signal to be transmitted and is acquired from the audio source, the first audio signal is an analog signal, and the second audio signal is a digital signal;

the processor is connected with the digital-to-analog converter and used for carrying out format conversion on the first audio signal according to a preset format to obtain audio data;

the Ethernet controller is respectively connected with the processor and the receiving equipment and is used for processing the audio data according to a preset protocol to obtain an audio data packet and sending the audio data packet;

after a sending device sends the audio data packet to the receiving device, the receiving device receives the audio data packet; the receiving device processes the audio data packet to obtain the first audio signal; the receiving device outputs the first audio signal; the processing, by the receiving device, the audio data packet to obtain the first audio signal includes: the receiving equipment processes the audio data packet according to a preset protocol to obtain audio data; the receiving equipment performs format conversion on the audio data according to a preset format to obtain a second audio signal; the receiving device performs digital-to-analog conversion on the second audio signal to obtain the first audio signal; before the receiving device outputs the first audio signal, the receiving device stores the first audio signal into a buffer queue; and the receiving equipment sequentially reads the first audio signals from the buffer queue.

20. An apparatus for receiving an audio signal, comprising:

the Ethernet controller is connected with the sending equipment and used for processing the received audio data packet according to a preset protocol to obtain the audio data;

the digital-to-analog converter is respectively connected with the processor and the audio output unit and is used for performing digital-to-analog conversion on the second audio signal to obtain a first audio signal and outputting the first audio signal, wherein the first audio signal is an analog signal, and the second audio signal is a digital signal;

the processing, by the receiving device, the audio data packet to obtain the first audio signal includes: the receiving equipment processes the audio data packet according to a preset protocol to obtain audio data; the receiving equipment performs format conversion on the audio data according to a preset format to obtain a second audio signal; the receiving equipment performs digital-to-analog conversion on the second audio signal to obtain the first audio signal; before the receiving device outputs the first audio signal, the receiving device stores the first audio signal into a buffer queue; and the receiving equipment sequentially reads the first audio signals from the buffer queue.