CN106330340B - Optical receiving circuit and the method for preventing logic exception - Google Patents
Optical receiving circuit and the method for preventing logic exception Download PDFInfo
- Publication number
- CN106330340B CN106330340B CN201610847410.9A CN201610847410A CN106330340B CN 106330340 B CN106330340 B CN 106330340B CN 201610847410 A CN201610847410 A CN 201610847410A CN 106330340 B CN106330340 B CN 106330340B
- Authority
- CN
- China
- Prior art keywords
- circuit
- amplifier
- output
- resistance
- amplifying circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/66—Non-coherent receivers, e.g. using direct detection
- H04B10/69—Electrical arrangements in the receiver
- H04B10/697—Arrangements for reducing noise and distortion
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/07—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
- H04B10/075—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal
- H04B10/079—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
- H04B10/0799—Monitoring line transmitter or line receiver equipment
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Amplifiers (AREA)
Abstract
The embodiment of the invention provides a kind of optical receiving circuit, including connect in order optical signal receiving module, level-one amplifying circuit, second amplifying circuit and compare output circuit.Second amplifying circuit includes that two input terminals and two output ends, one of input terminal are connected with constant current bias circuit, so that the voltage difference perseverance of two output ends of second amplifying circuit is greater than a preset value.The embodiment of the invention also provides a kind of methods for preventing circuit logic exception.The optical receiving circuit of the embodiment of the present invention and the method for preventing circuit logic exception, it connects a constant current bias circuit by one of input terminal in second amplifying circuit, so that the voltage difference (i.e. the voltage difference of two output ends of second amplifying circuit) of two input terminals of the comparison output circuit is permanent to be greater than a preset value, the voltage difference between two input terminal is able to confirm identification always so that comparing output circuit, exports correct digital logic signal always to ensure that and compare output circuit.
Description
Technical field
The present embodiments relate in optical communication technique more particularly to a kind of optical receiving circuit and a kind of optical receiving circuit
The method for preventing logic exception.
Background technique
The signal transmission system that IGBT driving chip is made of light emitting diode and photodiode.In general, it shines
The reception circuit of diode and integrated photodiode is encapsulated in together.Due to the integrated received optical signal of photodiode
Very faint, therefore, in existing optical signal reception technique, usually there is logic erroneous judgement in optical signal receiving circuit, and causes
Distorted signals.
Summary of the invention
The purpose of the embodiment of the present invention is, provides a kind of optical receiving circuit and a kind of side for preventing circuit logic exception
Method, to solve the problems, such as to lead to distorted signals because of circuit logic erroneous judgement in traditional optical signal receiving circuit.
On the one hand, the present invention provides a kind of optical receiving circuits, comprising:
Optical signal receiving module；
Level-one amplifying circuit, the input terminal of the level-one amplifying circuit are connected to the optical signal receiving module, are used for institute
It states current signal caused by optical signal receiving module and is converted to first voltage signal；
Second amplifying circuit, the input terminal of the second amplifying circuit are connected to the output end of the level-one amplifying circuit, use
According to first voltage signal generation second voltage signal and reference voltage signal；And
Compare output circuit, the input terminal of the comparison output circuit is connected to the second amplifying circuit to output end, uses
According to the second voltage signal and the corresponding digital logic signal of reference voltage signal output；
Wherein, the second amplifying circuit includes that two input terminals and two output ends, one of input terminal are connected with
Constant current bias circuit, so that the voltage difference perseverance of two output ends of the second amplifying circuit is greater than a preset value.
On the one hand, the present invention provides a kind of methods for preventing logic exception, are applied in optical receiving circuit, this method packet
Include following steps:
Optical signal receiving step receives optical signal and received optical signal is converted to current signal；
Current signal is amplified and is converted to first voltage signal by current-voltage switch process；
Voltage amplification step generates second voltage signal and reference voltage signal according to the first voltage signal；And
Compare output step, the second voltage signal and the reference voltage signal, is exported according to comparison result
Corresponding digital logic signal；
Wherein, the voltage amplification step is realized by a second amplifying circuit, which includes one
Second amplifier, second amplifier include two input terminals and two output ends, and one of input terminal is connected with a perseverance
Biasing circuit is flowed, which makes the voltage difference perseverance of the second voltage signal and reference voltage signal be greater than one
Preset value.
The optical receiving circuit of the embodiment of the present invention and the method for preventing circuit logic exception, by second amplifying circuit
One of input terminal connect a constant current bias circuit so that the voltage difference of two output ends of second amplifying circuit (can
Be equal to or the convertible voltage difference in two input terminals for comparing output circuit) it is permanent be greater than a preset value so that more defeated
Circuit is able to the voltage difference between two input terminal to confirm identification always out, to ensure that compare output circuit defeated always
Correct digital logic signal out.
For further understanding of the features and technical contents of the present invention, it please refers to below in connection with of the invention detailed
Illustrate and attached drawing, however, the drawings only provide reference and explanation, is not intended to limit the present invention.
Detailed description of the invention
Fig. 1 is the functional block diagram of the optical receiving circuit of the embodiment of the present invention.
Fig. 2 is the circuit diagram of the optical receiving circuit of the embodiment of the present invention.
Fig. 3 is the waveform diagram of key node in optical receiving circuit shown in Fig. 2.
Fig. 4 is the schematic equivalent circuit of photodiode in the optical receiving circuit of the embodiment of the present invention.
Fig. 5 is the circuit diagram of the optical receiving circuit of another embodiment of the present invention.
Fig. 6 is the signal processing flow figure for preventing circuit logic exception of the embodiment of the present invention.
Main element symbol description
Optical receiving circuit 100
Optical signal receiving module 10
Level-one amplifying circuit 20
Second amplifying circuit 30
Compare output circuit 40
Photodiode D1
First amplifier OP1
Second amplifier OP2
Comparator CMP
First resistor R1
Second resistance R2_1
3rd resistor R2_2
4th resistance R3_1
5th resistance R3_2
6th resistance R4_1
7th resistance R4_2
Constant current bias circuit IB
Specific embodiment
Further to illustrate technological means and its effect adopted by the present invention, below in conjunction with preferred implementation of the invention
Example and its attached drawing are described in detail.
Fig. 1,2 are please referred to, in the present embodiment, optical receiving circuit 100 includes the optical signal receiving module connected in order
10, level-one amplifying circuit 20, second amplifying circuit 30 and compare output circuit 40.
Optical signal receiving module 10 is used to receive the optical signal of external light source, and by the optical signal and is converted to electric current letter
Number, with output to level-one amplifying circuit 20.The optical signal receiving module 10 may include photodiode D1 or other photosensitive members
Part.
In the present embodiment, optical signal receiving module 10 is photodiode D1 of the work under reverse-biased, the photoelectricity
For diode D1 in the case of no illumination or faint light are shone, the electric current of output is very faint, is equivalent to and is in off state；It should
In the case of compared with intense light irradiation, directional current increases rapidly photodiode D1, is equivalent to and is on state.
It should be noted that the current signal needs to be detected by subsequent conditioning circuit, which can be according to electric current
Size exports corresponding digital logic signal, provides rear class reading circuit and is handled.
Level-one amplifying circuit 20, the input terminal of the level-one amplifying circuit 20 are connected to the optical signal receiving module 10, use
In current signal caused by the optical signal receiving module 10 is converted to first voltage signal.
In the present embodiment, level-one amplifying circuit 20 includes the first amplifier OP1, first resistor R1, second resistance R2_1
And 3rd resistor R2_2, in which: the first amplifier OP1 includes that first input end, the second input terminal, the first output end and second are defeated
The first input end of outlet, the first amplifier OP1 is connected to one end of optical signal receiving module 10 by first resistor R1 and leads to
Cross the first output end that second resistance R2_1 is connected to the first amplifier OP1, the second input terminal of the first amplifier OP1 passes through the
Three resistance R2_2 are connected to the second output terminal of the first amplifier OP1, the first output end of the first amplifier OP1 and the second output
The output end as level-one amplifying circuit 20 is held to be connected to second amplifying circuit 30.
In the present embodiment, photodiode D1 belongs to a submodule of integrated circuit, is not to separately exist in collection
Outside at circuit.The key parameter of different technique, photodiode D1 is all different, such as optical signal transmission ratio, parasitic knot
Can capacitor etc., these parameters can all influence reception circuit below and work normally.
First resistor R1 can be used to eliminate the problem of photodiode D1 is with process deviation, generally as input resistance
It is arranged in several hundred ohms to one kilohm or so.It can satisfy all kinds of technique requirements.
First amplifier OP1 can be trans-impedance amplifier (Trans-impedance Amplifier, TIA), the TIA it
Non-inverting input terminal is the first input end of the first amplifier OP1, inverting input terminal is the first amplifier OP1 the second input terminal,
Reversed-phase output is the second output terminal that the first output end, the in-phase output end of the first amplifier OP1 is the first amplifier OP1.
Certainly, the first amplifier OP1 can also use other amplifier elements.
Second amplifying circuit 30, the input terminal of the second amplifying circuit 30 are connected to the output of the level-one amplifying circuit 20
End, for generating second voltage signal and reference voltage signal according to the first voltage signal.Wherein, second amplifying circuit 30
Including two input terminals and two output ends, one of input terminal is connected with constant current bias circuit IB, so that second level amplification electricity
The voltage difference perseverance of two output ends on road 30 is greater than a preset value.
In the present embodiment, second amplifying circuit 30 includes the second amplifier OP2, the 4th resistance R3_1, the 5th resistance R3_
2, the 6th resistance R4_1, the 7th resistance R4_2 and the constant current bias circuit IB, in which: the second amplifier OP2 includes first defeated
Enter end, the second input terminal, the first output end and second output terminal, it is inclined that the first input end of the second amplifier OP2 is connected to constant current
Circuits IB, the first output end that the first amplifier OP1 is connected to by the 4th resistance R3_1 and by the 6th resistance R4_1 connect
It is connected to the first output end of the second amplifier OP2, the second input terminal of the second amplifier OP2 is connected by the 5th resistance R3_2
It is connected to the second output terminal of the first amplifier OP1 and is connected to the second output of the second amplifier OP2 by the 7th resistance R4_2
End, the first output end and second output terminal of the second amplifier OP2 is connected to as the output end of second amplifying circuit 30 to be compared
Output circuit 40.
First amplifier OP1 can be reverse phase ratio-voltage amplifier, the homophase input of the reverse phase ratio-voltage amplifier
End is the first input end of the second amplifier OP2, inverting input terminal is the second input terminal of the second amplifier OP2, anti-phase output
End is the second output terminal that the first output end, the in-phase output end of the second amplifier OP2 is the second amplifier OP2.Certainly, second
Amplifier OP2 can also use other amplifier elements.
Compare output circuit 40, the input terminal of the comparison output circuit 40 is connected to the output of the second amplifying circuit 30
End, for exporting corresponding digital logic signal according to the second voltage signal and the reference voltage signal.
Comparing output circuit 40 includes at least one comparator CMP, in which: comparator CMP includes first input end, second
Input terminal, the first output end and second output terminal, the first input end of comparator CMP are connected to the first of the second amplifier OP2
Output end, comparator CMP are connected to the second output terminal of the second amplifier OP2, the first output end of comparator CMP and second defeated
Output end of the outlet as optical receiving circuit 100 provides the progress of rear class reading circuit for exporting corresponding digital logic signal
Processing.In the present embodiment, the voltage difference of 30 two output ends of second amplifying circuit and compare 40 two input terminals of output circuit
Voltage difference it is identical.In the present embodiment, comparator CMP can be high-speed comparator.
In a preferred embodiment, it is necessary to meet following condition by constant current bias circuit IB:
R2_1*IS*(R4_1/R3_1)≥M*IB*R3_2；
Wherein, R2_1 is the second resistance, R3_1 is the 4th resistance, R3_2 is the 5th resistance, R4_1 is
6th resistance, ISFor the electric current of 10 generation of optical signal receiving module, IBFor the electric current that the constant current bias circuit IB is provided, M
For the real number more than or equal to 2.The preferred embodiment has further ensured the voltage for comparing two input terminals of output circuit CMP
Difference, so that the logic of comparator CMP be avoided to judge by accident.
In a preferred embodiment, when optical signal receiving module 10 is using photodiode D1, referring to FIG. 4, it is
The equivalent circuit diagram of photodiode D1.Is is equivalent current, and Rs is equivalent series resistance, by contact resistance, non-depletion layer material
The bulk resistor of material is formed.Cd is junction capacity.The size of Rs, Cd are related to bias with size, the structure of photodiode.Bias
Bigger, Rs, Cd are smaller.Rd is the parallel resistance of silicon photoelectric diode, by silicon photoelectric diode depletion layer resistance and ohmic leakage institute
It constitutes, it is related with pipe sizing.Junction area is smaller, and Rd is smaller.
An external RC (Resistance-Capacitance) series connection is needed since level-one amplifying circuit 20 works normally
Compensation network stablizes its working condition, but additional RC circuit needs to account for chip area.To solve this problem, this is preferred real
Example is applied by the plus earth of photodiode D1, cathode is connected to the first input of the first amplifier OP1 by first resistor R1
The parasitic junction capacitance Cd of photodiode D1 optocoupler and first resistor R1, is formed a RC series circuit, provides one by end
Zero point carrys out compensation loop stability.
In a preferred embodiment, one or more of first resistor to the 7th resistance is variable resistance.
In order to enable the embodiment of the present invention is more clear clear, and it is reference with Fig. 2, it is to the embodiment of the present invention specific below
Circuit operation principle carries out detailed analysis.In analysis, involved circuit element includes photodiode D1, the first amplifier
OP1, the second amplifier OP2, comparator CMP, first resistor to the 7th resistance (R1, R2_1, R2_2, R3_1, R3_3, R4_1,
R4_2), constant current bias circuit IB.Wherein, R2_2, R3_1=R3_3, R4_1=R4_2.IPD is what photodiode D1 was generated
Current signal (photoelectric current).
Work as IPD=0, bias current IBWhen=0, then: VINP1=VINN1, VPD=VR1, VINP1 are approximately equal to photoelectricity two
The reversed bias voltage of pole pipe D1, it is assumed that the DC offset voltage of VPD=VR1 is Va；VPD_A=VR2, it is assumed that VPD_A=VR2's is straight
Stream bias voltage is Vb.
When IPD=Is (Is is photodiode maximum photoelectric current), VINP1=VINN1 can flow through second resistance R2_1 and arrive
Ground, therefore: VPD=Va+R2_1*Is.
Referring to FIG. 3, IPD is the trip current signal from 0 to Is, VPD changes between Va and Va+R2_1*Is.Tr table
Show that the rising delay of photoelectric current, tf indicate the fall delay of photoelectric current, therefore obtain:
VPD_A=Vb- [Va+R2_1*Is* (R4_1/R3_1)]；
VR2=Vb- [Va+R2_2*0* (R4_2/R3_2)]=Vb；
As Is=0, VPD_A=VR2=Vb；
When Is does not wait zero, VPD_A-VR2=-R2_1*Is* (R4_1/R3_1).
For comparator CMP, as Is=0, correct logic state can not be judged.Because when Is=0, than
Voltage compared with two input terminals of device CMP is equal, and comparator CMP can not work normally.In order to solve this problem, it is put second
The inverting input terminal of big device OP2 accesses a constant current bias circuit IB, it is ensured that the voltage difference of two input terminals of comparator CMP.
It is added after constant current bias circuit IB:
As Is=0, VR2 can an I lower than VPD_AB* the voltage value of R3_2: VPD_A=Vb, VR2=Vb-IB*R3_
2.It is found that having I between two input terminals of comparator CMPB* the voltage difference of R3_2, this voltage difference are generally located on 50mV
Left and right, and I can be adjusted according to the actual situationBThe size either size of the 5th resistance R3_2.The pressure difference of this rank, one
As comparator can normally identify, it is easy to transplant.
When Is is not equal to zero, have:
VPD_A=Vb- [Va+R2_1*Is* (R4_1/R3_1)]；
VR2=Vb-IB*R3_2-[Va+R2_2*0*(R4_2/R3_2)]；
VPD_A-VR2=IB*R3_2-R2_1*Is*(R4_1/R3_1)；
It is found that it is zero that the voltage difference between two input terminals of comparator CMP, which still has certain probability, lead to comparator
The logic of CMP is judged by accident, for this purpose, the electric current I of constant current bias circuit IB outputBAlso it is necessary to meet following condition:
R2_1*Is*(R4_1/R3_1)≥M*IB*R3_2；
Is is photodiode photo stream, IBFor the current signal that constant-current source bias circuit I B is provided, M is real number, this reality
The preferred M=2 of example is applied, to realize optimal performance.
To sum up, the embodiment of the present invention can be avoided the logic erroneous judgement being easy to appear in traditional circuit, and the present invention is implemented
All resistance and constant current bias circuit can be adjusted by different modes in example, for example fuse is adjusted, and number is compiled
Journey adjusting etc., for meeting polytechnic different demands, transplantability is very high.
In another embodiment, as shown in figure 5, the difference is that, constant current bias circuit IB is used with the circuit of Fig. 2
The mode of one end ground connection.
The signal processing flow figure for preventing circuit logic exception of the position Fig. 6 embodiment of the present invention.
Optical signal receiving step S10 receives optical signal and received optical signal is converted to current signal.
Current signal is amplified and is converted to first voltage signal by current-voltage switch process S20.Step S10 passes through one
A photodiode realizes that step S20 is realized by a level-one amplifying circuit, the plus earth of the photodiode, cathode
The level-one amplifying circuit is connected by a resistance, so that the parasitic junction capacitance of the photodiode and the resistance are formed
One RC circuit.
Voltage amplification step S30 generates second voltage signal and reference voltage signal according to the first voltage signal.Step
Rapid S30 realizes that the second amplifying circuit includes second amplifier, the second amplifier packet by a second amplifying circuit
Two input terminals and two output ends are included, one of input terminal is connected with a constant current bias circuit, the constant current bias circuit
So that the voltage difference perseverance of the second voltage signal and reference voltage signal is greater than a preset value.
Compare output step S40, the second voltage signal and the reference voltage signal, it is defeated according to comparison result
Corresponding digital logic signal out.
The above for those of ordinary skill in the art can according to the technique and scheme of the present invention and technology
Other various corresponding changes and modifications are made in design, and all these change and modification all should belong to the claims in the present invention
Protection scope.
Claims (8)
1. a kind of optical receiving circuit characterized by comprising
Optical signal receiving module；
Level-one amplifying circuit, the input terminal of the level-one amplifying circuit are connected to the optical signal receiving module, are used for the light
Current signal caused by signal receiving module is converted to first voltage signal；
Second amplifying circuit, the input terminal of the second amplifying circuit are connected to the output end of the level-one amplifying circuit, for according to
Second voltage signal and reference voltage signal are generated according to the first voltage signal；And
Compare output circuit, the input terminal of the comparison output circuit is connected to the output end of the second amplifying circuit, for according to
Corresponding digital logic signal is exported according to the second voltage signal and the reference voltage signal；
Wherein, the second amplifying circuit includes that two input terminals and two output ends, one of input terminal are connected with constant current
Biasing circuit, so that the voltage difference perseverance of two output ends of the second amplifying circuit is greater than a preset value；
The level-one amplifying circuit includes the first amplifier, first resistor, second resistance and 3rd resistor, in which:
First amplifier includes first input end, the second input terminal, the first output end and second output terminal, and described first puts
The first input end of big device by the first resistor is connected to one end of the optical signal receiving module and passes through described second
Resistance is connected to the first output end of first amplifier, and the second input terminal of first amplifier passes through the third electricity
Resistance is connected to the second output terminal of first amplifier, the first output end of first amplifier and second output terminal conduct
The output end of the level-one amplifying circuit is connected to the second amplifying circuit；
The second amplifying circuit includes the second amplifier, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance and described
Constant current bias circuit, in which:
Second amplifier includes first input end, the second input terminal, the first output end and second output terminal, and described second puts
The first input end of big device is connected to the constant current bias circuit, first amplifier is connected to by the 4th resistance it
First output end and the first output end that second amplifier is connected to by the 6th resistance, second amplifier it
Second input terminal is connected to the second output terminal of first amplifier by the 5th resistance and passes through the 7th resistance
It is connected to the second output terminal of second amplifier, the first output end and second output terminal of second amplifier are as institute
The output end for stating second amplifying circuit is connected to the relatively output circuit.
2. optical receiving circuit as described in claim 1, which is characterized in that the constant current bias circuit meets following relationship:
R2_1*IS*(R4_1/R3_1)≥M*IB*R3_2；
Wherein, R2_1 is the second resistance, R3_1 is the 4th resistance, R3_2 is the 5th resistance, R4_1 is described
6th resistance, electric current of the IS for the optical signal receiving module generation, the electric current that IB provides for the constant current bias circuit, M are
Real number more than or equal to 2.
3. optical receiving circuit as claimed in claim 2, which is characterized in that the relatively output circuit includes that at least one compares
Device, in which:
The comparator includes first input end, the second input terminal, the first output end and second output terminal, and the of the comparator
One input terminal is connected to the first output end of second amplifier, and the second input terminal of the comparator is connected to described second
The second output terminal of amplifier, output of the first output end and second output terminal of the comparator as the optical receiving circuit
End.
4. the optical receiving circuit as described in any one of claim 1-3, which is characterized in that the optical signal receiving module packet
Photodiode is included, the plus earth of the photodiode, cathode is connected to the level-one by the first resistor and amplifies electricity
The input terminal on road.
5. the optical receiving circuit as described in any one of claim 1-3, which is characterized in that first amplifier is across resistance
Amplifier.
6. the optical receiving circuit as described in any one of claim 1-3, which is characterized in that the first resistor to the 7th electricity
One or more of resistance is variable resistance.
7. a kind of method for preventing logic exception is applied in optical receiving circuit, which is characterized in that this method includes following step
It is rapid:
Optical signal receiving step receives optical signal and received optical signal is converted to current signal；
Current signal is amplified and is converted to first voltage signal by current-voltage switch process；
Voltage amplification step generates second voltage signal and reference voltage signal according to the first voltage signal；And
Compare output step, the second voltage signal and the reference voltage signal, is answered according to comparison result output phase
Digital logic signal；
Wherein, the voltage amplification step is realized by a second amplifying circuit, which includes one second
Amplifier, second amplifier include two input terminals and two output ends, and it is inclined that one of input terminal is connected with a constant current
Circuits, the constant current bias circuit make the voltage difference perseverance of the second voltage signal and reference voltage signal default greater than one
Value.
8. the method for preventing logic exception as claimed in claim 7, which is characterized in that the optical signal receiving step passes through one
A photodiode realizes that the current-voltage switch process is realized by a level-one amplifying circuit, the photodiode
Plus earth, cathode connect the level-one amplifying circuit by a resistance, so as to the parasitic junction capacitance of the photodiode
A RC circuit is formed with the resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610847410.9A CN106330340B (en) | 2016-09-23 | 2016-09-23 | Optical receiving circuit and the method for preventing logic exception |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610847410.9A CN106330340B (en) | 2016-09-23 | 2016-09-23 | Optical receiving circuit and the method for preventing logic exception |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106330340A CN106330340A (en) | 2017-01-11 |
| CN106330340B true CN106330340B (en) | 2019-07-26 |
Family
ID=57820408
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610847410.9A Active CN106330340B (en) | 2016-09-23 | 2016-09-23 | Optical receiving circuit and the method for preventing logic exception |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106330340B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109560879B (en) * | 2017-09-27 | 2021-06-22 | 敦宏科技股份有限公司 | Optical receiving circuit with dark current correction function and dark current correction method thereof |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1527254A (en) * | 2003-03-05 | 2004-09-08 | ������������ʽ���� | Dptical receiving machine |
| CN1835392A (en) * | 2005-03-18 | 2006-09-20 | 夏普株式会社 | Light receiving amplifier circuit and optical pickup device having the same |
| CN103532636A (en) * | 2012-11-02 | 2014-01-22 | 黄山市光锐通信有限公司 | Optical module and receiving unit thereof |
| CN204498130U (en) * | 2015-03-20 | 2015-07-22 | 深圳光启智能光子技术有限公司 | Photoelectric switching circuit and optical signal receiver |
| CN204517817U (en) * | 2015-03-20 | 2015-07-29 | 深圳光启创新技术有限公司 | Photoelectric switching circuit and optical signal receiver |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4133897B2 (en) * | 2004-03-29 | 2008-08-13 | シャープ株式会社 | Optical receiver |
| JP5514142B2 (en) * | 2011-04-11 | 2014-06-04 | 株式会社東芝 | Receiver circuit |
-
2016
- 2016-09-23 CN CN201610847410.9A patent/CN106330340B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1527254A (en) * | 2003-03-05 | 2004-09-08 | ������������ʽ���� | Dptical receiving machine |
| CN1835392A (en) * | 2005-03-18 | 2006-09-20 | 夏普株式会社 | Light receiving amplifier circuit and optical pickup device having the same |
| CN103532636A (en) * | 2012-11-02 | 2014-01-22 | 黄山市光锐通信有限公司 | Optical module and receiving unit thereof |
| CN204498130U (en) * | 2015-03-20 | 2015-07-22 | 深圳光启智能光子技术有限公司 | Photoelectric switching circuit and optical signal receiver |
| CN204517817U (en) * | 2015-03-20 | 2015-07-29 | 深圳光启创新技术有限公司 | Photoelectric switching circuit and optical signal receiver |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106330340A (en) | 2017-01-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4498001A (en) | Transimpedance amplifier for optical receivers | |
| US5329115A (en) | Optical receiver circuit | |
| KR100701741B1 (en) | Detection circuit | |
| JP3098461B2 (en) | Digital receiver circuit | |
| US7474978B2 (en) | High dynamic range optical receiver | |
| US20020092972A1 (en) | Transimpedance amplifier with an in-situ optical power meter | |
| JP5088334B2 (en) | Optical receiver circuit | |
| US9562808B2 (en) | Light receiving circuit and light coupling device | |
| US20200091881A1 (en) | Differential trans-impedance amplifier | |
| US20100116969A1 (en) | Signal amplifier for optical receiver circuit | |
| CN106330340B (en) | Optical receiving circuit and the method for preventing logic exception | |
| JPH03101428A (en) | Optical receiver | |
| KR101479149B1 (en) | Dynamic impedance receiver circuit for ultrafast low-power photodetector | |
| US20050224697A1 (en) | Light-receiving circuit capable of expanding a dynamic range of an optical input | |
| US9246601B2 (en) | Optical receiver | |
| US6876260B2 (en) | Elevated front-end transimpedance amplifier | |
| US4952795A (en) | Current limiter and an optical receiver making use thereof | |
| US6965103B2 (en) | Signal strength detection circuits for high speed optical electronics | |
| US6956195B2 (en) | Photoelectric current and voltage converting circuit | |
| US9755760B2 (en) | Supply voltage modular photodiode bias | |
| US10784968B2 (en) | Optical module | |
| JP4588592B2 (en) | Burst signal receiving apparatus and burst signal detecting method | |
| KR20110073171A (en) | Transimpedance amplifier circuit | |
| JP4389418B2 (en) | Optical receiver circuit | |
| Brandl et al. | Optical wireless receiver circuit with integrated APD and high background-light immunity |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |